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Improved H10 ADC driver. We now do things exactly as the OF does. This includes shifting the readings by 0x14 when PLL is enabled. Battery voltages and remote/scrollpad values adjusted accordingly. We also now wait for the ADC to indicate the conversion is complete before reading the data, so hopefully we will get more reliably steady readings.

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15141 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Barry Wardell 2007-10-16 10:48:16 +00:00
parent 8b44601a7c
commit 1d1a17c0db
12 changed files with 99 additions and 61 deletions
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2
firmware/drivers/audio/as3514.c
View file

@ -138,7 +138,7 @@ void audiohw_init(void)
i2c_init();
/* normal outputs for CDI and I2S pin groups */
DEV_INIT &= ~0x300;
DEV_INIT2 &= ~0x300;
/*mini2?*/
outl(inl(0x70000010) & ~0x3000000, 0x70000010);

7
firmware/export/pp5020.h
View file

@ -121,8 +121,9 @@
/* Device Controller */
#define DEV_RS (*(volatile unsigned long *)(0x60006004))
#define DEV_OFF_MASK (*(volatile unsigned long *)(0x60006008))
#define DEV_RS2 (*(volatile unsigned long *)(0x60006008))
#define DEV_EN (*(volatile unsigned long *)(0x6000600c))
#define DEV_EN2 (*(volatile unsigned long *)(0x60006010))
#define DEV_SYSTEM 0x00000004
#define DEV_SER0 0x00000040
@ -141,6 +142,7 @@
#define CLOCK_SOURCE (*(volatile unsigned long *)(0x60006020))
#define PLL_CONTROL (*(volatile unsigned long *)(0x60006034))
#define PLL_STATUS (*(volatile unsigned long *)(0x6000603c))
#define ADC_CLOCK_SRC (*(volatile unsigned long *)(0x60006094))
#define CLCD_CLOCK_SRC (*(volatile unsigned long *)(0x600060a0))
/* Processors Control */
@ -304,7 +306,8 @@
#define RAM_TYPE_MASK 0x000000c0
#define ROM_TYPE_MASK 0x00000008
#define DEV_INIT (*(volatile unsigned long *)(0x70000020))
#define DEV_INIT1 (*(volatile unsigned long *)(0x70000010))
#define DEV_INIT2 (*(volatile unsigned long *)(0x70000020))
/* some timing that needs to be handled during clock setup */
#define DEV_TIMING1 (*(volatile unsigned long *)(0x70000034))
#define XMB_NOR_CFG (*(volatile unsigned long *)(0x70000038))

92
firmware/target/arm/iriver/h10/adc-h10.c
View file

@ -25,29 +25,21 @@
static unsigned short adcdata[NUM_ADC_CHANNELS];
/* Scan ADC so that adcdata[channel] gets updated */
/* Scan ADC so that adcdata[channel] gets updated. */
unsigned short adc_scan(int channel)
{
unsigned int adc_data_1;
unsigned int adc_data_2;
/* Initialise */
ADC_ADDR=0x130;
ADC_STATUS=0; /* 4 bytes, 1 per channel. Each byte is 0 if the channel is
off, 0x40 if the channel is on */
/* Enable Channel */
ADC_ADDR |= (0x1000000<<channel);
/* Start? */
ADC_ADDR |= 0x20000000;
/* Start conversion */
ADC_ADDR |= 0x80000000;
#if 0
/* wait for ADC ready. THIS IS NOT WORKING (locks up) */
while(ADC_STATUS & (0x40 << (channel*8))); /* add loop protection here */
#endif
/* Wait for conversion to complete */
while((ADC_STATUS & (0x40<<8*channel))==0);
/* Stop conversion */
ADC_ADDR &=~ 0x80000000;
/* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel.
For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the
2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */
@ -56,6 +48,13 @@ unsigned short adc_scan(int channel)
adcdata[channel] = (adc_data_1<<2 | adc_data_2);
/* ADC values read low if PLL is enabled */
if(PLL_CONTROL & 0x80000000){
adcdata[channel] += 0x14;
if(adcdata[channel] > 0x400)
adcdata[channel] = 0x400;
}
return adcdata[channel];
}
@ -79,25 +78,64 @@ static void adc_tick(void)
}
}
/* Figured out from how the OF does things */
void adc_init(void)
{
/* Enable ADC */
ADC_ENABLE_ADDR |= ADC_ENABLE;
ADC_INIT |= 1;
ADC_INIT |= 0x40000000;
udelay(100);
/* Initialise */
ADC_INIT=0;
/* Reset ADC */
DEV_RS2 |= 0x20;
udelay(100);
DEV_RS2 &=~ 0x20;
udelay(100);
/* Enable ADC */
DEV_EN2 |= 0x20;
udelay(100);
ADC_CLOCK_SRC |= 0x3;
udelay(100);
ADC_ADDR |= 0x40;
ADC_ADDR |= 0x20000000;
udelay(100);
ADC_INIT;
ADC_INIT = 0;
udelay(100);
ADC_STATUS = 0;
/* Enable channel 0 (battery) */
DEV_INIT1 &=~0x3;
ADC_ADDR |= 0x1000000;
ADC_STATUS |= 0x20;
/* Enable channel 1 (unknown, temperature?) */
DEV_INIT1 &=~30;
ADC_ADDR |= 0x2000000;
ADC_STATUS |= 0x2000;
/* Enable channel 2 (remote) */
DEV_INIT1 &=~0x300;
DEV_INIT1 |= 0x100;
ADC_ADDR |= 0x4000000;
ADC_STATUS |= 0x200000;
/* Enable channel 3 (scroll pad) */
DEV_INIT1 &=~0x3000;
DEV_INIT1 |= 0x1000;
ADC_ADDR |= 0x8000000;
ADC_STATUS |= 0x20000000;
/* Force a scan of all channels to get initial values */
adc_scan(ADC_BATTERY);
adc_scan(ADC_UNKNOWN_1);
adc_scan(ADC_REMOTE);
adc_scan(ADC_SCROLLPAD);
/* FIXME: The ADC sometimes reads 0 for the battery
voltage for the first few seconds. It would be better to fix this by
figuring out how to use the ADC properly. Until then, work around the
problem by waiting until it reads a proper value*/
while(adc_scan(ADC_UNREG_POWER)==0);
tick_add_task(adc_tick);
}

3
firmware/target/arm/iriver/h10/adc-target.h
View file

@ -19,9 +19,6 @@
#ifndef _ADC_TARGET_H_
#define _ADC_TARGET_H_
#define ADC_ENABLE_ADDR (*(volatile unsigned long*)(0x70000010))
#define ADC_ENABLE 0x1100
#define ADC_ADDR (*(volatile unsigned long*)(0x7000ad00))
#define ADC_STATUS (*(volatile unsigned long*)(0x7000ad04))
#define ADC_DATA_1 (*(volatile unsigned long*)(0x7000ad20))

12
firmware/target/arm/iriver/h10/button-h10.c
View file

@ -52,7 +52,7 @@ bool button_hold(void)
bool remote_button_hold(void)
{
return adc_scan(ADC_REMOTE) < 0x17;
return adc_scan(ADC_REMOTE) < 0x2B;
}
/*
@ -102,7 +102,7 @@ int button_read_device(void)
data = adc_scan(ADC_SCROLLPAD);
GPIOD_OUTPUT_VAL |= 0x40;
if(data < 0x210)
if(data < 0x224)
{
btn |= BUTTON_SCROLL_DOWN;
} else {
@ -115,7 +115,7 @@ int button_read_device(void)
remote_hold_button_old = remote_hold_button;
data = adc_scan(ADC_REMOTE);
remote_hold_button = data < 0x17;
remote_hold_button = data < 0x2B;
#ifndef BOOTLOADER
if (remote_hold_button != remote_hold_button_old)
@ -126,13 +126,13 @@ int button_read_device(void)
{
if (data < 0x3FF)
{
if(data < 0x1F0)
if(data < 0x141)
if(data < 0x204)
if(data < 0x155)
btn |= BUTTON_RC_FF;
else
btn |= BUTTON_RC_REW;
else
if(data < 0x2BC)
if(data < 0x2D0)
btn |= BUTTON_RC_VOL_DOWN;
else
btn |= BUTTON_RC_VOL_UP;

18
firmware/target/arm/iriver/h10/powermgmt-h10.c
View file

@ -25,18 +25,18 @@
const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
{
#ifdef IRIVER_H10
3760
3733
#elif defined IRIVER_H10_5GB
3720
3695
#endif
};
const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
{
#ifdef IRIVER_H10
3650
3627
#elif defined IRIVER_H10_5GB
3650
3627
#endif
};
@ -44,9 +44,9 @@ const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
{
#ifdef IRIVER_H10
{ 3760, 3800, 3850, 3870, 3900, 3950, 4020, 4070, 4110, 4180, 4240 }
{ 3733, 3772, 3821, 3840, 3869, 3917, 3985, 4034, 4072, 4140, 4198 }
#elif defined IRIVER_H10_5GB
{ 3720, 3740, 3800, 3820, 3840, 3880, 3940, 4020, 4060, 4150, 4240 }
{ 3695, 3714, 3772, 3791, 3811, 3850, 3908, 3985, 4024, 4111, 4198 }
#endif
};
@ -54,14 +54,14 @@ const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
const unsigned short percent_to_volt_charge[11] =
{
#ifdef IRIVER_H10
3990, 4030, 4060, 4080, 4100, 4120, 4150, 4180, 4220, 4260, 4310
3956, 3995, 4024, 4043, 4063, 4082, 4111, 4140, 4179, 4218, 4266
#elif defined IRIVER_H10_5GB
/* TODO: Not yet calibrated */
3880, 3920, 3960, 4000, 4060, 4100, 4150, 4190, 4240, 4280, 4330
3850, 3888, 3927, 3966, 4024, 4063, 4111, 4150, 4198, 4237, 4286
#endif
};
#define BATTERY_SCALE_FACTOR 4800
#define BATTERY_SCALE_FACTOR 4650
/* full-scale ADC readout (2^10) in millivolt */
/* Returns battery voltage from ADC [millivolts] */

4
firmware/target/arm/sandisk/power-c200_e200.c
View file

@ -85,7 +85,7 @@ bool tuner_power_nolock(bool status)
#if defined(SANSA_E200)
outl(inl(0x70000084) | 0x1, 0x70000084);
#else /* SANSA_C200 */
DEV_INIT &= ~0x800;
DEV_INIT2 &= ~0x800;
#endif
udelay(5);
@ -120,7 +120,7 @@ bool tuner_power_nolock(bool status)
#if defined (SANSA_E200)
outl(inl(0x70000084) & ~0x1, 0x70000084);
#else
DEV_INIT |= 0x800;
DEV_INIT2 |= 0x800;
#endif
}

2
firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
View file

@ -88,7 +88,7 @@ void lcd_init_device(void)
outl(inl(0x70000010) & ~0xfc000000, 0x70000010);
outl(inl(0x70000010), 0x70000010);
DEV_INIT &= ~0x400;
DEV_INIT2 &= ~0x400;
udelay(10000);
LCD1_CONTROL &= ~0x4;

2
firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
View file

@ -372,7 +372,7 @@ void lcd_init_device(void)
/* Controller init */
outl((inl(0x70000084) | (1 << 28)), 0x70000084);
outl((inl(0x70000080) & ~(1 << 28)), 0x70000080);
outl(((inl(0x70000010) & (0x03ffffff)) | (0x15 << 26)), 0x70000010);
DEV_INIT1 = ( (DEV_INIT1 & 0x03ffffff) | (0x15 << 26) );
outl(((inl(0x70000014) & (0x0fffffff)) | (0x5 << 28)), 0x70000014);
outl((inl(0x70000020) & ~(0x3 << 10)), 0x70000020);
DEV_EN |= DEV_LCD; /* Enable controller */

12
firmware/target/arm/system-pp502x.c
View file

@ -240,17 +240,17 @@ void system_init(void)
{
#if defined(SANSA_E200) || defined(SANSA_C200)
/* Reset all devices */
DEV_OFF_MASK |= 0x20;
DEV_RS2 |= 0x20;
DEV_RS = 0x3bfffef8;
DEV_OFF_MASK = -1;
DEV_RS2 = -1;
DEV_RS = 0;
DEV_OFF_MASK = 0;
DEV_RS2 = 0;
#elif defined (IRIVER_H10)
DEV_RS = 0x3ffffef8;
DEV_OFF_MASK = -1;
DEV_RS2 = -1;
outl(inl(0x70000024) | 0xc0, 0x70000024);
DEV_RS = 0;
DEV_OFF_MASK = 0;
DEV_RS2 = 0;
#endif
#if !defined(SANSA_E200) && !defined(SANSA_C200)
@ -289,7 +289,7 @@ void system_init(void)
outl(inl(0x6000a000) | 0x80000000, 0x6000a000); /* Init DMA controller? */
#endif
DEV_INIT |= 1 << 30; /* enable PLL power */
DEV_INIT2 |= 1 << 30; /* enable PLL power */
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
#if NUM_CORES > 1

4
firmware/target/arm/usb-fw-pp502x.c
View file

@ -44,7 +44,7 @@ void usb_init_device(void)
DEV_RS |= DEV_USB; /* reset usb start */
DEV_RS &=~DEV_USB;/* reset usb end */
DEV_INIT |= INIT_USB;
DEV_INIT2 |= INIT_USB;
while ((inl(0x70000028) & 0x80) == 0);
UDC_PORTSC1 |= PORTSCX_PORT_RESET;
@ -70,7 +70,7 @@ void usb_init_device(void)
/* Note from IPL source (referring to next 5 lines of code:
THIS NEEDS TO BE CHANGED ONCE THERE IS KERNEL USB */
DEV_INIT |= INIT_USB;
DEV_INIT2 |= INIT_USB;
DEV_EN |= DEV_USB;
while ((inl(0x70000028) & 0x80) == 0);
outl(inl(0x70000028) | 0x2, 0x70000028);

2
firmware/target/arm/wmcodec-pp.c
View file

@ -46,7 +46,7 @@ void audiohw_init(void) {
#ifdef CPU_PP502x
/* normal outputs for CDI and I2S pin groups */
DEV_INIT &= ~0x300;
DEV_INIT2 &= ~0x300;
/*mini2?*/
outl(inl(0x70000010) & ~0x3000000, 0x70000010);