Move Sansa AMS timer code in the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21552 a1c6a512-1295-4272-9138-f99709370657
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3 changed files with 69 additions and 35 deletions
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@ -372,6 +372,7 @@ target/arm/pnx0101/system-pnx0101.c
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#if CONFIG_CPU == AS3525
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target/arm/as3525/system-as3525.c
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target/arm/as3525/kernel-as3525.c
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target/arm/as3525/timer-as3525.c
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target/arm/as3525/ata_sd_as3525.c
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target/arm/as3525/power-as3525.c
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target/arm/as3525/usb-as3525.c
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68
firmware/target/arm/as3525/timer-as3525.c
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68
firmware/target/arm/as3525/timer-as3525.c
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@ -0,0 +1,68 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "as3525.h"
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#include "timer.h"
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#include "stdlib.h"
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void INT_TIMER1(void)
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{
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if (pfn_timer != NULL)
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pfn_timer();
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TIMER1_INTCLR = 0; /* clear interrupt */
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}
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bool __timer_set(long cycles, bool start)
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{
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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}
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TIMER1_LOAD = TIMER1_BGLOAD = cycles;
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/* /!\ bit 4 (reserved) must not be modified
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* periodic mode, interrupt enabled, no prescale, 32 bits counter */
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TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) |
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TIMER_ENABLE |
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TIMER_PERIODIC |
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TIMER_INT_ENABLE |
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TIMER_32_BIT;
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return true;
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}
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bool __timer_register(void)
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{
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CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
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VIC_INT_ENABLE |= INTERRUPT_TIMER1;
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return true;
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}
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void __timer_unregister(void)
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{
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TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
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VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
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CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
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}
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@ -61,14 +61,6 @@ void TIMER1(void)
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pfn_timer();
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TER1 = 0xff; /* clear all events */
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}
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#elif CONFIG_CPU == AS3525
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void INT_TIMER1(void)
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{
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if (pfn_timer != NULL)
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pfn_timer();
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TIMER1_INTCLR = 0; /* clear interrupt */
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}
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#elif defined(CPU_PP)
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void TIMER2(void)
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{
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@ -171,25 +163,6 @@ static bool timer_set(long cycles, bool start)
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and_b(~0x01, &TSR4); /* clear an eventual interrupt */
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return true;
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#elif CONFIG_CPU == AS3525
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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}
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TIMER1_LOAD = TIMER1_BGLOAD = cycles;
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/* /!\ bit 4 (reserved) must not be modified
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* periodic mode, interrupt enabled, no prescale, 32 bits counter */
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TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) |
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TIMER_ENABLE |
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TIMER_PERIODIC |
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TIMER_INT_ENABLE |
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TIMER_32_BIT;
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return true;
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#elif defined CPU_COLDFIRE
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if (prescale > 4096/CPUFREQ_MAX_MULT)
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return false;
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@ -314,10 +287,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
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irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
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irq_enable_int(IRQ_TIMER1);
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return true;
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#elif CONFIG_CPU == AS3525
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CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
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VIC_INT_ENABLE |= INTERRUPT_TIMER1;
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return true;
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#else
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return __TIMER_REGISTER(reg_prio, unregister_callback, cycles,
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int_prio, timer_callback);
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@ -351,10 +320,6 @@ void timer_unregister(void)
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#elif CONFIG_CPU == PNX0101
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TIMER1.ctrl &= ~0x80; /* disable timer 1 */
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irq_disable_int(IRQ_TIMER1);
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#elif CONFIG_CPU == AS3525
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TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
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VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
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CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
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#else
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__TIMER_UNREGISTER();
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#endif
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