Move Sansa AMS timer code in the target tree

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21552 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2009-06-29 14:28:49 +00:00
parent 2c10af5d30
commit 15e40dd3a6
3 changed files with 69 additions and 35 deletions

View file

@ -372,6 +372,7 @@ target/arm/pnx0101/system-pnx0101.c
#if CONFIG_CPU == AS3525 #if CONFIG_CPU == AS3525
target/arm/as3525/system-as3525.c target/arm/as3525/system-as3525.c
target/arm/as3525/kernel-as3525.c target/arm/as3525/kernel-as3525.c
target/arm/as3525/timer-as3525.c
target/arm/as3525/ata_sd_as3525.c target/arm/as3525/ata_sd_as3525.c
target/arm/as3525/power-as3525.c target/arm/as3525/power-as3525.c
target/arm/as3525/usb-as3525.c target/arm/as3525/usb-as3525.c

View file

@ -0,0 +1,68 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2008 Rafaël Carré
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "as3525.h"
#include "timer.h"
#include "stdlib.h"
void INT_TIMER1(void)
{
if (pfn_timer != NULL)
pfn_timer();
TIMER1_INTCLR = 0; /* clear interrupt */
}
bool __timer_set(long cycles, bool start)
{
if (start)
{
if (pfn_unregister != NULL)
{
pfn_unregister();
pfn_unregister = NULL;
}
}
TIMER1_LOAD = TIMER1_BGLOAD = cycles;
/* /!\ bit 4 (reserved) must not be modified
* periodic mode, interrupt enabled, no prescale, 32 bits counter */
TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) |
TIMER_ENABLE |
TIMER_PERIODIC |
TIMER_INT_ENABLE |
TIMER_32_BIT;
return true;
}
bool __timer_register(void)
{
CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
VIC_INT_ENABLE |= INTERRUPT_TIMER1;
return true;
}
void __timer_unregister(void)
{
TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
}

View file

@ -61,14 +61,6 @@ void TIMER1(void)
pfn_timer(); pfn_timer();
TER1 = 0xff; /* clear all events */ TER1 = 0xff; /* clear all events */
} }
#elif CONFIG_CPU == AS3525
void INT_TIMER1(void)
{
if (pfn_timer != NULL)
pfn_timer();
TIMER1_INTCLR = 0; /* clear interrupt */
}
#elif defined(CPU_PP) #elif defined(CPU_PP)
void TIMER2(void) void TIMER2(void)
{ {
@ -171,25 +163,6 @@ static bool timer_set(long cycles, bool start)
and_b(~0x01, &TSR4); /* clear an eventual interrupt */ and_b(~0x01, &TSR4); /* clear an eventual interrupt */
return true; return true;
#elif CONFIG_CPU == AS3525
if (start)
{
if (pfn_unregister != NULL)
{
pfn_unregister();
pfn_unregister = NULL;
}
}
TIMER1_LOAD = TIMER1_BGLOAD = cycles;
/* /!\ bit 4 (reserved) must not be modified
* periodic mode, interrupt enabled, no prescale, 32 bits counter */
TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) |
TIMER_ENABLE |
TIMER_PERIODIC |
TIMER_INT_ENABLE |
TIMER_32_BIT;
return true;
#elif defined CPU_COLDFIRE #elif defined CPU_COLDFIRE
if (prescale > 4096/CPUFREQ_MAX_MULT) if (prescale > 4096/CPUFREQ_MAX_MULT)
return false; return false;
@ -314,10 +287,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR); irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
irq_enable_int(IRQ_TIMER1); irq_enable_int(IRQ_TIMER1);
return true; return true;
#elif CONFIG_CPU == AS3525
CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
VIC_INT_ENABLE |= INTERRUPT_TIMER1;
return true;
#else #else
return __TIMER_REGISTER(reg_prio, unregister_callback, cycles, return __TIMER_REGISTER(reg_prio, unregister_callback, cycles,
int_prio, timer_callback); int_prio, timer_callback);
@ -351,10 +320,6 @@ void timer_unregister(void)
#elif CONFIG_CPU == PNX0101 #elif CONFIG_CPU == PNX0101
TIMER1.ctrl &= ~0x80; /* disable timer 1 */ TIMER1.ctrl &= ~0x80; /* disable timer 1 */
irq_disable_int(IRQ_TIMER1); irq_disable_int(IRQ_TIMER1);
#elif CONFIG_CPU == AS3525
TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
#else #else
__TIMER_UNREGISTER(); __TIMER_UNREGISTER();
#endif #endif