Move PNX0101 timer code in the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21554 a1c6a512-1295-4272-9138-f99709370657
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e0640c3c4b
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5 changed files with 125 additions and 52 deletions
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@ -367,6 +367,7 @@ target/arm/s5l8700/i2c-s5l8700.c
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#if CONFIG_CPU == PNX0101
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#if CONFIG_CPU == PNX0101
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target/arm/pnx0101/kernel-pnx0101.c
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target/arm/pnx0101/kernel-pnx0101.c
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target/arm/pnx0101/system-pnx0101.c
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target/arm/pnx0101/system-pnx0101.c
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target/arm/pnx0101/timer-pnx0101.c
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#endif
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#endif
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#if CONFIG_CPU == AS3525
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#if CONFIG_CPU == AS3525
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@ -31,11 +31,9 @@
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#elif defined(CPU_COLDFIRE)
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#elif defined(CPU_COLDFIRE)
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/* timer is based on busclk == cpuclk/2 */
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/* timer is based on busclk == cpuclk/2 */
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#define TIMER_FREQ (CPU_FREQ/2)
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#define TIMER_FREQ (CPU_FREQ/2)
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#elif CONFIG_CPU == PNX0101
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#define TIMER_FREQ 3000000
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#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \
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#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \
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|| defined(CPU_TCC77X) || CONFIG_CPU == AS3525 || CONFIG_CPU == IMX31L \
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|| defined(CPU_TCC77X) || CONFIG_CPU == AS3525 || CONFIG_CPU == IMX31L \
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|| CONFIG_CPU == JZ4732
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|| CONFIG_CPU == JZ4732 || CONFIG_CPU == PNX0101
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#include "timer-target.h"
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#include "timer-target.h"
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#elif defined(SIMULATOR)
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#elif defined(SIMULATOR)
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#define TIMER_FREQ 1000000
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#define TIMER_FREQ 1000000
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82
firmware/target/arm/pnx0101/timer-pnx0101.c
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82
firmware/target/arm/pnx0101/timer-pnx0101.c
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@ -0,0 +1,82 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Tomasz Malesinski
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "timer-target.h"
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#include "system.h"
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#include "timer.h"
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static long cycles_new = 0;
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void TIMER1_ISR(void)
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{
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if (cycles_new > 0)
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{
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TIMER1.load = cycles_new - 1;
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cycles_new = 0;
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}
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if (pfn_timer != NULL)
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{
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cycles_new = -1;
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/* "lock" the variable, in case timer_set_period()
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* is called within pfn_timer() */
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pfn_timer();
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cycles_new = 0;
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}
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TIMER1.clr = 1; /* clear the interrupt */
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}
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bool __timer_set(long cycles, bool start)
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{
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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TIMER1.ctrl &= ~0x80; /* disable the counter */
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TIMER1.ctrl |= 0x40; /* reload after counting down to zero */
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TIMER1.ctrl &= ~0xc; /* no prescaler */
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TIMER1.clr = 1; /* clear an interrupt event */
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}
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if (start || (cycles_new == -1)) /* within isr, cycles_new is "locked" */
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{ /* enable timer */
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TIMER1.load = cycles - 1;
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TIMER1.ctrl |= 0x80; /* enable the counter */
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}
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else
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cycles_new = cycles;
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return true;
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}
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bool __timer_start(void)
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{
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irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
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irq_enable_int(IRQ_TIMER1);
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return true;
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}
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void __timer_stop(void)
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{
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TIMER1.ctrl &= ~0x80; /* disable timer 1 */
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irq_disable_int(IRQ_TIMER1);
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}
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39
firmware/target/arm/pnx0101/timer-target.h
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39
firmware/target/arm/pnx0101/timer-target.h
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@ -0,0 +1,39 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Tomasz Malesinski
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef TIMER_TARGET_H
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#define TIMER_TARGET_H
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bool __timer_set(long cycles, bool start);
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bool __timer_start(void);
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void __timer_stop(void);
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#define TIMER_FREQ 3000000
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#define __TIMER_SET(cycles, set) \
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__timer_set(cycles, set)
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#define __TIMER_START() \
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__timer_start()
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#define __TIMER_STOP(...) \
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__timer_stop()
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#endif /* TIMER_TARGET_H */
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@ -31,7 +31,7 @@ void SHAREDBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */
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void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */
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void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */
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#ifdef CPU_COLDFIRE
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#ifdef CPU_COLDFIRE
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static int base_prescale;
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static int base_prescale;
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#elif defined CPU_PP || CONFIG_CPU == PNX0101
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#elif defined CPU_PP
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static long SHAREDBSS_ATTR cycles_new = 0;
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static long SHAREDBSS_ATTR cycles_new = 0;
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#endif
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#endif
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@ -78,24 +78,6 @@ void TIMER2(void)
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cycles_new = 0;
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cycles_new = 0;
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}
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}
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}
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}
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#elif CONFIG_CPU == PNX0101
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void TIMER1_ISR(void)
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{
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if (cycles_new > 0)
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{
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TIMER1.load = cycles_new - 1;
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cycles_new = 0;
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}
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if (pfn_timer != NULL)
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{
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cycles_new = -1;
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/* "lock" the variable, in case timer_set_period()
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* is called within pfn_timer() */
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pfn_timer();
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cycles_new = 0;
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}
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TIMER1.clr = 1; /* clear the interrupt */
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}
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#endif /* CONFIG_CPU */
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#endif /* CONFIG_CPU */
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static bool timer_set(long cycles, bool start)
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static bool timer_set(long cycles, bool start)
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@ -114,29 +96,7 @@ static bool timer_set(long cycles, bool start)
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}
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}
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#endif
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#endif
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#if CONFIG_CPU == PNX0101
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#if CONFIG_CPU == SH7034
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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TIMER1.ctrl &= ~0x80; /* disable the counter */
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TIMER1.ctrl |= 0x40; /* reload after counting down to zero */
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TIMER1.ctrl &= ~0xc; /* no prescaler */
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TIMER1.clr = 1; /* clear an interrupt event */
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}
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if (start || (cycles_new == -1)) /* within isr, cycles_new is "locked" */
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{ /* enable timer */
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TIMER1.load = cycles - 1;
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TIMER1.ctrl |= 0x80; /* enable the counter */
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}
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else
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cycles_new = cycles;
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return true;
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#elif CONFIG_CPU == SH7034
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if (prescale > 8)
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if (prescale > 8)
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return false;
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return false;
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@ -282,10 +242,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
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#endif
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#endif
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CPU_INT_EN = TIMER2_MASK;
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CPU_INT_EN = TIMER2_MASK;
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return true;
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return true;
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#elif CONFIG_CPU == PNX0101
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irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
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irq_enable_int(IRQ_TIMER1);
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return true;
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#else
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#else
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return __TIMER_START();
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return __TIMER_START();
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#endif
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#endif
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@ -315,9 +271,6 @@ void timer_unregister(void)
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TIMER2_CFG = 0; /* stop timer 2 */
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TIMER2_CFG = 0; /* stop timer 2 */
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CPU_INT_DIS = TIMER2_MASK;
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CPU_INT_DIS = TIMER2_MASK;
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COP_INT_DIS = TIMER2_MASK;
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COP_INT_DIS = TIMER2_MASK;
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#elif CONFIG_CPU == PNX0101
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TIMER1.ctrl &= ~0x80; /* disable timer 1 */
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irq_disable_int(IRQ_TIMER1);
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#else
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#else
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__TIMER_STOP();
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__TIMER_STOP();
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#endif
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#endif
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