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Move PNX0101 timer code in the target tree

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21554 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2009-06-29 14:29:02 +00:00
parent e0640c3c4b
commit 15a7f5e5e9
5 changed files with 125 additions and 52 deletions
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1
firmware/SOURCES
View file

@ -367,6 +367,7 @@ target/arm/s5l8700/i2c-s5l8700.c
#if CONFIG_CPU == PNX0101
target/arm/pnx0101/kernel-pnx0101.c
target/arm/pnx0101/system-pnx0101.c
target/arm/pnx0101/timer-pnx0101.c
#endif
#if CONFIG_CPU == AS3525

4
firmware/export/timer.h
View file

@ -31,11 +31,9 @@
#elif defined(CPU_COLDFIRE)
/* timer is based on busclk == cpuclk/2 */
#define TIMER_FREQ (CPU_FREQ/2)
#elif CONFIG_CPU == PNX0101
#define TIMER_FREQ 3000000
#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \
|| defined(CPU_TCC77X) || CONFIG_CPU == AS3525 || CONFIG_CPU == IMX31L \
|| CONFIG_CPU == JZ4732
|| CONFIG_CPU == JZ4732 || CONFIG_CPU == PNX0101
#include "timer-target.h"
#elif defined(SIMULATOR)
#define TIMER_FREQ 1000000

82
firmware/target/arm/pnx0101/timer-pnx0101.c Normal file
View file

@ -0,0 +1,82 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 Tomasz Malesinski
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#include "timer-target.h"
#include "system.h"
#include "timer.h"
static long cycles_new = 0;
void TIMER1_ISR(void)
{
if (cycles_new > 0)
{
TIMER1.load = cycles_new - 1;
cycles_new = 0;
}
if (pfn_timer != NULL)
{
cycles_new = -1;
/* "lock" the variable, in case timer_set_period()
* is called within pfn_timer() */
pfn_timer();
cycles_new = 0;
}
TIMER1.clr = 1; /* clear the interrupt */
}
bool __timer_set(long cycles, bool start)
{
if (start)
{
if (pfn_unregister != NULL)
{
pfn_unregister();
pfn_unregister = NULL;
}
TIMER1.ctrl &= ~0x80; /* disable the counter */
TIMER1.ctrl |= 0x40; /* reload after counting down to zero */
TIMER1.ctrl &= ~0xc; /* no prescaler */
TIMER1.clr = 1; /* clear an interrupt event */
}
if (start || (cycles_new == -1)) /* within isr, cycles_new is "locked" */
{ /* enable timer */
TIMER1.load = cycles - 1;
TIMER1.ctrl |= 0x80; /* enable the counter */
}
else
cycles_new = cycles;
return true;
}
bool __timer_start(void)
{
irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
irq_enable_int(IRQ_TIMER1);
return true;
}
void __timer_stop(void)
{
TIMER1.ctrl &= ~0x80; /* disable timer 1 */
irq_disable_int(IRQ_TIMER1);
}

39
firmware/target/arm/pnx0101/timer-target.h Normal file
View file

@ -0,0 +1,39 @@
/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* $Id$
*
* Copyright (C) 2007 Tomasz Malesinski
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef TIMER_TARGET_H
#define TIMER_TARGET_H
bool __timer_set(long cycles, bool start);
bool __timer_start(void);
void __timer_stop(void);
#define TIMER_FREQ 3000000
#define __TIMER_SET(cycles, set) \
__timer_set(cycles, set)
#define __TIMER_START() \
__timer_start()
#define __TIMER_STOP(...) \
__timer_stop()
#endif /* TIMER_TARGET_H */

51
firmware/timer.c
View file

@ -31,7 +31,7 @@ void SHAREDBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */
void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */
#ifdef CPU_COLDFIRE
static int base_prescale;
#elif defined CPU_PP || CONFIG_CPU == PNX0101
#elif defined CPU_PP
static long SHAREDBSS_ATTR cycles_new = 0;
#endif
@ -78,24 +78,6 @@ void TIMER2(void)
cycles_new = 0;
}
}
#elif CONFIG_CPU == PNX0101
void TIMER1_ISR(void)
{
if (cycles_new > 0)
{
TIMER1.load = cycles_new - 1;
cycles_new = 0;
}
if (pfn_timer != NULL)
{
cycles_new = -1;
/* "lock" the variable, in case timer_set_period()
* is called within pfn_timer() */
pfn_timer();
cycles_new = 0;
}
TIMER1.clr = 1; /* clear the interrupt */
}
#endif /* CONFIG_CPU */
static bool timer_set(long cycles, bool start)
@ -114,29 +96,7 @@ static bool timer_set(long cycles, bool start)
}
#endif
#if CONFIG_CPU == PNX0101
if (start)
{
if (pfn_unregister != NULL)
{
pfn_unregister();
pfn_unregister = NULL;
}
TIMER1.ctrl &= ~0x80; /* disable the counter */
TIMER1.ctrl |= 0x40; /* reload after counting down to zero */
TIMER1.ctrl &= ~0xc; /* no prescaler */
TIMER1.clr = 1; /* clear an interrupt event */
}
if (start || (cycles_new == -1)) /* within isr, cycles_new is "locked" */
{ /* enable timer */
TIMER1.load = cycles - 1;
TIMER1.ctrl |= 0x80; /* enable the counter */
}
else
cycles_new = cycles;
return true;
#elif CONFIG_CPU == SH7034
#if CONFIG_CPU == SH7034
if (prescale > 8)
return false;
@ -282,10 +242,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
#endif
CPU_INT_EN = TIMER2_MASK;
return true;
#elif CONFIG_CPU == PNX0101
irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR);
irq_enable_int(IRQ_TIMER1);
return true;
#else
return __TIMER_START();
#endif
@ -315,9 +271,6 @@ void timer_unregister(void)
TIMER2_CFG = 0; /* stop timer 2 */
CPU_INT_DIS = TIMER2_MASK;
COP_INT_DIS = TIMER2_MASK;
#elif CONFIG_CPU == PNX0101
TIMER1.ctrl &= ~0x80; /* disable timer 1 */
irq_disable_int(IRQ_TIMER1);
#else
__TIMER_STOP();
#endif