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Ooops. The TMR reset must only be done when starting the timer.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10744 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing 2006-08-25 11:46:04 +00:00
parent 798a8c1b76
commit 07eea49347
1 changed files with 5 additions and 4 deletions
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7
firmware/timer.c
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@ -131,11 +131,12 @@ static bool timer_set(long cycles, bool start)
pfn_unregister = NULL;
}
phi &= ~1; /* timer disabled at start */
}
/* If it is already enabled, writing a 0 to the RST bit will clear the
register, so we clear RST explicitly before writing the real data. */
/* If it is already enabled, writing a 0 to the RST bit will clear
the register, so we clear RST explicitly before writing the real
data. */
TMR1 = 0;
}
/* We are using timer 1 */
TMR1 = 0x0018 | (unsigned short)phi | ((unsigned short)(prescale - 1) << 8);