2008-10-03 09:33:36 +00:00
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/*
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libdemac - A Monkey's Audio decoder
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$Id$
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Copyright (C) Dave Chapman 2007
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ARMv5te vector math copyright (C) 2008 Jens Arnold
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110, USA
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*/
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static inline void vector_add(int16_t* v1, int16_t* v2)
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{
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#if ORDER > 32
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int order = (ORDER >> 5);
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while (order--)
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#endif
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{
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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#if ORDER > 16
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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*v1++ += *v2++;
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#endif
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}
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}
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static inline void vector_sub(int16_t* v1, int16_t* v2)
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{
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#if ORDER > 32
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int order = (ORDER >> 5);
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while (order--)
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#endif
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{
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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#if ORDER > 16
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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*v1++ -= *v2++;
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#endif
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}
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}
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/* This version fetches data as 32 bit words, and *requires* v1 to be
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* 32 bit aligned, otherwise it will result either in a data abort, or
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* incorrect results (if ARM aligncheck is disabled). */
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static inline int32_t scalarproduct(int16_t* v1, int16_t* v2)
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{
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2008-11-19 21:31:33 +00:00
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int res;
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#if ORDER > 32
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int cnt = ORDER>>5;
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#endif
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2008-10-03 09:33:36 +00:00
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#if ORDER > 16
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2008-11-19 21:31:33 +00:00
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#define MLA_BLOCKS "3"
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#else
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#define MLA_BLOCKS "1"
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2008-10-03 09:33:36 +00:00
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#endif
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asm volatile (
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2008-11-19 21:31:33 +00:00
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#if ORDER > 32
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"mov %[res], #0 \n"
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#endif
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2008-10-03 09:33:36 +00:00
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"tst %[v2], #2 \n"
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"beq 20f \n"
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"10: \n"
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2008-11-16 10:12:38 +00:00
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"ldrh r7, [%[v2]], #2 \n"
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2008-11-19 21:31:33 +00:00
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#if ORDER > 32
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2008-11-16 10:12:38 +00:00
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"mov r7, r7, lsl #16 \n"
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2008-10-03 09:33:36 +00:00
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"1: \n"
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"ldmia %[v1]!, {r0-r3} \n"
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2008-11-16 10:12:38 +00:00
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"smlabt %[res], r0, r7, %[res] \n"
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2008-11-19 21:31:33 +00:00
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#else
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"ldmia %[v1]!, {r0-r3} \n"
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"smulbb %[res], r0, r7 \n"
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#endif
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2008-11-16 10:12:38 +00:00
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"ldmia %[v2]!, {r4-r7} \n"
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"smlatb %[res], r0, r4, %[res] \n"
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"smlabt %[res], r1, r4, %[res] \n"
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"smlatb %[res], r1, r5, %[res] \n"
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"smlabt %[res], r2, r5, %[res] \n"
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"smlatb %[res], r2, r6, %[res] \n"
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"smlabt %[res], r3, r6, %[res] \n"
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"smlatb %[res], r3, r7, %[res] \n"
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2008-11-19 21:31:33 +00:00
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".rept " MLA_BLOCKS "\n"
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2008-10-03 09:33:36 +00:00
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"ldmia %[v1]!, {r0-r3} \n"
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2008-11-16 10:12:38 +00:00
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"smlabt %[res], r0, r7, %[res] \n"
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"ldmia %[v2]!, {r4-r7} \n"
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"smlatb %[res], r0, r4, %[res] \n"
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"smlabt %[res], r1, r4, %[res] \n"
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"smlatb %[res], r1, r5, %[res] \n"
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"smlabt %[res], r2, r5, %[res] \n"
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"smlatb %[res], r2, r6, %[res] \n"
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"smlabt %[res], r3, r6, %[res] \n"
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"smlatb %[res], r3, r7, %[res] \n"
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2008-11-19 21:31:33 +00:00
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".endr \n"
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#if ORDER > 32
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2008-10-03 09:33:36 +00:00
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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#endif
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"b 99f \n"
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"20: \n"
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"1: \n"
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"ldmia %[v1]!, {r0-r3} \n"
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"ldmia %[v2]!, {r4-r7} \n"
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2008-11-19 21:31:33 +00:00
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#if ORDER > 32
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2008-10-03 09:33:36 +00:00
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"smlabb %[res], r0, r4, %[res] \n"
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2008-11-19 21:31:33 +00:00
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#else
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"smulbb %[res], r0, r4 \n"
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#endif
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2008-10-03 09:33:36 +00:00
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"smlatt %[res], r0, r4, %[res] \n"
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"smlabb %[res], r1, r5, %[res] \n"
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"smlatt %[res], r1, r5, %[res] \n"
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"smlabb %[res], r2, r6, %[res] \n"
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"smlatt %[res], r2, r6, %[res] \n"
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"smlabb %[res], r3, r7, %[res] \n"
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"smlatt %[res], r3, r7, %[res] \n"
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2008-11-19 21:31:33 +00:00
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".rept " MLA_BLOCKS "\n"
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2008-10-03 09:33:36 +00:00
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"ldmia %[v1]!, {r0-r3} \n"
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"ldmia %[v2]!, {r4-r7} \n"
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"smlabb %[res], r0, r4, %[res] \n"
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"smlatt %[res], r0, r4, %[res] \n"
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"smlabb %[res], r1, r5, %[res] \n"
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"smlatt %[res], r1, r5, %[res] \n"
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"smlabb %[res], r2, r6, %[res] \n"
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"smlatt %[res], r2, r6, %[res] \n"
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"smlabb %[res], r3, r7, %[res] \n"
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"smlatt %[res], r3, r7, %[res] \n"
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2008-11-19 21:31:33 +00:00
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".endr \n"
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#if ORDER > 32
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2008-10-03 09:33:36 +00:00
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"subs %[cnt], %[cnt], #1 \n"
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"bne 1b \n"
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#endif
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"99: \n"
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: /* outputs */
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2008-11-19 21:31:33 +00:00
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#if ORDER > 32
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2008-10-03 09:33:36 +00:00
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[cnt]"+r"(cnt),
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#endif
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[v1] "+r"(v1),
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[v2] "+r"(v2),
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2008-11-19 21:31:33 +00:00
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[res]"=r"(res)
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2008-10-03 09:33:36 +00:00
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: /* inputs */
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: /* clobbers */
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2008-11-16 10:12:38 +00:00
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"r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7"
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2008-10-03 09:33:36 +00:00
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);
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return res;
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}
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