2011-06-17 22:30:58 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "mmc.h"
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#include "sdmmc.h"
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2011-06-30 17:31:40 +00:00
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#include "storage.h"
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2011-06-17 22:30:58 +00:00
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#include "ssp-imx233.h"
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#include "pinctrl-imx233.h"
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#include "button-target.h"
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2011-06-30 17:31:40 +00:00
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/**
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* This code assumes a single eMMC internal flash
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*/
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2011-06-17 22:30:58 +00:00
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#ifdef SANSA_FUZEPLUS
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#define MMC_SSP 2
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#else
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#error You need to configure the ssp to use
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#endif
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2011-06-30 17:31:40 +00:00
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#define MMC_RCA 1
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/** When set, this values restrict the windows of the read and writes */
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static unsigned mmc_window_start = 0;
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static unsigned mmc_window_end = INT_MAX;
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static struct mutex mmc_mutex;
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2011-06-17 22:30:58 +00:00
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int mmc_init(void)
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{
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2011-06-30 17:31:40 +00:00
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mutex_init(&mmc_mutex);
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2011-06-17 22:30:58 +00:00
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imx233_ssp_start(MMC_SSP);
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imx233_ssp_softreset(MMC_SSP);
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imx233_ssp_set_mode(MMC_SSP, HW_SSP_CTRL1__SSP_MODE__SD_MMC);
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#ifdef SANSA_FUZEPLUS
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2011-06-30 17:31:40 +00:00
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/** Sansa Fuze+ has an internal eMMC 8-bit wide flash, power gate is pin PWM3
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* and power up time is 20ms */
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2011-06-17 22:30:58 +00:00
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imx233_set_pin_function(1, 29, PINCTRL_FUNCTION_GPIO);
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imx233_enable_gpio_output(1, 29, true);
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imx233_set_gpio_output(1, 29, false);
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2011-06-30 17:31:40 +00:00
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sleep(HZ / 5);
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2011-06-17 22:30:58 +00:00
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imx233_ssp_setup_ssp2_sd_mmc_pins(true, 8, PINCTRL_DRIVE_8mA);
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#endif
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2011-06-30 17:31:40 +00:00
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/* SSPCLK @ 96MHz
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* gives bitrate of 96000 / 240 / 1 = 400kHz */
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imx233_ssp_set_timings(MMC_SSP, 240, 0, 0xffff);
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2011-06-17 22:30:58 +00:00
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imx233_ssp_sd_mmc_power_up_sequence(MMC_SSP);
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2011-06-30 17:31:40 +00:00
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imx233_ssp_set_bus_width(MMC_SSP, 1);
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imx233_ssp_set_block_size(MMC_SSP, 9);
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2011-06-17 22:30:58 +00:00
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/* go to idle state */
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2011-06-30 17:31:40 +00:00
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int ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, SD_GO_IDLE_STATE, 0, SSP_NO_RESP, NULL, 0, false, false, NULL);
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2011-06-17 22:30:58 +00:00
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if(ret != 0)
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return -1;
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/* send op cond until the card respond with busy bit set; it must complete within 1sec */
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unsigned timeout = current_tick + HZ;
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do
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{
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uint32_t ocr;
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2011-06-30 17:31:40 +00:00
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 1, 0x40ff8000, SSP_SHORT_RESP, NULL, 0, false, false, &ocr);
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2011-06-17 22:30:58 +00:00
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if(ret == 0 && ocr & (1 << 31))
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break;
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}while(!TIME_AFTER(current_tick, timeout));
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if(ret != 0)
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return -2;
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2011-06-30 17:31:40 +00:00
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/* get CID */
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2011-06-17 22:30:58 +00:00
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uint32_t cid[4];
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2011-06-30 17:31:40 +00:00
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 2, 0, SSP_LONG_RESP, NULL, 0, false, false, cid);
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2011-06-17 22:30:58 +00:00
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if(ret != 0)
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return -3;
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2011-06-30 17:31:40 +00:00
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/* Set RCA */
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uint32_t status;
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 3, MMC_RCA << 16, SSP_SHORT_RESP, NULL, 0, false, false, &status);
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if(ret != 0)
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return -4;
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/* Select card */
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 7, MMC_RCA << 16, SSP_SHORT_RESP, NULL, 0, false, false, &status);
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if(ret != 0)
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return -5;
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/* Check TRAN state */
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 13, MMC_RCA << 16, SSP_SHORT_RESP, NULL, 0, false, false, &status);
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if(ret != 0)
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return -6;
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if(((status >> 9) & 0xf) != 4)
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return -7;
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/* Switch to 8-bit bus */
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 6, 0x3b70200, SSP_SHORT_RESP, NULL, 0, true, false, &status);
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if(ret != 0)
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return -8;
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/* switch error ? */
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if(status & 0x80)
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return -9;
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imx233_ssp_set_bus_width(MMC_SSP, 8);
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/* Switch to high speed mode */
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 6, 0x3b90100, SSP_SHORT_RESP, NULL, 0, true, false, &status);
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if(ret != 0)
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return -10;
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/* switch error ?*/
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if(status & 0x80)
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return -11;
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/* SSPCLK @ 96MHz
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* gives bitrate of 96 / 2 / 1 = 48MHz */
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imx233_ssp_set_timings(MMC_SSP, 2, 0, 0xffff);
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#ifdef SANSA_FUZEPLUS
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/**
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* The Fuze+ uses a strange layout: is has a first MBR at sector 0 with four entries:
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* 1) Actual user partition
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* 2) Sigmatel boot partition
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* 3)4) Other (certificate related ?) partitions
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* The partition 1) has type 1 but it's actually a type 5 (logical partition) with
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* a second partition table with usually one entry which is the FAT32 one.
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* The first table uses 512-byte sector size and the second one usually uses
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* 2048-byte logical sector size.
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*
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* We restrict mmc window to the user partition */
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uint8_t mbr[512];
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mmc_window_start = 0;
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mmc_window_end = INT_MAX;
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ret = mmc_read_sectors(IF_MD2(0,) 0, 1, mbr);
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if(ret != 0)
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return -100;
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if(mbr[510] != 0x55 || mbr[511] != 0xAA)
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return -101; /* invalid MBR */
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/* sanity check that the first partition is greater than 2Gib */
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uint8_t *ent = &mbr[446];
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mmc_window_start = ent[8] | ent[9] << 8 | ent[10] << 16 | ent[11] << 24;
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mmc_window_end = (ent[12] | ent[13] << 8 | ent[14] << 16 | ent[15] << 24) +
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mmc_window_start;
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if(ent[4] == 0x53)
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return -102; /* sigmatel partition */
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if((mmc_window_end - mmc_window_start) < 4 * 1024 * 1024)
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return -103; /* partition too small */
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#endif
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2011-06-17 22:30:58 +00:00
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return 0;
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}
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int mmc_num_drives(int first_drive)
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{
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(void) first_drive;
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return 1;
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}
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2011-06-30 17:31:40 +00:00
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#ifdef STORAGE_GET_INFO
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void mmc_get_info(IF_MD2(int drive,) struct storage_info *info)
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{
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#ifdef HAVE_MULTIDRIVE
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(void) drive;
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#endif
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info->sector_size = 512;
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info->num_sectors = 0xECC000 - 0x0001ac00;
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info->vendor = "Rockbox";
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info->product = "Internal Storage";
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info->revision = "0.00";
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}
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#endif
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int mmc_read_sectors(IF_MD2(int drive,) unsigned long start, int count, void *buf)
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2011-06-17 22:30:58 +00:00
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{
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IF_MD((void) drive);
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2011-06-30 17:31:40 +00:00
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/* check window */
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start += mmc_window_start;
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if((start + count) > mmc_window_end)
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return -201;
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/* get mutex (needed because we done multiple commands for count > 0 */
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mutex_lock(&mmc_mutex);
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int ret = 0;
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uint32_t resp;
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if(count == 1)
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{
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 17, start, SSP_SHORT_RESP, buf,
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count, false, true, &resp);
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}
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else
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{
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 23, count, SSP_SHORT_RESP, NULL,
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0, false, false, &resp);
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if(ret == 0)
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ret = imx233_ssp_sd_mmc_transfer(MMC_SSP, 18, start, SSP_SHORT_RESP, buf,
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count, false, true, &resp);
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}
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mutex_unlock(&mmc_mutex);
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return ret;
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2011-06-17 22:30:58 +00:00
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}
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int mmc_write_sectors(IF_MD2(int drive,) unsigned long start, int count, const void* buf)
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{
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IF_MD((void) drive);
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(void) start;
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(void) count;
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(void) buf;
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return -1;
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}
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