2008-11-10 11:04:43 +00:00
|
|
|
/***************************************************************************
|
|
|
|
* __________ __ ___.
|
|
|
|
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
|
|
|
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
|
|
|
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
|
|
|
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
|
|
|
* \/ \/ \/ \/ \/
|
|
|
|
* $Id$
|
|
|
|
*
|
2009-11-24 17:59:25 +00:00
|
|
|
* Copyright © 2008-2009 Rafaël Carré
|
2008-11-10 11:04:43 +00:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version 2
|
|
|
|
* of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
|
|
|
* KIND, either express or implied.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
#include "system.h"
|
|
|
|
#include "audio.h"
|
|
|
|
#include "string.h"
|
2008-12-04 22:27:48 +00:00
|
|
|
#include "as3525.h"
|
|
|
|
#include "pl081.h"
|
|
|
|
#include "dma-target.h"
|
|
|
|
#include "clock-target.h"
|
|
|
|
#include "panic.h"
|
|
|
|
#include "as3514.h"
|
|
|
|
#include "audiohw.h"
|
2009-06-08 23:05:33 +00:00
|
|
|
#include "mmu-arm.h"
|
2011-06-29 06:37:04 +00:00
|
|
|
#include "pcm-internal.h"
|
2008-12-04 22:27:48 +00:00
|
|
|
|
|
|
|
#define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
|
|
|
|
* i.e. 32 bits at once (size of I2SO_DATA)
|
|
|
|
* and the number of 32bits words has to
|
|
|
|
* fit in 11 bits of DMA register */
|
|
|
|
|
2011-01-19 09:15:23 +00:00
|
|
|
static void *dma_start_addr; /* Pointer to callback buffer */
|
|
|
|
static size_t dma_start_size; /* Size of callback buffer */
|
|
|
|
static void *dma_sub_addr; /* Pointer to sub buffer */
|
|
|
|
static size_t dma_rem_size; /* Remaining size - in 4*32 bits */
|
|
|
|
static size_t play_sub_size; /* size of current subtransfer */
|
2008-12-04 22:27:48 +00:00
|
|
|
static void dma_callback(void);
|
|
|
|
static int locked = 0;
|
2011-12-08 19:20:00 +00:00
|
|
|
static bool volatile is_playing = false;
|
2010-06-01 09:39:08 +00:00
|
|
|
static bool play_callback_pending = false;
|
2010-05-26 17:32:50 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
#ifdef HAVE_RECORDING
|
|
|
|
/* Stopping playback gates clock if not recording */
|
|
|
|
static bool volatile is_recording = false;
|
|
|
|
#endif
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
/* Mask the DMA interrupt */
|
2008-11-10 11:04:43 +00:00
|
|
|
void pcm_play_lock(void)
|
|
|
|
{
|
2010-06-01 09:39:08 +00:00
|
|
|
++locked;
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
/* Unmask the DMA interrupt if enabled */
|
2008-11-10 11:04:43 +00:00
|
|
|
void pcm_play_unlock(void)
|
|
|
|
{
|
2010-06-01 09:39:08 +00:00
|
|
|
if(--locked == 0 && is_playing)
|
|
|
|
{
|
|
|
|
int old = disable_irq_save();
|
|
|
|
if(play_callback_pending)
|
|
|
|
{
|
|
|
|
play_callback_pending = false;
|
|
|
|
dma_callback();
|
|
|
|
}
|
|
|
|
restore_irq(old);
|
|
|
|
}
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
static void play_start_pcm(void)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
const void *addr = dma_sub_addr;
|
|
|
|
size_t size = dma_rem_size;
|
2008-12-04 22:27:48 +00:00
|
|
|
if(size > MAX_TRANSFER)
|
|
|
|
size = MAX_TRANSFER;
|
|
|
|
|
2011-01-15 12:13:56 +00:00
|
|
|
play_sub_size = size;
|
2008-12-04 22:27:48 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
dma_enable_channel(0, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
|
2011-01-19 09:15:23 +00:00
|
|
|
DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2,
|
|
|
|
DMA_S1, dma_callback);
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
static void dma_callback(void)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
dma_sub_addr += play_sub_size;
|
|
|
|
dma_rem_size -= play_sub_size;
|
2011-01-15 12:13:56 +00:00
|
|
|
play_sub_size = 0; /* Might get called again if locked */
|
|
|
|
|
2010-06-01 09:39:08 +00:00
|
|
|
if(locked)
|
|
|
|
{
|
|
|
|
play_callback_pending = is_playing;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-01-19 09:15:23 +00:00
|
|
|
if(!dma_rem_size)
|
2008-12-04 22:27:48 +00:00
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
pcm_play_get_more_callback(&dma_start_addr, &dma_start_size);
|
2008-12-04 22:27:48 +00:00
|
|
|
|
2011-01-19 09:15:23 +00:00
|
|
|
if (!dma_start_size)
|
2010-05-24 16:42:32 +00:00
|
|
|
return;
|
2011-01-19 09:15:23 +00:00
|
|
|
|
|
|
|
dma_sub_addr = dma_start_addr;
|
|
|
|
dma_rem_size = dma_start_size;
|
|
|
|
|
|
|
|
/* force writeback */
|
2011-12-17 07:27:24 +00:00
|
|
|
commit_dcache_range(dma_start_addr, dma_start_size);
|
2011-06-29 06:37:04 +00:00
|
|
|
play_start_pcm();
|
|
|
|
pcm_play_dma_started_callback();
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
play_start_pcm();
|
2009-04-07 17:11:55 +00:00
|
|
|
}
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
void pcm_play_dma_start(const void *addr, size_t size)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
is_playing = true;
|
|
|
|
|
2011-01-19 09:15:23 +00:00
|
|
|
dma_start_addr = (void*)addr;
|
|
|
|
dma_start_size = size;
|
|
|
|
dma_sub_addr = dma_start_addr;
|
|
|
|
dma_rem_size = size;
|
2008-12-04 22:27:48 +00:00
|
|
|
|
2009-11-24 17:59:25 +00:00
|
|
|
dma_retain();
|
|
|
|
|
2011-01-19 09:15:23 +00:00
|
|
|
/* force writeback */
|
2011-12-17 07:27:24 +00:00
|
|
|
commit_dcache_range(dma_start_addr, dma_start_size);
|
2011-12-08 19:20:00 +00:00
|
|
|
|
|
|
|
bitset32(&CGU_AUDIO, (1<<11));
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
play_start_pcm();
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
void pcm_play_dma_stop(void)
|
|
|
|
{
|
2010-06-01 09:39:08 +00:00
|
|
|
is_playing = false;
|
2011-12-08 19:20:00 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
dma_disable_channel(0);
|
2011-01-19 09:15:23 +00:00
|
|
|
|
|
|
|
/* Ensure byte counts read back 0 */
|
2011-12-12 20:12:22 +00:00
|
|
|
DMAC_CH_SRC_ADDR(0) = 0;
|
2011-01-19 09:15:23 +00:00
|
|
|
dma_start_addr = NULL;
|
|
|
|
dma_start_size = 0;
|
|
|
|
dma_rem_size = 0;
|
2008-12-04 22:54:02 +00:00
|
|
|
|
2008-12-04 22:54:06 +00:00
|
|
|
dma_release();
|
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
#ifdef HAVE_RECORDING
|
|
|
|
if (!is_recording)
|
|
|
|
bitclr32(&CGU_AUDIO, (1<<11));
|
|
|
|
#endif
|
2011-01-15 12:13:56 +00:00
|
|
|
|
|
|
|
play_callback_pending = false;
|
2008-12-04 22:27:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void pcm_play_dma_pause(bool pause)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
is_playing = !pause;
|
|
|
|
|
2008-12-04 22:27:48 +00:00
|
|
|
if(pause)
|
2011-01-15 12:13:56 +00:00
|
|
|
{
|
2011-12-12 20:12:22 +00:00
|
|
|
dma_pause_channel(0);
|
2011-01-19 09:15:23 +00:00
|
|
|
|
|
|
|
/* if producer's buffer finished, upper layer starts anew */
|
|
|
|
if (dma_rem_size == 0)
|
|
|
|
play_callback_pending = false;
|
2011-01-15 12:13:56 +00:00
|
|
|
}
|
2008-12-04 22:27:48 +00:00
|
|
|
else
|
2011-01-15 12:13:56 +00:00
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
if (play_sub_size != 0)
|
2011-12-12 20:12:22 +00:00
|
|
|
dma_resume_channel(0);
|
2011-01-19 09:15:23 +00:00
|
|
|
/* else unlock calls the callback if sub buffers remain */
|
2011-01-15 12:13:56 +00:00
|
|
|
}
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void pcm_play_dma_init(void)
|
|
|
|
{
|
2010-07-02 06:00:00 +00:00
|
|
|
bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
|
2011-12-08 19:20:00 +00:00
|
|
|
I2SOUT_CONTROL = (1<<6) | (1<<3); /* enable dma, stereo */
|
2008-12-04 22:27:48 +00:00
|
|
|
|
|
|
|
audiohw_preinit();
|
2011-12-08 19:20:00 +00:00
|
|
|
pcm_dma_apply_settings();
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2011-09-01 12:15:43 +00:00
|
|
|
void pcm_play_dma_postinit(void)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2008-12-04 22:27:48 +00:00
|
|
|
audiohw_postinit();
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
2010-05-13 05:58:52 +00:00
|
|
|
/* divider is 9 bits but the highest one (for 8kHz) fit in 8 bits */
|
|
|
|
static const unsigned char divider[SAMPR_NUM_FREQ] = {
|
|
|
|
[HW_FREQ_96] = ((AS3525_MCLK_FREQ/128 + SAMPR_96/2) / SAMPR_96) - 1,
|
|
|
|
[HW_FREQ_88] = ((AS3525_MCLK_FREQ/128 + SAMPR_88/2) / SAMPR_88) - 1,
|
|
|
|
[HW_FREQ_64] = ((AS3525_MCLK_FREQ/128 + SAMPR_64/2) / SAMPR_64) - 1,
|
|
|
|
[HW_FREQ_48] = ((AS3525_MCLK_FREQ/128 + SAMPR_48/2) / SAMPR_48) - 1,
|
|
|
|
[HW_FREQ_44] = ((AS3525_MCLK_FREQ/128 + SAMPR_44/2) / SAMPR_44) - 1,
|
|
|
|
[HW_FREQ_32] = ((AS3525_MCLK_FREQ/128 + SAMPR_32/2) / SAMPR_32) - 1,
|
|
|
|
[HW_FREQ_24] = ((AS3525_MCLK_FREQ/128 + SAMPR_24/2) / SAMPR_24) - 1,
|
|
|
|
[HW_FREQ_22] = ((AS3525_MCLK_FREQ/128 + SAMPR_22/2) / SAMPR_22) - 1,
|
|
|
|
[HW_FREQ_16] = ((AS3525_MCLK_FREQ/128 + SAMPR_16/2) / SAMPR_16) - 1,
|
|
|
|
[HW_FREQ_12] = ((AS3525_MCLK_FREQ/128 + SAMPR_12/2) / SAMPR_12) - 1,
|
|
|
|
[HW_FREQ_11] = ((AS3525_MCLK_FREQ/128 + SAMPR_11/2) / SAMPR_11) - 1,
|
|
|
|
[HW_FREQ_8 ] = ((AS3525_MCLK_FREQ/128 + SAMPR_8 /2) / SAMPR_8 ) - 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static inline unsigned char mclk_divider(void)
|
2008-11-10 11:04:43 +00:00
|
|
|
{
|
2010-05-13 05:58:52 +00:00
|
|
|
return divider[pcm_fsel];
|
2010-05-13 05:26:12 +00:00
|
|
|
}
|
2008-12-04 22:27:48 +00:00
|
|
|
|
2010-05-13 05:26:12 +00:00
|
|
|
void pcm_dma_apply_settings(void)
|
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
bitmod32(&CGU_AUDIO,
|
|
|
|
(0<<24) | /* I2SI_MCLK2PAD_EN = disabled */
|
|
|
|
(0<<23) | /* I2SI_MCLK_EN = disabled */
|
|
|
|
(0<<14) | /* I2SI_MCLK_DIV_SEL = unused */
|
|
|
|
(0<<12) | /* I2SI_MCLK_SEL = clk_main */
|
|
|
|
/* I2SO_MCLK_EN = unchanged */
|
|
|
|
(mclk_divider() << 2) | /* I2SO_MCLK_DIV_SEL */
|
|
|
|
(AS3525_MCLK_SEL << 0), /* I2SO_MCLK_SEL */
|
|
|
|
0x01fff7ff);
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
size_t pcm_get_bytes_waiting(void)
|
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
int oldstatus = disable_irq_save();
|
2011-12-12 20:12:22 +00:00
|
|
|
size_t addr = DMAC_CH_SRC_ADDR(0);
|
2011-01-19 09:15:23 +00:00
|
|
|
size_t start_addr = (size_t)dma_start_addr;
|
|
|
|
size_t start_size = dma_start_size;
|
|
|
|
restore_interrupt(oldstatus);
|
|
|
|
|
|
|
|
return start_size - addr + start_addr;
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
const void * pcm_play_dma_get_peak_buffer(int *count)
|
|
|
|
{
|
2011-01-19 09:15:23 +00:00
|
|
|
int oldstatus = disable_irq_save();
|
2011-12-12 20:12:22 +00:00
|
|
|
size_t addr = DMAC_CH_SRC_ADDR(0);
|
2011-01-19 09:15:23 +00:00
|
|
|
size_t start_addr = (size_t)dma_start_addr;
|
|
|
|
size_t start_size = dma_start_size;
|
|
|
|
restore_interrupt(oldstatus);
|
|
|
|
|
|
|
|
*count = (start_size - addr + start_addr) >> 2;
|
|
|
|
return (void*)AS3525_UNCACHED_ADDR(addr);
|
2008-11-10 11:04:43 +00:00
|
|
|
}
|
2008-11-11 14:46:13 +00:00
|
|
|
|
2009-06-08 23:05:33 +00:00
|
|
|
#ifdef HAVE_PCM_DMA_ADDRESS
|
|
|
|
void * pcm_dma_addr(void *addr)
|
|
|
|
{
|
|
|
|
if (addr != NULL)
|
2010-05-19 18:13:06 +00:00
|
|
|
addr = AS3525_UNCACHED_ADDR(addr);
|
2009-06-08 23:05:33 +00:00
|
|
|
return addr;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-11-11 14:46:13 +00:00
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
** Recording DMA transfer
|
|
|
|
**/
|
|
|
|
#ifdef HAVE_RECORDING
|
2009-11-01 22:51:31 +00:00
|
|
|
|
|
|
|
static int rec_locked = 0;
|
2011-12-08 19:20:00 +00:00
|
|
|
static uint32_t *rec_dma_addr;
|
|
|
|
static size_t rec_dma_size;
|
2011-12-12 20:12:22 +00:00
|
|
|
static int keep_sample = 0; /* In nonzero, keep the sample; else, discard it */
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2008-11-11 14:46:13 +00:00
|
|
|
void pcm_rec_lock(void)
|
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
int oldlevel = disable_irq_save();
|
2010-05-13 05:26:12 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
if (++rec_locked == 1)
|
2010-06-01 09:39:08 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
|
|
|
|
VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
|
|
|
|
I2SIN_MASK = 0; /* disables all interrupts */
|
2010-06-01 09:39:08 +00:00
|
|
|
}
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
restore_irq(oldlevel);
|
2008-11-11 14:46:13 +00:00
|
|
|
}
|
|
|
|
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
void pcm_rec_unlock(void)
|
2011-07-25 01:00:15 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
int oldlevel = disable_irq_save();
|
2011-07-25 01:00:15 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
if (--rec_locked == 0 && is_recording)
|
2010-06-01 09:39:08 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
VIC_INT_ENABLE = INTERRUPT_I2SIN;
|
|
|
|
I2SIN_MASK = (1<<2); /* I2SIN_MASK_POAF */
|
|
|
|
}
|
2011-07-25 01:00:15 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
restore_irq(oldlevel);
|
|
|
|
}
|
2010-06-01 09:39:08 +00:00
|
|
|
|
2010-05-14 12:59:54 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
void INT_I2SIN(void)
|
|
|
|
{
|
2010-06-07 16:17:32 +00:00
|
|
|
#if CONFIG_CPU == AS3525
|
2011-12-08 19:20:00 +00:00
|
|
|
if (audio_channels == 1)
|
|
|
|
{
|
|
|
|
/* RX is left-channel-only mono */
|
|
|
|
while (rec_dma_size > 0)
|
2010-06-01 09:39:08 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
if (I2SIN_RAW_STATUS & (1<<5))
|
|
|
|
return; /* empty */
|
|
|
|
|
|
|
|
uint32_t value = *I2SIN_DATA;
|
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
/* Discard every other sample since ADC clock is 1/2 LRCK */
|
|
|
|
keep_sample ^= 1;
|
2011-12-08 19:20:00 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
if (keep_sample)
|
2011-12-08 19:20:00 +00:00
|
|
|
{
|
2011-12-12 20:12:22 +00:00
|
|
|
/* Data is in left channel only - copy to right channel
|
|
|
|
14-bit => 16-bit samples */
|
|
|
|
value = (uint16_t)(value << 2) | (value << 18);
|
|
|
|
|
|
|
|
if (audio_output_source != AUDIO_SRC_PLAYBACK && !is_playing)
|
2011-12-08 19:20:00 +00:00
|
|
|
{
|
2011-12-12 20:12:22 +00:00
|
|
|
/* In this case, loopback is manual so that both output
|
|
|
|
channels have audio */
|
|
|
|
if (I2SOUT_RAW_STATUS & (1<<5))
|
|
|
|
{
|
|
|
|
/* Sync output fifo so it goes empty not before input is
|
|
|
|
filled */
|
|
|
|
for (unsigned i = 0; i < 4; i++)
|
|
|
|
*I2SOUT_DATA = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
*I2SOUT_DATA = value;
|
|
|
|
*I2SOUT_DATA = value;
|
2011-12-08 19:20:00 +00:00
|
|
|
}
|
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
*rec_dma_addr++ = value;
|
|
|
|
rec_dma_size -= 4;
|
2011-12-08 19:20:00 +00:00
|
|
|
}
|
2010-06-01 09:39:08 +00:00
|
|
|
}
|
|
|
|
}
|
2011-12-08 19:20:00 +00:00
|
|
|
else
|
|
|
|
#endif /* CONFIG_CPU == AS3525 */
|
2009-11-01 22:51:31 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
/* RX is stereo */
|
|
|
|
while (rec_dma_size > 0)
|
|
|
|
{
|
|
|
|
if (I2SIN_RAW_STATUS & (1<<5))
|
|
|
|
return; /* empty */
|
2010-05-13 05:26:12 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
uint32_t value = *I2SIN_DATA;
|
2010-05-24 22:33:26 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
/* Discard every other sample since ADC clock is 1/2 LRCK */
|
|
|
|
keep_sample ^= 1;
|
|
|
|
|
|
|
|
if (keep_sample)
|
|
|
|
{
|
|
|
|
/* Loopback is in I2S hardware */
|
2011-12-08 19:20:00 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
/* 14-bit => 16-bit samples */
|
|
|
|
*rec_dma_addr++ = (value << 2) & ~0x00030000;
|
|
|
|
rec_dma_size -= 4;
|
|
|
|
}
|
2011-12-08 19:20:00 +00:00
|
|
|
}
|
2010-05-24 16:42:32 +00:00
|
|
|
}
|
2010-05-24 22:33:26 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
pcm_rec_more_ready_callback(0, (void *)&rec_dma_addr, &rec_dma_size);
|
2010-05-13 05:26:12 +00:00
|
|
|
}
|
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
|
2010-05-13 05:26:12 +00:00
|
|
|
void pcm_rec_dma_stop(void)
|
|
|
|
{
|
2010-06-01 09:39:08 +00:00
|
|
|
is_recording = false;
|
2010-05-13 05:26:12 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
|
|
|
|
I2SIN_MASK = 0; /* disables all interrupts */
|
|
|
|
|
|
|
|
rec_dma_addr = NULL;
|
|
|
|
rec_dma_size = 0;
|
2010-05-13 05:26:12 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
if (!is_playing)
|
|
|
|
bitclr32(&CGU_AUDIO, (1<<11));
|
2011-01-15 12:13:56 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
|
2009-11-01 22:51:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-11-11 14:46:13 +00:00
|
|
|
void pcm_rec_dma_start(void *addr, size_t size)
|
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
is_recording = true;
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
bitset32(&CGU_AUDIO, (1<<11));
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
rec_dma_addr = addr;
|
|
|
|
rec_dma_size = size;
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2011-12-12 20:12:22 +00:00
|
|
|
keep_sample = 0;
|
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
/* ensure empty FIFO */
|
|
|
|
while (!(I2SIN_RAW_STATUS & (1<<5)))
|
|
|
|
*I2SIN_DATA;
|
2010-06-01 09:39:08 +00:00
|
|
|
|
2011-12-08 19:20:00 +00:00
|
|
|
I2SIN_CLEAR = (1<<6) | (1<<0); /* push error, pop error */
|
2008-11-11 14:46:13 +00:00
|
|
|
}
|
|
|
|
|
2009-11-01 22:51:31 +00:00
|
|
|
|
2008-11-11 14:46:13 +00:00
|
|
|
void pcm_rec_dma_close(void)
|
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
|
|
|
|
pcm_rec_dma_stop();
|
2008-11-11 14:46:13 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void pcm_rec_dma_init(void)
|
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE);
|
|
|
|
|
2010-05-24 17:21:20 +00:00
|
|
|
I2SIN_MASK = 0; /* disables all interrupts */
|
2011-12-08 19:20:00 +00:00
|
|
|
|
|
|
|
/* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE,
|
|
|
|
* data valid at positive edge of SCLK */
|
|
|
|
I2SIN_CONTROL = (1<<5) | (1<<2);
|
2008-11-11 14:46:13 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-05-12 14:05:36 +00:00
|
|
|
const void * pcm_rec_dma_get_peak_buffer(void)
|
2008-11-11 14:46:13 +00:00
|
|
|
{
|
2011-12-08 19:20:00 +00:00
|
|
|
return rec_dma_addr;
|
2008-11-11 14:46:13 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* HAVE_RECORDING */
|