2013-11-15 21:05:40 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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* Copyright (c) 2013 by Lorenzo Miori
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <sys/types.h> /* off_t */
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#include <string.h>
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#include "cpu.h"
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#include "system.h"
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#include "backlight-target.h"
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#include "lcd.h"
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#include "lcdif-imx233.h"
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#include "clkctrl-imx233.h"
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#include "pinctrl-imx233.h"
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#include "dcp-imx233.h"
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#include "logf.h"
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#ifndef BOOTLOADER
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#include "button.h"
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#include "font.h"
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#include "action.h"
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#endif
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#include "dma-imx233.h"
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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#include "kernel.h"
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2013-11-15 21:05:40 +00:00
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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#include "regs/lcdif.h"
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2013-11-15 21:05:40 +00:00
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/**
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* NOTE
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* We don't know exact LCD models nor we have datasheets for them
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* Register function are partly guessed from the values, others are guessed from other LCD
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* drivers and others have been confirmed studying their values
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*/
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static enum lcd_type_t
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{
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LCD_TYPE_ZERO = 0,
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LCD_TYPE_ONE = 1
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} lcd_type = LCD_TYPE_ZERO;
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static void lcd_write_reg(uint16_t reg, uint16_t data)
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{
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imx233_lcdif_pio_send(false, 1, ®);
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if(reg != 0x22)
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imx233_lcdif_pio_send(true, 1, &data);
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}
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/*
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* The two LCD types require different initialization sequences
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*/
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void lcd_init_seq(void)
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{
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switch (lcd_type)
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{
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case LCD_TYPE_ZERO:
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{
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lcd_write_reg(0x11, 0x1f1e);
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lcd_write_reg(0x38, 0xf0f);
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lcd_write_reg(0x12, 0x1101);
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lcd_write_reg(0x13, 0x808);
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lcd_write_reg(0x14, 0x3119);
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lcd_write_reg(0x10, 0x1a10);
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udelay(0xc350);
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lcd_write_reg(0x13, 0x83b);
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udelay(0x30d40);
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lcd_write_reg(1, 0x90c); /* Display mode */
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lcd_write_reg(2, 0x200);
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lcd_write_reg(3, 0x1030);
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lcd_write_reg(7, 5);
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lcd_write_reg(8, 0x503);
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lcd_write_reg(11, 0);
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lcd_write_reg(12, 0);
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/* Gamma control */
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lcd_write_reg(0x30, 0x606);
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lcd_write_reg(0x31, 0x606);
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lcd_write_reg(0x32, 0x305);
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lcd_write_reg(0x33, 2);
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lcd_write_reg(0x34, 0x503);
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lcd_write_reg(0x35, 0x606);
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lcd_write_reg(0x36, 0x606);
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lcd_write_reg(0x37, 0x200);
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lcd_write_reg(0x11, 0x1f1e);
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lcd_write_reg(0x38, 0xf0f);
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/* Set initial LCD limits and RAM settings */
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lcd_write_reg(0x40, 0); //BPP ?
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lcd_write_reg(0x42, 0x9f00);
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lcd_write_reg(0x43, 0);
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lcd_write_reg(0x44, 0x7f00); /* Horizontal initial refresh zone [0 - 127] */
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lcd_write_reg(0x45, 0x9f00); /* Vertical initial refresh zone [0 - 159] */
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lcd_write_reg(14, 0x13);
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lcd_write_reg(0xa9, 0x14);
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lcd_write_reg(0xa7, 0x30);
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lcd_write_reg(0xa8, 0x124);
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lcd_write_reg(0x6f, 0x1d00);
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lcd_write_reg(0x70, 3);
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lcd_write_reg(7, 1);
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lcd_write_reg(0x10, 0x1a10);
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udelay(0x9c40);
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lcd_write_reg(7, 0x21);
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lcd_write_reg(7, 0x23);
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udelay(0x9c40);
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lcd_write_reg(7, 0x37); /* Seems to be "power on" */
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break;
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}
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case LCD_TYPE_ONE:
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{
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lcd_write_reg(0, 1);
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udelay(0x2710);
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lcd_write_reg(0x11, 0x171b);
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lcd_write_reg(0x12, 0);
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lcd_write_reg(0x13, 0x80d);
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lcd_write_reg(0x14, 0x18);
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lcd_write_reg(0x10, 0x1a10);
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udelay(0xc350);
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lcd_write_reg(0x13, 0x81d);
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udelay(0xc350);
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lcd_write_reg(1, 0x90c); /* Display mode */
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lcd_write_reg(2, 0x200);
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lcd_write_reg(3, 0x1030);
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lcd_write_reg(7, 5);
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lcd_write_reg(8, 0x30a);
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lcd_write_reg(11, 4);
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lcd_write_reg(12, 0);
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/* Gamma control */
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lcd_write_reg(0x30, 0x300);
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lcd_write_reg(0x31, 0);
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lcd_write_reg(0x32, 0);
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lcd_write_reg(0x33, 0x404);
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lcd_write_reg(0x34, 0x707);
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lcd_write_reg(0x35, 0x700);
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lcd_write_reg(0x36, 0x703);
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lcd_write_reg(0x37, 4);
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lcd_write_reg(0x38, 0);
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/* Set initial LCD limits and RAM settings */
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lcd_write_reg(0x40, 0);
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lcd_write_reg(0x42, 0x9f00); /* LCD Display Start Address Register 0 */
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lcd_write_reg(0x43, 0); /* LCD Display Start Address Register 1 */
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lcd_write_reg(0x44, 0x7f00); /* Horizontal initial refresh zone [0 - 127] */
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lcd_write_reg(0x45, 0x9f00); /* Vertical initial refresh zone [0 - 159] */
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lcd_write_reg(7, 1);
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udelay(0x2710);
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lcd_write_reg(7, 0x21);
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lcd_write_reg(7, 0x23);
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udelay(0x2710);
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lcd_write_reg(7, 0x1037);
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udelay(0x2710);
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lcd_write_reg(7, 0x35);
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lcd_write_reg(7, 0x36);
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lcd_write_reg(7, 0x37);
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udelay(10000);
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break;
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}
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default:
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break;
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}
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}
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static void send_update_rect(uint8_t x, uint8_t y, uint8_t w, uint8_t h)
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{
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/* Set horizontal refresh zone */
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lcd_write_reg(0x44, (x | (y + w - 1) << 0x8));
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/* Set vertical refresh zone */
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lcd_write_reg(0x45, (y | (y + h - 1) << 0x8));
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lcd_write_reg(0x21, x | y << 8);
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/* Set register index to 0x22 to write screen data. 0 is mock value */
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lcd_write_reg(0x22, 0);
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}
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static void setup_lcd_pins(void)
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{
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imx233_lcdif_setup_system_pins(16);
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/* lcd_rd */
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imx233_pinctrl_acquire(0, 9, "lcd rd");
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imx233_pinctrl_set_function(0, 9, PINCTRL_FUNCTION_GPIO);
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imx233_pinctrl_set_gpio(0, 9, false);
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/*
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* This pin is important to know the LCD type
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* There are two types that require two different initialization sequences
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*/
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/* lcd_tp */
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imx233_pinctrl_acquire(3, 12, "lcd type");
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imx233_pinctrl_set_function(3, 12, PINCTRL_FUNCTION_GPIO);
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imx233_pinctrl_enable_gpio(3, 12, false);
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/* Sense LCD Type */
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lcd_type = imx233_pinctrl_get_gpio(3, 12) ? LCD_TYPE_ONE : LCD_TYPE_ZERO;
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}
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static void setup_parameters(void)
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{
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imx233_lcdif_init();
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imx233_lcdif_enable(true);
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imx233_lcdif_set_word_length(16);
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imx233_lcdif_set_data_swizzle(false);
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imx233_lcdif_set_timings(2, 1, 1, 1);
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR(LCDIF_CTRL, MODE86_V(8080_MODE));
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2013-11-15 21:05:40 +00:00
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imx233_lcdif_reset_lcd(true);
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udelay(50);
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imx233_lcdif_reset_lcd(false);
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udelay(10);
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imx233_lcdif_reset_lcd(true);
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}
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void lcd_init_device(void)
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{
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/* Setup interface pins */
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setup_lcd_pins();
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/* Set LCD parameters */
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setup_parameters();
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/* Send initialization sequence to LCD */
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lcd_init_seq();
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}
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struct lcdif_cmd_t
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{
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struct apb_dma_command_t dma;
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uint32_t ctrl0;
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uint32_t pad[4];
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} __attribute__((packed)) CACHEALIGN_ATTR;
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struct lcdif_cmd_t lcdif_dma;
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void lcd_update(void)
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{
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unsigned size = LCD_WIDTH * LCD_HEIGHT * sizeof(fb_data);
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send_update_rect(0,0,LCD_WIDTH,LCD_HEIGHT);
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/* We can safely do the transfer in a single shot, since 160 * 128 * 2 < 65k,
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* the maximum transfer size!
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*/
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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lcdif_dma.dma.cmd |= BF_OR(APB_CHx_CMD, CMDWORDS(1), XFER_COUNT(size), COMMAND(2));
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2013-11-15 21:05:40 +00:00
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lcdif_dma.ctrl0 = HW_LCDIF_CTRL & ~BM_LCDIF_CTRL_COUNT;
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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lcdif_dma.ctrl0 |= BF_OR(LCDIF_CTRL, COUNT(size/2), DATA_SELECT(1));
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2013-11-15 21:05:40 +00:00
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lcdif_dma.dma.buffer = FBADDR(0,0);
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lcdif_dma.dma.cmd |= BM_APB_CHx_CMD_SEMAPHORE;
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imx233_dma_start_command(APB_LCDIF, &lcdif_dma.dma);
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imx233_dma_wait_completion(APB_LCDIF, HZ);
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}
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void lcd_update_rect(int x, int y, int w, int h)
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{
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(void)x;
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(void)y;
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(void)w;
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(void)h;
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lcd_update();
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}
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#ifndef BOOTLOADER
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bool lcd_debug_screen(void)
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{
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lcd_setfont(FONT_SYSFIXED);
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while(1)
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{
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int button = get_action(CONTEXT_STD, HZ / 10);
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switch(button)
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{
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case ACTION_STD_NEXT:
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case ACTION_STD_PREV:
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case ACTION_STD_OK:
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case ACTION_STD_MENU:
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lcd_setfont(FONT_UI);
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return true;
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case ACTION_STD_CANCEL:
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lcd_setfont(FONT_UI);
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return false;
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}
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lcd_clear_display();
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lcd_putsf(0, 0, "LCD type: %d", lcd_type);
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lcd_update();
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yield();
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}
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return true;
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}
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#endif
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