2006-02-23 15:22:08 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "lcd.h"
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#include "kernel.h"
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#include "thread.h"
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#include <string.h>
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#include <stdlib.h>
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#include "file.h"
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#include "debug.h"
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#include "system.h"
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#include "font.h"
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#include "bidi.h"
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2006-07-31 23:00:13 +00:00
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/* Is the display turned on? */
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static bool display_on = false;
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2006-02-23 15:22:08 +00:00
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2006-07-31 23:00:13 +00:00
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/* Amount of vertical offset. Used for offset correction when flipped. */
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static int y_offset = 0;
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/* Amount of roll offset (0-127). */
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static int roll_offset = 0;
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/* A15(0x8000) && CS1->CS, A1(0x0002)->RS */
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2006-07-18 18:16:38 +00:00
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#define LCD_CMD *(volatile unsigned short *)0xf0008000
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#define LCD_DATA *(volatile unsigned short *)0xf0008002
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2006-02-23 15:22:08 +00:00
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/* register defines for the Renesas HD66773R */
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2006-07-31 23:00:13 +00:00
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#define R_START_OSC 0x00
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#define R_DEVICE_CODE_READ 0x00
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#define R_DRV_OUTPUT_CONTROL 0x01
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#define R_DRV_AC_CONTROL 0x02
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#define R_POWER_CONTROL1 0x03
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#define R_POWER_CONTROL2 0x04
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#define R_ENTRY_MODE 0x05
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#define R_COMPARE_REG 0x06
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#define R_DISP_CONTROL 0x07
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#define R_FRAME_CYCLE_CONTROL 0x0b
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#define R_POWER_CONTROL3 0x0c
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#define R_POWER_CONTROL4 0x0d
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#define R_POWER_CONTROL5 0x0e
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#define R_GATE_SCAN_START_POS 0x0f
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#define R_VERT_SCROLL_CONTROL 0x11
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#define R_1ST_SCR_DRV_POS 0x14
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#define R_2ND_SCR_DRV_POS 0x15
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2006-02-23 15:22:08 +00:00
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#define R_HORIZ_RAM_ADDR_POS 0x16
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#define R_VERT_RAM_ADDR_POS 0x17
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2006-07-31 23:00:13 +00:00
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#define R_RAM_WRITE_DATA_MASK 0x20
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2006-07-23 22:18:32 +00:00
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#define R_RAM_ADDR_SET 0x21
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#define R_WRITE_DATA_2_GRAM 0x22
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2006-07-31 23:00:13 +00:00
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#define R_RAM_READ_DATA 0x22
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#define R_GAMMA_FINE_ADJ_POS1 0x30
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#define R_GAMMA_FINE_ADJ_POS2 0x31
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#define R_GAMMA_FINE_ADJ_POS3 0x32
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#define R_GAMMA_GRAD_ADJ_POS 0x33
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#define R_GAMMA_FINE_ADJ_NEG1 0x34
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#define R_GAMMA_FINE_ADJ_NEG2 0x35
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#define R_GAMMA_FINE_ADJ_NEG3 0x36
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#define R_GAMMA_GRAD_ADJ_NEG 0x37
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#define R_GAMMA_AMP_ADJ_POS 0x3a
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#define R_GAMMA_AMP_ADJ_NEG 0x3b
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2006-02-23 15:22:08 +00:00
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/* called very frequently - inline! */
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inline void lcd_write_reg(int reg, int val)
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{
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2006-07-31 23:00:13 +00:00
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LCD_CMD = 0x0000; /* MSB is ~always~ 0 */
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LCD_CMD = reg << 1;
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2006-07-18 18:16:38 +00:00
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LCD_DATA = (val >> 8) << 1;
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LCD_DATA = (val & 0xff) << 1;
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2006-02-23 15:22:08 +00:00
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}
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/* called very frequently - inline! */
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inline void lcd_begin_write_gram(void)
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{
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2006-07-31 23:00:13 +00:00
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LCD_CMD = 0x0000;
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LCD_CMD = R_WRITE_DATA_2_GRAM << 1;
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2006-02-23 15:22:08 +00:00
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}
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2006-07-31 23:00:13 +00:00
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static inline void lcd_write_one(unsigned short px)
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2006-02-23 15:22:08 +00:00
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{
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2006-07-31 23:00:13 +00:00
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unsigned short pxsr = px >> 8;
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LCD_DATA = pxsr + (pxsr & 0x1F8);
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LCD_DATA = px << 1;
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2006-02-23 15:22:08 +00:00
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}
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2006-07-31 23:00:13 +00:00
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/* Write two pixels to gram from a long */
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/* called very frequently - inline! */
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static inline void lcd_write_two(unsigned long px2)
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{
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unsigned short px2sr = px2 >> 24;
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LCD_DATA = px2sr + (px2sr & 0x1F8);
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LCD_DATA = px2 >> 15;
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px2sr = px2 >> 8;
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LCD_DATA = px2sr + (px2sr & 0x1F8);
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LCD_DATA = px2 << 1;
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}
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2006-02-23 15:22:08 +00:00
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/*** hardware configuration ***/
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2006-07-25 07:19:35 +00:00
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int lcd_default_contrast(void)
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{
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2006-07-31 19:13:21 +00:00
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return DEFAULT_CONTRAST_SETTING;
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2006-07-25 07:19:35 +00:00
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}
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2006-02-23 15:22:08 +00:00
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void lcd_set_contrast(int val)
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{
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2006-07-31 19:13:21 +00:00
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/* Clamp val in range 0-14, 16-30 */
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if (val < 1)
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val = 0;
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else if (val <= 15)
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--val;
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else if (val > 30)
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val = 30;
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2006-07-31 23:00:13 +00:00
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lcd_write_reg(R_POWER_CONTROL5, 0x2018 + (val << 8));
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2006-02-23 15:22:08 +00:00
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}
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void lcd_set_invert_display(bool yesno)
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{
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2006-07-31 23:00:13 +00:00
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
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lcd_write_reg(R_DISP_CONTROL, yesno ? 0x0033 : 0x0037);
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2006-02-23 15:22:08 +00:00
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}
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/* turn the display upside down (call lcd_update() afterwards) */
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void lcd_set_flip(bool yesno)
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{
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2006-07-31 23:00:13 +00:00
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y_offset = yesno ? 4 : 0;
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/* SCN4-0=000x0 (G160) */
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lcd_write_reg(R_GATE_SCAN_START_POS, yesno ? 0x0000 : 0x0002);
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/* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160)*/
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, yesno ? 0x0013 : 0x0313);
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/* Vertical stripe */
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/* HEA7-0=0xxx, HSA7-0=0xxx */
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lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00 + (y_offset << 8) + y_offset);
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2006-02-23 15:22:08 +00:00
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}
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/* Rolls up the lcd display by the specified amount of lines.
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* Lines that are rolled out over the top of the screen are
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* rolled in from the bottom again. This is a hardware
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* remapping only and all operations on the lcd are affected.
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* ->
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* @param int lines - The number of lines that are rolled.
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2006-07-31 23:00:13 +00:00
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* The value must be 0 <= pixels < LCD_HEIGHT.
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* Call lcd_update() afterwards */
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2006-02-23 15:22:08 +00:00
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void lcd_roll(int lines)
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{
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2006-07-31 23:00:13 +00:00
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/* Just allow any value mod LCD_HEIGHT-1. Assumes LCD_HEIGHT == 128. */
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if (lines < 0)
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lines = -lines & 127;
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else
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lines = (128 - (lines & 127)) & 127;
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roll_offset = lines;
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2006-02-23 15:22:08 +00:00
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}
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2006-07-31 23:00:13 +00:00
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/* LCD init */
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2006-02-23 15:22:08 +00:00
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void lcd_init_device(void)
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{
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/* LCD Reset */
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and_l(~0x00000010, &GPIO1_OUT);
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or_l(0x00000010, &GPIO1_ENABLE);
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or_l(0x00000010, &GPIO1_FUNCTION);
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sleep(HZ/100);
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or_l(0x00000010, &GPIO1_OUT);
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sleep(HZ/100);
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2006-07-31 23:00:13 +00:00
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/** Power ON Sequence **/
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/* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
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2006-02-23 15:22:08 +00:00
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2006-07-31 23:00:13 +00:00
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lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscillation */
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/* 10ms or more for oscillation circuit to stabilize */
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sleep(HZ/50);
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/* Instruction (1) for power setting; VC2-0, VRH3-0, CAD,
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VRL3-0, VCM4-0, VDV4-0 */
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/* VC2-0=001 */
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lcd_write_reg(R_POWER_CONTROL3, 0x0001);
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/* VRL3-0=0100, PON=0, VRH3-0=0001 */
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lcd_write_reg(R_POWER_CONTROL4, 0x0401);
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/* CAD=1 */
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lcd_write_reg(R_POWER_CONTROL2, 0x8000);
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/* VCOMG=0, VDV4-0=10011 (19), VCM4-0=11000 */
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lcd_write_reg(R_POWER_CONTROL5, 0x1318);
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/* Instruction (2) for power setting; BT2-0, DC2-0, AP2-0 */
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/* BT2-0=000, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
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lcd_write_reg(R_POWER_CONTROL1, 0x002c);
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/* Instruction (3) for power setting; VCOMG = "1" */
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/* VCOMG=1, VDV4-0=10011 (19), VCM4-0=11000 */
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lcd_write_reg(R_POWER_CONTROL5, 0x3318);
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/* 40ms or more; time for step-up circuits 1,2 to stabilize */
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2006-02-23 15:22:08 +00:00
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sleep(HZ/25);
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2006-07-31 23:00:13 +00:00
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/* Instruction (4) for power setting; PON = "1" */
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/* VRL3-0=0100, PON=1, VRH3-0=0001 */
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lcd_write_reg(R_POWER_CONTROL4, 0x0411);
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2006-02-23 15:22:08 +00:00
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2006-07-31 23:00:13 +00:00
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/* 40ms or more; time for step-up circuit 4 to stabilize */
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2006-02-23 15:22:08 +00:00
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sleep(HZ/25);
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2006-07-31 23:00:13 +00:00
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/* Instructions for other mode settings (in register order). */
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/* SM=0, GS=1, SS=1, NL4-0=10011 (G1-G160)*/
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x313);
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/* FLD1-0=01 (1 field), B/C=1, EOR=1 (C-pat), NW5-0=000000 (1 row) */
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lcd_write_reg(R_DRV_AC_CONTROL, 0x0700);
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/* DIT=1, BGR=1, HWM=0, I/D1-0=11, AM=1, LG2-0=000 */
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lcd_write_reg(R_ENTRY_MODE, 0x9038);
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/* CP15-0=0000000000000000 */
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lcd_write_reg(R_COMPARE_REG, 0x0000);
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/* NO1-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-00000 */
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lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4000);
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/* SCN4-0=00010 (G160) */
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lcd_write_reg(R_GATE_SCAN_START_POS, 0x0002);
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/* VL7-0=0x00 */
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lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
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/* SE17-10(End)=0x9f (159), SS17-10(Start)=0x00 */
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lcd_write_reg(R_1ST_SCR_DRV_POS, 0x9f00);
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/* SE27-20(End)=0x5c (92), SS27-20(Start)=0x00 */
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lcd_write_reg(R_2ND_SCR_DRV_POS, 0x5c00);
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/* HEA7-0=0x7f, HSA7-0=0x00 */
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lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00); /* Vertical stripe */
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/* PKP12-10=0x0, PKP02-00=0x0 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
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/* PKP32-30=0x4, PKP22-20=0x0 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0400);
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/* PKP52-50=0x4, PKP42-40=0x7 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0407);
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/* PRP12-10=0x3, PRP02-00=0x5 */
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lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0305);
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/* PKN12-10=0x0, PKN02-00=0x3 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0003);
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/* PKN32-30=0x7, PKN22-20=0x4 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0704);
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/* PKN52-50=0x4, PRN42-40=0x7 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
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/* PRN12-10=0x5, PRN02-00=0x3 */
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lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0503);
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/* VRP14-10=0x14, VRP03-00=0x09 */
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lcd_write_reg(R_GAMMA_AMP_ADJ_POS, 0x1409);
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/* VRN14-00=0x06, VRN03-00=0x02 */
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lcd_write_reg(R_GAMMA_AMP_ADJ_NEG, 0x0602);
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/* 100ms or more; time for step-up circuits to stabilize */
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sleep(HZ/10);
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/** Display ON Sequence **/
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/* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=1, D1-0=01 */
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lcd_write_reg(R_DISP_CONTROL, 0x0005);
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sleep(HZ/25); /* Wait 2 frames or more */
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=1, D1-0=01 */
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lcd_write_reg(R_DISP_CONTROL, 0x0025);
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=1, D1-0=11 */
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lcd_write_reg(R_DISP_CONTROL, 0x0027);
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sleep(HZ/25); /* Wait 2 frames or more */
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=1, D1-0=11 */
|
|
|
|
lcd_write_reg(R_DISP_CONTROL, 0x0037);
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|
|
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|
display_on = true;
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|
y_offset = 0;
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|
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|
roll_offset = 0;
|
2006-02-23 15:22:08 +00:00
|
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|
}
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|
|
|
void lcd_enable(bool on)
|
|
|
|
{
|
|
|
|
display_on = on;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** update functions ***/
|
|
|
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|
|
|
|
/* Performance function that works with an external buffer
|
|
|
|
note that by and bheight are in 8-pixel units! */
|
|
|
|
void lcd_blit(const fb_data* data, int x, int by, int width,
|
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|
|
int bheight, int stride)
|
|
|
|
{
|
|
|
|
/* TODO: Implement lcd_blit() */
|
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|
|
(void)data;
|
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|
|
(void)x;
|
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|
|
(void)by;
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|
|
(void)width;
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|
|
(void)bheight;
|
|
|
|
(void)stride;
|
|
|
|
/*if(display_on)*/
|
|
|
|
}
|
|
|
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|
|
|
|
/* Update the display.
|
2006-07-31 23:00:13 +00:00
|
|
|
This must be called after all other LCD functions that change the
|
|
|
|
lcd frame buffer. */
|
2006-02-23 15:22:08 +00:00
|
|
|
void lcd_update(void) ICODE_ATTR;
|
|
|
|
void lcd_update(void)
|
|
|
|
{
|
2006-07-31 23:00:13 +00:00
|
|
|
/* Optimized for full-screen write. */
|
|
|
|
const unsigned long *ptr, *ptr_end;
|
|
|
|
|
|
|
|
if (!display_on)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Set start position and window */
|
|
|
|
/* Just add roll offset to start address. CP will roll back around. */
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, y_offset + roll_offset); /* X == 0 */
|
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS, (LCD_WIDTH-1) << 8);
|
|
|
|
|
|
|
|
lcd_begin_write_gram();
|
|
|
|
|
|
|
|
ptr = (unsigned long *)lcd_framebuffer;
|
|
|
|
ptr_end = ptr + (LCD_WIDTH*LCD_HEIGHT >> 1);
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
/* 16 words per turns out to be about optimal according to
|
|
|
|
test_fps. */
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
#ifndef BOOTLOADER
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
lcd_write_two(*ptr++);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
while (ptr < ptr_end);
|
|
|
|
} /* lcd_update */
|
2006-02-23 15:22:08 +00:00
|
|
|
|
|
|
|
/* Update a fraction of the display. */
|
|
|
|
void lcd_update_rect(int, int, int, int) ICODE_ATTR;
|
|
|
|
void lcd_update_rect(int x, int y, int width, int height)
|
|
|
|
{
|
2006-07-31 23:00:13 +00:00
|
|
|
int y_end;
|
|
|
|
int odd_lead, odd_trail;
|
|
|
|
int duff;
|
|
|
|
const unsigned long *ptr, *duff_end;
|
|
|
|
int stride; /* Actually end of currline -> start of next */
|
|
|
|
|
|
|
|
if (!display_on)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (x + width > LCD_WIDTH)
|
|
|
|
width = LCD_WIDTH - x; /* Clip right */
|
|
|
|
if (x < 0)
|
|
|
|
width += x, x = 0; /* Clip left */
|
|
|
|
if (width <= 0)
|
|
|
|
return; /* nothing left to do */
|
|
|
|
|
|
|
|
y_end = y + height;
|
|
|
|
if (y_end > LCD_HEIGHT)
|
|
|
|
y_end = LCD_HEIGHT; /* Clip bottom */
|
|
|
|
if (y < 0)
|
|
|
|
y = 0; /* Clip top */
|
|
|
|
if (y >= y_end)
|
|
|
|
return; /* nothing left to do */
|
|
|
|
|
|
|
|
ptr = (unsigned long *)&lcd_framebuffer[y][x];
|
|
|
|
|
|
|
|
/* Set start position and window */
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, (x << 8) |
|
|
|
|
(((y + roll_offset) & 127) + y_offset));
|
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS, ((x + width - 1) << 8) | x);
|
|
|
|
|
|
|
|
lcd_begin_write_gram();
|
|
|
|
|
|
|
|
/* Aligning source reads to long boundaries helps 2% - 3% with IRAM
|
|
|
|
buffer. DK with DRAM. */
|
|
|
|
|
|
|
|
/* special case widths 1 and 2. */
|
|
|
|
switch (width)
|
|
|
|
{
|
|
|
|
case 1:
|
|
|
|
odd_lead = 1; /* odd_lead case writes pixels */
|
|
|
|
odd_trail = 0;
|
|
|
|
duff = 0; /* Squelch compiler warning. */
|
|
|
|
duff_end = ptr;
|
|
|
|
break;
|
|
|
|
case 2: /* Just read as long */
|
|
|
|
odd_lead = 0;
|
|
|
|
odd_trail = 0;
|
|
|
|
duff = 1;
|
|
|
|
duff_end = ptr + 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
odd_lead = x & 1;
|
|
|
|
|
|
|
|
if (odd_lead)
|
|
|
|
{
|
|
|
|
duff = width - 1;
|
|
|
|
odd_trail = duff & 1;
|
|
|
|
duff >>= 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
duff = width >> 1;
|
|
|
|
odd_trail = width & 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
duff_end = ptr + duff;
|
|
|
|
#ifndef BOOTLOADER
|
|
|
|
duff &= 7;
|
|
|
|
#endif
|
|
|
|
} /* end switch */
|
|
|
|
|
|
|
|
stride = LCD_WIDTH - width + odd_trail; /* See odd_trail below */
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
if (odd_lead)
|
|
|
|
{
|
|
|
|
/* Write odd start pixel. */
|
|
|
|
lcd_write_one(*(unsigned short *)ptr);
|
|
|
|
ptr = (unsigned long *)((short *)ptr + 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ptr < duff_end)
|
|
|
|
{
|
|
|
|
#ifdef BOOTLOADER
|
|
|
|
do
|
|
|
|
lcd_write_two(*ptr);
|
|
|
|
while (++ptr < duff_end);
|
|
|
|
#else
|
|
|
|
switch (duff)
|
|
|
|
{
|
|
|
|
do
|
|
|
|
{
|
|
|
|
case 0: lcd_write_two(*ptr++);
|
|
|
|
case 7: lcd_write_two(*ptr++);
|
|
|
|
case 6: lcd_write_two(*ptr++);
|
|
|
|
case 5: lcd_write_two(*ptr++);
|
|
|
|
case 4: lcd_write_two(*ptr++);
|
|
|
|
case 3: lcd_write_two(*ptr++);
|
|
|
|
case 2: lcd_write_two(*ptr++);
|
|
|
|
case 1: lcd_write_two(*ptr++);
|
|
|
|
}
|
|
|
|
while (ptr < duff_end);
|
|
|
|
} /* end switch */
|
|
|
|
#endif /* BOOTLOADER */
|
|
|
|
|
|
|
|
duff_end += LCD_WIDTH/2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (odd_trail)
|
|
|
|
{
|
|
|
|
/* Finish remaining odd pixel. */
|
|
|
|
lcd_write_one(*(unsigned short *)ptr);
|
|
|
|
/* Stride increased by one pixel. */
|
|
|
|
}
|
|
|
|
|
|
|
|
ptr = (unsigned long *)((short *)ptr + stride);
|
2006-02-23 15:22:08 +00:00
|
|
|
}
|
2006-07-31 23:00:13 +00:00
|
|
|
while (++y < y_end);
|
2006-02-23 15:22:08 +00:00
|
|
|
}
|