2007-04-11 23:54:34 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Jens Arnold
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2007-04-15 22:52:42 +00:00
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* Based on the work of Alan Korr and others
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2007-04-11 23:54:34 +00:00
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*
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2008-06-28 18:10:04 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2007-04-11 23:54:34 +00:00
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdio.h>
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#include "config.h"
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#include "system.h"
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#include "lcd.h"
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#include "font.h"
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#include "led.h"
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2009-06-06 00:00:58 +00:00
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const unsigned bit_n_table[32] = {
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1LU<< 0, 1LU<< 1, 1LU<< 2, 1LU<< 3,
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1LU<< 4, 1LU<< 5, 1LU<< 6, 1LU<< 7,
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1LU<< 8, 1LU<< 9, 1LU<<10, 1LU<<11,
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1LU<<12, 1LU<<13, 1LU<<14, 1LU<<15,
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1LU<<16, 1LU<<17, 1LU<<18, 1LU<<19,
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1LU<<20, 1LU<<21, 1LU<<22, 1LU<<23,
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1LU<<24, 1LU<<25, 1LU<<26, 1LU<<27,
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1LU<<28, 1LU<<29, 1LU<<30, 1LU<<31
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};
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2007-04-11 23:54:34 +00:00
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static const char* const irqname[] = {
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"", "", "", "", "IllInstr", "", "IllSltIn","","",
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"CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
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"","","","","","","","","","","","","","","","","","","",
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"Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
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"Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
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"Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
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"Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
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"Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
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"Dma0","","Dma1","","Dma2","","Dma3","",
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"IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
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"IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
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"IMIA4","IMIB4","OVI4","",
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"Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
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"Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
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"ParityEr","A/D conv","","","Watchdog","DRAMRefr"
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};
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#define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
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#define DEFAULT_INTERRUPT(name, number) "\t.weak\t_" #name \
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"\n\t.set\t_" #name ",_UIE" #number \
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"\n\t.long\t_" #name "\n"
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asm (
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/* Vector table.
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* Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
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* defined in an asm block -- silly.
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* Reset vectors (0..3) are handled in crt0.S */
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".section\t.vectors,\"aw\",@progbits\n"
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DEFAULT_INTERRUPT (GII, 4)
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RESERVE_INTERRUPT ( 5)
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DEFAULT_INTERRUPT (ISI, 6)
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RESERVE_INTERRUPT ( 7)
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RESERVE_INTERRUPT ( 8)
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DEFAULT_INTERRUPT (CPUAE, 9)
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DEFAULT_INTERRUPT (DMAAE, 10)
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DEFAULT_INTERRUPT (NMI, 11)
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DEFAULT_INTERRUPT (UB, 12)
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RESERVE_INTERRUPT ( 13)
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RESERVE_INTERRUPT ( 14)
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RESERVE_INTERRUPT ( 15)
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RESERVE_INTERRUPT ( 16) /* TCB #0 */
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RESERVE_INTERRUPT ( 17) /* TCB #1 */
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RESERVE_INTERRUPT ( 18) /* TCB #2 */
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RESERVE_INTERRUPT ( 19) /* TCB #3 */
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RESERVE_INTERRUPT ( 20) /* TCB #4 */
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RESERVE_INTERRUPT ( 21) /* TCB #5 */
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RESERVE_INTERRUPT ( 22) /* TCB #6 */
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RESERVE_INTERRUPT ( 23) /* TCB #7 */
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RESERVE_INTERRUPT ( 24) /* TCB #8 */
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RESERVE_INTERRUPT ( 25) /* TCB #9 */
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RESERVE_INTERRUPT ( 26) /* TCB #10 */
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RESERVE_INTERRUPT ( 27) /* TCB #11 */
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RESERVE_INTERRUPT ( 28) /* TCB #12 */
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RESERVE_INTERRUPT ( 29) /* TCB #13 */
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RESERVE_INTERRUPT ( 30) /* TCB #14 */
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RESERVE_INTERRUPT ( 31) /* TCB #15 */
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DEFAULT_INTERRUPT (TRAPA32, 32)
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DEFAULT_INTERRUPT (TRAPA33, 33)
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DEFAULT_INTERRUPT (TRAPA34, 34)
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DEFAULT_INTERRUPT (TRAPA35, 35)
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DEFAULT_INTERRUPT (TRAPA36, 36)
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DEFAULT_INTERRUPT (TRAPA37, 37)
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DEFAULT_INTERRUPT (TRAPA38, 38)
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DEFAULT_INTERRUPT (TRAPA39, 39)
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DEFAULT_INTERRUPT (TRAPA40, 40)
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DEFAULT_INTERRUPT (TRAPA41, 41)
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DEFAULT_INTERRUPT (TRAPA42, 42)
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DEFAULT_INTERRUPT (TRAPA43, 43)
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DEFAULT_INTERRUPT (TRAPA44, 44)
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DEFAULT_INTERRUPT (TRAPA45, 45)
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DEFAULT_INTERRUPT (TRAPA46, 46)
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DEFAULT_INTERRUPT (TRAPA47, 47)
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DEFAULT_INTERRUPT (TRAPA48, 48)
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DEFAULT_INTERRUPT (TRAPA49, 49)
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DEFAULT_INTERRUPT (TRAPA50, 50)
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DEFAULT_INTERRUPT (TRAPA51, 51)
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DEFAULT_INTERRUPT (TRAPA52, 52)
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DEFAULT_INTERRUPT (TRAPA53, 53)
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DEFAULT_INTERRUPT (TRAPA54, 54)
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DEFAULT_INTERRUPT (TRAPA55, 55)
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DEFAULT_INTERRUPT (TRAPA56, 56)
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DEFAULT_INTERRUPT (TRAPA57, 57)
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DEFAULT_INTERRUPT (TRAPA58, 58)
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DEFAULT_INTERRUPT (TRAPA59, 59)
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DEFAULT_INTERRUPT (TRAPA60, 60)
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DEFAULT_INTERRUPT (TRAPA61, 61)
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DEFAULT_INTERRUPT (TRAPA62, 62)
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DEFAULT_INTERRUPT (TRAPA63, 63)
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DEFAULT_INTERRUPT (IRQ0, 64)
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DEFAULT_INTERRUPT (IRQ1, 65)
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DEFAULT_INTERRUPT (IRQ2, 66)
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DEFAULT_INTERRUPT (IRQ3, 67)
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DEFAULT_INTERRUPT (IRQ4, 68)
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DEFAULT_INTERRUPT (IRQ5, 69)
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DEFAULT_INTERRUPT (IRQ6, 70)
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DEFAULT_INTERRUPT (IRQ7, 71)
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DEFAULT_INTERRUPT (DEI0, 72)
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RESERVE_INTERRUPT ( 73)
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DEFAULT_INTERRUPT (DEI1, 74)
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RESERVE_INTERRUPT ( 75)
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DEFAULT_INTERRUPT (DEI2, 76)
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RESERVE_INTERRUPT ( 77)
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DEFAULT_INTERRUPT (DEI3, 78)
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RESERVE_INTERRUPT ( 79)
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DEFAULT_INTERRUPT (IMIA0, 80)
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DEFAULT_INTERRUPT (IMIB0, 81)
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DEFAULT_INTERRUPT (OVI0, 82)
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RESERVE_INTERRUPT ( 83)
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DEFAULT_INTERRUPT (IMIA1, 84)
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DEFAULT_INTERRUPT (IMIB1, 85)
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DEFAULT_INTERRUPT (OVI1, 86)
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RESERVE_INTERRUPT ( 87)
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DEFAULT_INTERRUPT (IMIA2, 88)
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DEFAULT_INTERRUPT (IMIB2, 89)
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DEFAULT_INTERRUPT (OVI2, 90)
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RESERVE_INTERRUPT ( 91)
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DEFAULT_INTERRUPT (IMIA3, 92)
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DEFAULT_INTERRUPT (IMIB3, 93)
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DEFAULT_INTERRUPT (OVI3, 94)
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RESERVE_INTERRUPT ( 95)
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DEFAULT_INTERRUPT (IMIA4, 96)
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DEFAULT_INTERRUPT (IMIB4, 97)
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DEFAULT_INTERRUPT (OVI4, 98)
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RESERVE_INTERRUPT ( 99)
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DEFAULT_INTERRUPT (REI0, 100)
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DEFAULT_INTERRUPT (RXI0, 101)
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DEFAULT_INTERRUPT (TXI0, 102)
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DEFAULT_INTERRUPT (TEI0, 103)
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DEFAULT_INTERRUPT (REI1, 104)
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DEFAULT_INTERRUPT (RXI1, 105)
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DEFAULT_INTERRUPT (TXI1, 106)
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DEFAULT_INTERRUPT (TEI1, 107)
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RESERVE_INTERRUPT ( 108)
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DEFAULT_INTERRUPT (ADITI, 109)
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/* UIE# block.
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* Must go into the same section as the UIE() handler */
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"\t.text\n"
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"_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
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"_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
"_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
|
|
|
|
|
|
|
|
);
|
|
|
|
|
|
|
|
extern void UIE4(void); /* needed for calculating the UIE number */
|
|
|
|
|
|
|
|
void UIE (unsigned int pc) __attribute__((section(".text")));
|
|
|
|
void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
|
|
|
|
{
|
|
|
|
unsigned int n;
|
|
|
|
|
|
|
|
asm volatile ("sts\tpr,%0" : "=r"(n));
|
|
|
|
|
|
|
|
/* clear screen */
|
|
|
|
#ifdef HAVE_LCD_BITMAP
|
2009-11-14 11:27:41 +00:00
|
|
|
#if LCD_DEPTH > 1
|
|
|
|
lcd_set_backdrop(NULL);
|
|
|
|
lcd_set_drawmode(DRMODE_SOLID);
|
|
|
|
lcd_set_foreground(LCD_BLACK);
|
|
|
|
lcd_set_background(LCD_WHITE);
|
|
|
|
#endif
|
2007-04-11 23:54:34 +00:00
|
|
|
lcd_setfont(FONT_SYSFIXED);
|
2009-11-14 11:27:41 +00:00
|
|
|
lcd_set_viewport(NULL);
|
2007-04-11 23:54:34 +00:00
|
|
|
#endif
|
2009-11-14 11:27:41 +00:00
|
|
|
|
|
|
|
lcd_clear_display();
|
2007-04-11 23:54:34 +00:00
|
|
|
/* output exception */
|
|
|
|
n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
|
2009-10-17 18:02:48 +00:00
|
|
|
lcd_putsf(0, 0, "I%02x:%s", n, irqname[n]);
|
|
|
|
lcd_putsf(0, 1, "at %08x", pc);
|
|
|
|
lcd_update();
|
2007-04-11 23:54:34 +00:00
|
|
|
|
2009-01-08 10:15:32 +00:00
|
|
|
/* try to restart firmware if ON is pressed */
|
|
|
|
system_exception_wait();
|
2007-04-11 23:54:34 +00:00
|
|
|
|
2009-01-08 10:15:32 +00:00
|
|
|
/* enable the watchguard timer, but don't service it */
|
|
|
|
RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
|
|
|
|
TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
|
|
|
|
while (1);
|
2007-04-11 23:54:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void system_init(void)
|
|
|
|
{
|
|
|
|
/* Disable all interrupts */
|
|
|
|
IPRA = 0;
|
|
|
|
IPRB = 0;
|
|
|
|
IPRC = 0;
|
|
|
|
IPRD = 0;
|
|
|
|
IPRE = 0;
|
|
|
|
|
|
|
|
/* NMI level low, falling edge on all interrupts */
|
|
|
|
ICR = 0;
|
|
|
|
|
|
|
|
/* Enable burst and RAS down mode on DRAM */
|
|
|
|
DCR |= 0x5000;
|
|
|
|
|
|
|
|
/* Activate Warp mode (simultaneous internal and external mem access) */
|
|
|
|
BCR |= 0x2000;
|
|
|
|
|
|
|
|
/* Bus state controller initializations. These are only necessary when
|
|
|
|
running from flash. */
|
|
|
|
WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
|
|
|
|
WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
|
|
|
|
}
|
|
|
|
|
|
|
|
void system_reboot (void)
|
|
|
|
{
|
2008-03-26 01:50:41 +00:00
|
|
|
disable_irq();
|
2007-04-11 23:54:34 +00:00
|
|
|
|
|
|
|
asm volatile ("ldc\t%0,vbr" : : "r"(0));
|
|
|
|
|
|
|
|
PACR2 |= 0x4000; /* for coldstart detection */
|
|
|
|
IPRA = 0;
|
|
|
|
IPRB = 0;
|
|
|
|
IPRC = 0;
|
|
|
|
IPRD = 0;
|
|
|
|
IPRE = 0;
|
|
|
|
ICR = 0;
|
|
|
|
|
|
|
|
asm volatile ("jmp @%0; mov.l @%1,r15" : :
|
|
|
|
"r"(*(int*)0),"r"(4));
|
|
|
|
}
|
|
|
|
|
2009-01-08 10:15:32 +00:00
|
|
|
void system_exception_wait(void)
|
|
|
|
{
|
|
|
|
#if (CONFIG_LED == LED_REAL)
|
|
|
|
bool state = false;
|
|
|
|
int i = 0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
while (1)
|
|
|
|
{
|
|
|
|
#if (CONFIG_LED == LED_REAL)
|
|
|
|
if (--i <= 0)
|
|
|
|
{
|
|
|
|
state = !state;
|
|
|
|
led(state);
|
|
|
|
i = 240000;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if CONFIG_KEYPAD == PLAYER_PAD
|
|
|
|
/* Player */
|
|
|
|
if (!(PADRL & 0x20))
|
|
|
|
#elif CONFIG_KEYPAD == RECORDER_PAD
|
|
|
|
/* Recorder */
|
|
|
|
#ifdef HAVE_FMADC
|
|
|
|
if (!(PCDR & 0x0008))
|
|
|
|
#else
|
|
|
|
if (!(PBDRH & 0x01))
|
|
|
|
#endif
|
|
|
|
#elif CONFIG_KEYPAD == ONDIO_PAD
|
|
|
|
/* Ondio */
|
|
|
|
if (!(PCDR & 0x0008))
|
|
|
|
#endif /* CONFIG_KEYPAD */
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-04-11 23:54:34 +00:00
|
|
|
/* Utilise the user break controller to catch invalid memory accesses. */
|
|
|
|
int system_memory_guard(int newmode)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
unsigned long addr;
|
|
|
|
unsigned long mask;
|
|
|
|
unsigned short bbr;
|
|
|
|
} modes[MAXMEMGUARD] = {
|
|
|
|
/* catch nothing */
|
|
|
|
{ 0x00000000, 0x00000000, 0x0000 },
|
|
|
|
/* catch writes to area 02 (flash ROM) */
|
|
|
|
{ 0x02000000, 0x00FFFFFF, 0x00F8 },
|
|
|
|
/* catch all accesses to areas 00 (internal ROM) and 01 (free) */
|
|
|
|
{ 0x00000000, 0x01FFFFFF, 0x00FC }
|
|
|
|
};
|
|
|
|
|
|
|
|
int oldmode = MEMGUARD_NONE;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* figure out the old mode from what is in the UBC regs. If the register
|
|
|
|
values don't match any mode, assume MEMGUARD_NONE */
|
|
|
|
for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
|
|
|
|
{
|
|
|
|
if (BAR == modes[i].addr && BAMR == modes[i].mask &&
|
|
|
|
BBR == modes[i].bbr)
|
|
|
|
{
|
|
|
|
oldmode = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (newmode == MEMGUARD_KEEP)
|
|
|
|
newmode = oldmode;
|
|
|
|
|
|
|
|
BBR = 0; /* switch off everything first */
|
|
|
|
|
|
|
|
/* always set the UBC according to the mode, in case the old settings
|
|
|
|
didn't match any valid mode */
|
|
|
|
BAR = modes[newmode].addr;
|
|
|
|
BAMR = modes[newmode].mask;
|
|
|
|
BBR = modes[newmode].bbr;
|
|
|
|
|
|
|
|
return oldmode;
|
|
|
|
}
|