182 lines
5 KiB
C
182 lines
5 KiB
C
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: $
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*
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* Copyright (C) 2007 by Karl Kurbjun
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "kernel.h"
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#include "system.h"
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#include "panic.h"
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#define default_interrupt(name) \
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extern __attribute__((weak,alias("UIRQ"))) void name (void)
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default_interrupt(TIMER0);
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default_interrupt(TIMER1);
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default_interrupt(TIMER2);
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default_interrupt(TIMER3);
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default_interrupt(CCD_VD0);
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default_interrupt(CCD_VD1);
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default_interrupt(CCD_WEN);
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default_interrupt(VENC);
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default_interrupt(SERIAL0);
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default_interrupt(SERIAL1);
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default_interrupt(EXT_HOST);
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default_interrupt(DSPHINT);
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default_interrupt(UART0);
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default_interrupt(UART1);
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default_interrupt(USB_DMA);
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default_interrupt(USB_CORE);
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default_interrupt(VLYNQ);
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default_interrupt(MTC0);
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default_interrupt(MTC1);
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default_interrupt(SD_MMC);
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default_interrupt(SDIO_MS);
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default_interrupt(GIO0);
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default_interrupt(GIO1);
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default_interrupt(GIO2);
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default_interrupt(GIO3);
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default_interrupt(GIO4);
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default_interrupt(GIO5);
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default_interrupt(GIO6);
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default_interrupt(GIO7);
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default_interrupt(GIO8);
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default_interrupt(GIO9);
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default_interrupt(GIO10);
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default_interrupt(GIO11);
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default_interrupt(GIO12);
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default_interrupt(GIO13);
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default_interrupt(GIO14);
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default_interrupt(GIO15);
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default_interrupt(PREVIEW0);
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default_interrupt(PREVIEW1);
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default_interrupt(WATCHDOG);
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default_interrupt(I2C);
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default_interrupt(CLKC);
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default_interrupt(ICE);
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default_interrupt(ARMCOM_RX);
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default_interrupt(ARMCOM_TX);
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default_interrupt(RESERVED);
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static void (* const irqvector[])(void) =
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{
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TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1,
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CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT,
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UART0,UART1,USB_DMA,USB_CORE,VLYNQ,MTC0,MTC1,
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SD_MMC,SDIO_MS,GIO0,GIO1,GIO2,GIO3,GIO4,GIO5,
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GIO6,GIO7,GIO8,GIO9,GIO10,GIO11,GIO12,GIO13,
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GIO14,GIO15,PREVIEW0,PREVIEW1,WATCHDOG,I2C,CLKC,
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ICE,ARMCOM_RX,ARMCOM_TX,RESERVED
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};
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static const char * const irqname[] =
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{
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"TIMER0","TIMER1","TIMER2","TIMER3","CCD_VD0","CCD_VD1",
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"CCD_WEN","VENC","SERIAL0","SERIAL1","EXT_HOST","DSPHINT",
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"UART0","UART1","USB_DMA","USB_CORE","VLYNQ","MTC0","MTC1",
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"SD_MMC","SDIO_MS","GIO0","GIO1","GIO2","GIO3","GIO4","GIO5",
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"GIO6","GIO7","GIO8","GIO9","GIO10","GIO11","GIO12","GIO13",
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"GIO14","GIO15","PREVIEW0","PREVIEW1","WATCHDOG","I2C","CLKC",
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"ICE","ARMCOM_RX","ARMCOM_TX","RESERVED"
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};
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static void UIRQ(void)
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{
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unsigned int offset = inw(IO_INTC_IRQENTRY0);
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panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
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}
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void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
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void irq_handler(void)
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{
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/*
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* Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
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*/
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asm volatile (
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"sub lr, lr, #4 \r\n"
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"stmfd sp!, {r0-r3, ip, lr} \r\n"
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"mov r0, #0x00030000 \r\n"
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"ldr r0, [r0, #0x518] \r\n"
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"ldr r1, =irqvector \r\n"
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"ldr r1, [r1, r0, lsl #2] \r\n"
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"mov lr, pc \r\n"
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"bx r1 \r\n"
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"ldmfd sp!, {r0-r3, ip, pc}^ \r\n"
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);
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}
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void system_reboot(void)
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{
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}
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void system_init(void)
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{
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/* taken from linux/arch/arm/mach-itdm320-20/irq.c */
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/* Clearing all FIQs and IRQs. */
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outw(0xFFFF, IO_INTC_IRQ0);
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outw(0xFFFF, IO_INTC_IRQ1);
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outw(0xFFFF, IO_INTC_IRQ2);
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outw(0xFFFF, IO_INTC_FIQ0);
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outw(0xFFFF, IO_INTC_FIQ1);
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outw(0xFFFF, IO_INTC_FIQ2);
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/* Masking all Interrupts. */
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outw(0, IO_INTC_EINT0);
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outw(0, IO_INTC_EINT1);
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outw(0, IO_INTC_EINT2);
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/* Setting INTC to all IRQs. */
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outw(0, IO_INTC_FISEL0);
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outw(0, IO_INTC_FISEL1);
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outw(0, IO_INTC_FISEL2);
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}
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int system_memory_guard(int newmode)
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{
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(void)newmode;
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return 0;
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}
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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void set_cpu_frequency(long frequency)
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{
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if (frequency == CPUFREQ_MAX)
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{
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asm volatile("mov r0, #0\n"
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"mrc p15, 0, r0, c1, c0, 0\n"
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"orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/
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"mcr p15, 0, r0, c1, c0, 0" : : : "r0");
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FREQ = CPUFREQ_MAX;
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}
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else
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{
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asm volatile("mov r0, #0\n"
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"mrc p15, 0, r0, c1, c0, 0\n"
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"bic r0, r0, #3<<30\n" /* set to FastBus mode*/
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"mcr p15, 0, r0, c1, c0, 0" : : : "r0");
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FREQ = CPUFREQ_NORMAL;
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}
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}
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#endif
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