2014-09-23 11:30:17 +00:00
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#include "config.h"
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ENTRY(main)
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OUTPUT_ARCH(mips)
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STARTUP(atj213x/crt0.o)
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MEMORY
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{
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DRAM : ORIGIN = DRAM_ORIG, LENGTH = DRAM_SIZE
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IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
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}
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SECTIONS
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{
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.init.text :
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{
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relocstart = .;
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oc_codestart = .;
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2014-09-20 12:29:12 +00:00
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KEEP(*(.init.text*))
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2014-09-23 11:30:17 +00:00
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} > IRAM
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2014-09-20 12:29:12 +00:00
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.icode :
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2014-09-23 11:30:17 +00:00
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{
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*(.icode*)
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2014-09-20 12:29:12 +00:00
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} > IRAM
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2014-09-23 11:30:17 +00:00
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.data :
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{
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*(.rodata*)
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*(.data*)
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*(.rel.dyn)
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2014-09-20 12:29:12 +00:00
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} > IRAM
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.bss (NOLOAD) :
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{
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bssbegin = .;
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*(.sbss*)
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*(.bss*)
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*(COMMON)
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*(.scommon*)
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. = ALIGN(4);
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bssend = .;
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} > IRAM
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.exception.tlb_refill (IRAM_ORIG + 0x1000) :
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{
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_irqbase = .;
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KEEP(*(.exception.tlb_refill))
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} > IRAM
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.exception.cache_error (IRAM_ORIG + 0x1100) :
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{
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KEEP(*(.exception.cache_error))
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} > IRAM
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.exception.general_exception (IRAM_ORIG + 0x1180) :
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{
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KEEP(*(.exception.general_exception))
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} > IRAM
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.exception.irq (IRAM_ORIG + 0x1200) :
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{
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KEEP(*(.exception.irq))
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} > IRAM
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.text :
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{
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*(.text*)
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. = ALIGN(16);
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2014-09-23 11:30:17 +00:00
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relocend = .;
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} > IRAM
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.stack (NOLOAD) :
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{
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. = ALIGN(4);
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stackbegin = .;
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2014-09-20 12:29:12 +00:00
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oc_codeend = .;
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2014-09-23 11:30:17 +00:00
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oc_stackstart = .;
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. += 0x2000;
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stackend = .;
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2014-09-20 12:29:12 +00:00
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2014-09-23 11:30:17 +00:00
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irqstackbegin = .;
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. += 0x400;
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irqstackend = .;
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oc_stackend = .;
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oc_bufferstart = .;
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2014-09-20 12:29:12 +00:00
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} > IRAM
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2014-09-23 11:30:17 +00:00
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.end IRAM_ORIG+IRAM_SIZE (NOLOAD) :
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{
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oc_bufferend = .;
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} > IRAM
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}
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