2008-06-27 23:24:34 +00:00
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#include "config.h"
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2009-10-02 23:45:53 +00:00
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ENTRY(start)
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2009-07-12 22:16:51 +00:00
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#ifdef ROCKBOX_LITTLE_ENDIAN
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OUTPUT_FORMAT(elf32-littlearm)
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#else
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2008-10-05 19:52:48 +00:00
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OUTPUT_FORMAT(elf32-bigarm)
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2009-07-12 22:16:51 +00:00
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#endif
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2008-06-27 23:24:34 +00:00
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OUTPUT_ARCH(arm)
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2008-10-18 22:28:59 +00:00
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STARTUP(target/arm/s5l8700/crt0.o)
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2008-06-27 23:24:34 +00:00
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2009-07-25 00:49:13 +00:00
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#define DRAMORIG 0x08000000
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#define DRAMSIZE (MEMORYSIZE * 0x100000)
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2008-09-18 18:20:51 +00:00
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2009-10-12 19:46:45 +00:00
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#define IRAMORIG 0x22000000
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2009-07-25 00:49:13 +00:00
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#if CONFIG_CPU==S5L8701
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#define IRAMSIZE 176K
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#else
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2008-06-27 23:24:34 +00:00
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#define IRAMSIZE 256K
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2009-07-25 00:49:13 +00:00
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#endif
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2008-06-27 23:24:34 +00:00
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2008-09-18 18:20:51 +00:00
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#ifdef MEIZU_M6SL
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#define DFULOADADDR IRAMORIG
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#else
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#define DFULOADADDR (IRAMORIG+0x20000)
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#endif
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2008-06-27 23:24:34 +00:00
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/* This is not available in all versions of the S5L8700 */
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#define FLASHORIG 0x24000000
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#define FLASHSIZE 1M
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2008-10-18 22:28:59 +00:00
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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FLASH : ORIGIN = FLASHORIG, LENGTH = FLASHSIZE
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}
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2009-07-12 22:16:51 +00:00
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#ifdef IPOD_NANO2G
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#define LOAD_AREA IRAM
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#else
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#define LOAD_AREA FLASH
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#endif
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2008-10-18 22:28:59 +00:00
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2008-06-27 23:24:34 +00:00
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SECTIONS
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{
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2008-10-18 22:28:59 +00:00
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.intvect : {
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_intvectstart = . ;
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*(.intvect)
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_intvectend = _newstart ;
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2009-07-12 22:16:51 +00:00
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} >IRAM AT> LOAD_AREA
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2008-10-18 22:28:59 +00:00
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_intvectcopy = LOADADDR(.intvect) ;
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2008-06-27 23:24:34 +00:00
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.text : {
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*(.init.text)
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*(.text*)
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2008-10-18 22:28:59 +00:00
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*(.glue_7*)
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2009-07-12 22:16:51 +00:00
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} > LOAD_AREA
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2008-10-18 22:28:59 +00:00
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.rodata : {
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*(.rodata*)
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. = ALIGN(0x4);
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2009-07-12 22:16:51 +00:00
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} > LOAD_AREA
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2008-06-27 23:24:34 +00:00
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.data : {
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2008-10-18 22:28:59 +00:00
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_datastart = . ;
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2008-06-27 23:24:34 +00:00
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*(.irodata)
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2008-10-18 22:28:59 +00:00
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*(.icode)
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2008-06-27 23:24:34 +00:00
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*(.idata)
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*(.data*)
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*(.ncdata*);
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2008-10-18 22:28:59 +00:00
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. = ALIGN(0x4);
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2008-06-27 23:24:34 +00:00
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_dataend = . ;
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2009-07-12 22:16:51 +00:00
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} > IRAM AT> LOAD_AREA
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2008-10-18 22:28:59 +00:00
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_datacopy = LOADADDR(.data) ;
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2008-06-27 23:24:34 +00:00
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.stack :
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{
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*(.stack)
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_stackbegin = .;
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2009-07-05 19:09:14 +00:00
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stackbegin = .;
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2008-10-18 22:28:59 +00:00
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. += 0x2000;
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2008-06-27 23:24:34 +00:00
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_stackend = .;
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2009-07-05 19:09:14 +00:00
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stackend = .;
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2008-10-18 22:28:59 +00:00
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_irqstackbegin = .;
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. += 0x400;
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_irqstackend = .;
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_fiqstackbegin = .;
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. += 0x400;
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_fiqstackend = .;
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} > IRAM
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2008-06-27 23:24:34 +00:00
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2009-10-25 13:52:46 +00:00
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. = DRAMORIG;
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#ifdef IPOD_NANO2G
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2009-10-11 01:37:12 +00:00
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/* The bss section is too large for IRAM - we just move it 12MB into the
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DRAM */
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2009-10-25 14:03:43 +00:00
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. += (12*1024*1024);
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2009-10-25 13:52:46 +00:00
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#endif
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2009-10-25 14:03:43 +00:00
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.bss : {
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2008-06-27 23:24:34 +00:00
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_edata = .;
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*(.bss*);
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*(.ibss);
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*(.ncbss*);
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2008-10-18 22:28:59 +00:00
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*(COMMON);
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. = ALIGN(0x4);
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2008-06-27 23:24:34 +00:00
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_end = .;
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2009-11-06 22:47:09 +00:00
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#if defined(IPOD_NANO2G) || defined(MEIZU_M6SP)
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2009-10-11 01:37:12 +00:00
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} > DRAM
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2009-10-25 13:52:46 +00:00
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#else /* other targets don't have DRAM set up yet */
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} > IRAM
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#endif
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2008-06-27 23:24:34 +00:00
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}
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