rockbox/firmware/target/arm/imx233/regs/stmp3700/regs-usbctrl.h

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/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* This file was automatically generated by headergen, DO NOT EDIT it.
* headergen version: 2.1.7
* XML versions: stmp3700:3.2.0
*
* Copyright (C) 2013 by Amaury Pouly
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef __HEADERGEN__STMP3700__USBCTRL__H__
#define __HEADERGEN__STMP3700__USBCTRL__H__
#define REGS_USBCTRL_BASE (0x80080000)
#define REGS_USBCTRL_VERSION "3.2.0"
/**
* Register: HW_USBCTRL_ID
* Address: 0
* SCT: no
*/
#define HW_USBCTRL_ID (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x0))
#define BP_USBCTRL_ID_REV 16
#define BM_USBCTRL_ID_REV 0xff0000
#define BF_USBCTRL_ID_REV(v) (((v) << 16) & 0xff0000)
#define BP_USBCTRL_ID_ID_N 8
#define BM_USBCTRL_ID_ID_N 0xff00
#define BF_USBCTRL_ID_ID_N(v) (((v) << 8) & 0xff00)
#define BP_USBCTRL_ID_ID 0
#define BM_USBCTRL_ID_ID 0xff
#define BF_USBCTRL_ID_ID(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_GENERAL
* Address: 0x4
* SCT: no
*/
#define HW_USBCTRL_GENERAL (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x4))
#define BP_USBCTRL_GENERAL_SM 9
#define BM_USBCTRL_GENERAL_SM 0x200
#define BF_USBCTRL_GENERAL_SM(v) (((v) << 9) & 0x200)
#define BP_USBCTRL_GENERAL_PHYM 6
#define BM_USBCTRL_GENERAL_PHYM 0x1c0
#define BF_USBCTRL_GENERAL_PHYM(v) (((v) << 6) & 0x1c0)
#define BP_USBCTRL_GENERAL_PHYW 4
#define BM_USBCTRL_GENERAL_PHYW 0x30
#define BF_USBCTRL_GENERAL_PHYW(v) (((v) << 4) & 0x30)
#define BP_USBCTRL_GENERAL_BWT 3
#define BM_USBCTRL_GENERAL_BWT 0x8
#define BF_USBCTRL_GENERAL_BWT(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_GENERAL_CLKC 1
#define BM_USBCTRL_GENERAL_CLKC 0x6
#define BF_USBCTRL_GENERAL_CLKC(v) (((v) << 1) & 0x6)
#define BP_USBCTRL_GENERAL_RT 0
#define BM_USBCTRL_GENERAL_RT 0x1
#define BF_USBCTRL_GENERAL_RT(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_HOST
* Address: 0x8
* SCT: no
*/
#define HW_USBCTRL_HOST (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x8))
#define BP_USBCTRL_HOST_TTPER 24
#define BM_USBCTRL_HOST_TTPER 0xff000000
#define BF_USBCTRL_HOST_TTPER(v) (((v) << 24) & 0xff000000)
#define BP_USBCTRL_HOST_TTASY 16
#define BM_USBCTRL_HOST_TTASY 0xff0000
#define BF_USBCTRL_HOST_TTASY(v) (((v) << 16) & 0xff0000)
#define BP_USBCTRL_HOST_NPORT 1
#define BM_USBCTRL_HOST_NPORT 0xe
#define BF_USBCTRL_HOST_NPORT(v) (((v) << 1) & 0xe)
#define BP_USBCTRL_HOST_HC 0
#define BM_USBCTRL_HOST_HC 0x1
#define BF_USBCTRL_HOST_HC(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_DEVICE
* Address: 0xc
* SCT: no
*/
#define HW_USBCTRL_DEVICE (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0xc))
#define BP_USBCTRL_DEVICE_DEVEP 1
#define BM_USBCTRL_DEVICE_DEVEP 0x3e
#define BF_USBCTRL_DEVICE_DEVEP(v) (((v) << 1) & 0x3e)
#define BP_USBCTRL_DEVICE_DC 0
#define BM_USBCTRL_DEVICE_DC 0x1
#define BF_USBCTRL_DEVICE_DC(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_TXBUF
* Address: 0x10
* SCT: no
*/
#define HW_USBCTRL_TXBUF (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x10))
#define BP_USBCTRL_TXBUF_TXLCR 31
#define BM_USBCTRL_TXBUF_TXLCR 0x80000000
#define BF_USBCTRL_TXBUF_TXLCR(v) (((v) << 31) & 0x80000000)
#define BP_USBCTRL_TXBUF_TXCHANADD 16
#define BM_USBCTRL_TXBUF_TXCHANADD 0xff0000
#define BF_USBCTRL_TXBUF_TXCHANADD(v) (((v) << 16) & 0xff0000)
#define BP_USBCTRL_TXBUF_TXADD 8
#define BM_USBCTRL_TXBUF_TXADD 0xff00
#define BF_USBCTRL_TXBUF_TXADD(v) (((v) << 8) & 0xff00)
#define BP_USBCTRL_TXBUF_TXBURST 0
#define BM_USBCTRL_TXBUF_TXBURST 0xff
#define BF_USBCTRL_TXBUF_TXBURST(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_RXBUF
* Address: 0x14
* SCT: no
*/
#define HW_USBCTRL_RXBUF (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x14))
#define BP_USBCTRL_RXBUF_RXADD 8
#define BM_USBCTRL_RXBUF_RXADD 0xff00
#define BF_USBCTRL_RXBUF_RXADD(v) (((v) << 8) & 0xff00)
#define BP_USBCTRL_RXBUF_RXBURST 0
#define BM_USBCTRL_RXBUF_RXBURST 0xff
#define BF_USBCTRL_RXBUF_RXBURST(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_TTTXBUF
* Address: 0x18
* SCT: no
*/
#define HW_USBCTRL_TTTXBUF (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x18))
#define BP_USBCTRL_TTTXBUF_TTTXBUF 0
#define BM_USBCTRL_TTTXBUF_TTTXBUF 0xffffffff
#define BF_USBCTRL_TTTXBUF_TTTXBUF(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_USBCTRL_TTRXBUF
* Address: 0x1c
* SCT: no
*/
#define HW_USBCTRL_TTRXBUF (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1c))
#define BP_USBCTRL_TTRXBUF_TTRXBUF 0
#define BM_USBCTRL_TTRXBUF_TTRXBUF 0xffffffff
#define BF_USBCTRL_TTRXBUF_TTRXBUF(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_USBCTRL_CAPLENGTH
* Address: 0x100
* SCT: no
*/
#define HW_USBCTRL_CAPLENGTH (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x100))
#define BP_USBCTRL_CAPLENGTH_HCIVER 16
#define BM_USBCTRL_CAPLENGTH_HCIVER 0xffff0000
#define BF_USBCTRL_CAPLENGTH_HCIVER(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_CAPLENGTH_LENGTH 0
#define BM_USBCTRL_CAPLENGTH_LENGTH 0xff
#define BF_USBCTRL_CAPLENGTH_LENGTH(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_HCSPARAMS
* Address: 0x104
* SCT: no
*/
#define HW_USBCTRL_HCSPARAMS (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x104))
#define BP_USBCTRL_HCSPARAMS_NPORTS 0
#define BM_USBCTRL_HCSPARAMS_NPORTS 0xf
#define BF_USBCTRL_HCSPARAMS_NPORTS(v) (((v) << 0) & 0xf)
#define BP_USBCTRL_HCSPARAMS_PPC 4
#define BM_USBCTRL_HCSPARAMS_PPC 0x10
#define BF_USBCTRL_HCSPARAMS_PPC(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_HCSPARAMS_NPCC 8
#define BM_USBCTRL_HCSPARAMS_NPCC 0xf00
#define BF_USBCTRL_HCSPARAMS_NPCC(v) (((v) << 8) & 0xf00)
#define BP_USBCTRL_HCSPARAMS_NCC 12
#define BM_USBCTRL_HCSPARAMS_NCC 0xf000
#define BF_USBCTRL_HCSPARAMS_NCC(v) (((v) << 12) & 0xf000)
#define BP_USBCTRL_HCSPARAMS_PI 16
#define BM_USBCTRL_HCSPARAMS_PI 0x10000
#define BF_USBCTRL_HCSPARAMS_PI(v) (((v) << 16) & 0x10000)
#define BP_USBCTRL_HCSPARAMS_NPTT 20
#define BM_USBCTRL_HCSPARAMS_NPTT 0xf00000
#define BF_USBCTRL_HCSPARAMS_NPTT(v) (((v) << 20) & 0xf00000)
#define BP_USBCTRL_HCSPARAMS_NTT 24
#define BM_USBCTRL_HCSPARAMS_NTT 0xf000000
#define BF_USBCTRL_HCSPARAMS_NTT(v) (((v) << 24) & 0xf000000)
/**
* Register: HW_USBCTRL_HCCPARAMS
* Address: 0x108
* SCT: no
*/
#define HW_USBCTRL_HCCPARAMS (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x108))
#define BP_USBCTRL_HCCPARAMS_ADDR64BITCAP 0
#define BM_USBCTRL_HCCPARAMS_ADDR64BITCAP 0x1
#define BF_USBCTRL_HCCPARAMS_ADDR64BITCAP(v) (((v) << 0) & 0x1)
#define BP_USBCTRL_HCCPARAMS_PGM_FRM_LIST_FLAG 1
#define BM_USBCTRL_HCCPARAMS_PGM_FRM_LIST_FLAG 0x2
#define BF_USBCTRL_HCCPARAMS_PGM_FRM_LIST_FLAG(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_HCCPARAMS_ASYNC_PARK_CAP 2
#define BM_USBCTRL_HCCPARAMS_ASYNC_PARK_CAP 0x4
#define BF_USBCTRL_HCCPARAMS_ASYNC_PARK_CAP(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_HCCPARAMS_ISO_SCH_THRESHOLD 8
#define BM_USBCTRL_HCCPARAMS_ISO_SCH_THRESHOLD 0xff00
#define BF_USBCTRL_HCCPARAMS_ISO_SCH_THRESHOLD(v) (((v) << 8) & 0xff00)
/**
* Register: HW_USBCTRL_DCIVERSION
* Address: 0x120
* SCT: no
*/
#define HW_USBCTRL_DCIVERSION (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x120))
#define BP_USBCTRL_DCIVERSION_DCIVER 0
#define BM_USBCTRL_DCIVERSION_DCIVER 0xffff
#define BF_USBCTRL_DCIVERSION_DCIVER(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_DCCPARAMS
* Address: 0x124
* SCT: no
*/
#define HW_USBCTRL_DCCPARAMS (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x124))
#define BP_USBCTRL_DCCPARAMS_HC 8
#define BM_USBCTRL_DCCPARAMS_HC 0x100
#define BF_USBCTRL_DCCPARAMS_HC(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_DCCPARAMS_DC 7
#define BM_USBCTRL_DCCPARAMS_DC 0x80
#define BF_USBCTRL_DCCPARAMS_DC(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_DCCPARAMS_DEN 0
#define BM_USBCTRL_DCCPARAMS_DEN 0x1f
#define BF_USBCTRL_DCCPARAMS_DEN(v) (((v) << 0) & 0x1f)
/**
* Register: HW_USBCTRL_USBCMD
* Address: 0x140
* SCT: no
*/
#define HW_USBCTRL_USBCMD (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x140))
#define BP_USBCTRL_USBCMD_RS 0
#define BM_USBCTRL_USBCMD_RS 0x1
#define BF_USBCTRL_USBCMD_RS(v) (((v) << 0) & 0x1)
#define BP_USBCTRL_USBCMD_RST 1
#define BM_USBCTRL_USBCMD_RST 0x2
#define BF_USBCTRL_USBCMD_RST(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_USBCMD_FS0 2
#define BM_USBCTRL_USBCMD_FS0 0x4
#define BF_USBCTRL_USBCMD_FS0(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_USBCMD_FS1 3
#define BM_USBCTRL_USBCMD_FS1 0x8
#define BF_USBCTRL_USBCMD_FS1(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_USBCMD_PSE 4
#define BM_USBCTRL_USBCMD_PSE 0x10
#define BF_USBCTRL_USBCMD_PSE(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_USBCMD_ASE 5
#define BM_USBCTRL_USBCMD_ASE 0x20
#define BF_USBCTRL_USBCMD_ASE(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_USBCMD_IAA 6
#define BM_USBCTRL_USBCMD_IAA 0x40
#define BF_USBCTRL_USBCMD_IAA(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_USBCMD_LR 7
#define BM_USBCTRL_USBCMD_LR 0x80
#define BF_USBCTRL_USBCMD_LR(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_USBCMD_ASP0 8
#define BM_USBCTRL_USBCMD_ASP0 0x100
#define BF_USBCTRL_USBCMD_ASP0(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_USBCMD_ASP1 9
#define BM_USBCTRL_USBCMD_ASP1 0x200
#define BF_USBCTRL_USBCMD_ASP1(v) (((v) << 9) & 0x200)
#define BP_USBCTRL_USBCMD_ASPE 11
#define BM_USBCTRL_USBCMD_ASPE 0x800
#define BF_USBCTRL_USBCMD_ASPE(v) (((v) << 11) & 0x800)
#define BP_USBCTRL_USBCMD_FS2 15
#define BM_USBCTRL_USBCMD_FS2 0x8000
#define BF_USBCTRL_USBCMD_FS2(v) (((v) << 15) & 0x8000)
#define BP_USBCTRL_USBCMD_ITC 16
#define BM_USBCTRL_USBCMD_ITC 0xff0000
#define BF_USBCTRL_USBCMD_ITC(v) (((v) << 16) & 0xff0000)
/**
* Register: HW_USBCTRL_USBSTS
* Address: 0x144
* SCT: no
*/
#define HW_USBCTRL_USBSTS (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x144))
#define BP_USBCTRL_USBSTS_UI 0
#define BM_USBCTRL_USBSTS_UI 0x1
#define BF_USBCTRL_USBSTS_UI(v) (((v) << 0) & 0x1)
#define BP_USBCTRL_USBSTS_UEI 1
#define BM_USBCTRL_USBSTS_UEI 0x2
#define BF_USBCTRL_USBSTS_UEI(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_USBSTS_PCI 2
#define BM_USBCTRL_USBSTS_PCI 0x4
#define BF_USBCTRL_USBSTS_PCI(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_USBSTS_FRI 3
#define BM_USBCTRL_USBSTS_FRI 0x8
#define BF_USBCTRL_USBSTS_FRI(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_USBSTS_SEI 4
#define BM_USBCTRL_USBSTS_SEI 0x10
#define BF_USBCTRL_USBSTS_SEI(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_USBSTS_AAI 5
#define BM_USBCTRL_USBSTS_AAI 0x20
#define BF_USBCTRL_USBSTS_AAI(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_USBSTS_URI 6
#define BM_USBCTRL_USBSTS_URI 0x40
#define BF_USBCTRL_USBSTS_URI(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_USBSTS_SRI 7
#define BM_USBCTRL_USBSTS_SRI 0x80
#define BF_USBCTRL_USBSTS_SRI(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_USBSTS_SLI 8
#define BM_USBCTRL_USBSTS_SLI 0x100
#define BF_USBCTRL_USBSTS_SLI(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_USBSTS_ULPII 10
#define BM_USBCTRL_USBSTS_ULPII 0x400
#define BF_USBCTRL_USBSTS_ULPII(v) (((v) << 10) & 0x400)
#define BP_USBCTRL_USBSTS_HCH 12
#define BM_USBCTRL_USBSTS_HCH 0x1000
#define BF_USBCTRL_USBSTS_HCH(v) (((v) << 12) & 0x1000)
#define BP_USBCTRL_USBSTS_RCL 13
#define BM_USBCTRL_USBSTS_RCL 0x2000
#define BF_USBCTRL_USBSTS_RCL(v) (((v) << 13) & 0x2000)
#define BP_USBCTRL_USBSTS_PS 14
#define BM_USBCTRL_USBSTS_PS 0x4000
#define BF_USBCTRL_USBSTS_PS(v) (((v) << 14) & 0x4000)
#define BP_USBCTRL_USBSTS_AS 15
#define BM_USBCTRL_USBSTS_AS 0x8000
#define BF_USBCTRL_USBSTS_AS(v) (((v) << 15) & 0x8000)
#define BP_USBCTRL_USBSTS_NAKI 16
#define BM_USBCTRL_USBSTS_NAKI 0x10000
#define BF_USBCTRL_USBSTS_NAKI(v) (((v) << 16) & 0x10000)
/**
* Register: HW_USBCTRL_USBINTR
* Address: 0x148
* SCT: no
*/
#define HW_USBCTRL_USBINTR (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x148))
#define BP_USBCTRL_USBINTR_UE 0
#define BM_USBCTRL_USBINTR_UE 0x1
#define BF_USBCTRL_USBINTR_UE(v) (((v) << 0) & 0x1)
#define BP_USBCTRL_USBINTR_UEE 1
#define BM_USBCTRL_USBINTR_UEE 0x2
#define BF_USBCTRL_USBINTR_UEE(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_USBINTR_PCE 2
#define BM_USBCTRL_USBINTR_PCE 0x4
#define BF_USBCTRL_USBINTR_PCE(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_USBINTR_FRE 3
#define BM_USBCTRL_USBINTR_FRE 0x8
#define BF_USBCTRL_USBINTR_FRE(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_USBINTR_SEE 4
#define BM_USBCTRL_USBINTR_SEE 0x10
#define BF_USBCTRL_USBINTR_SEE(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_USBINTR_AAE 5
#define BM_USBCTRL_USBINTR_AAE 0x20
#define BF_USBCTRL_USBINTR_AAE(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_USBINTR_URE 6
#define BM_USBCTRL_USBINTR_URE 0x40
#define BF_USBCTRL_USBINTR_URE(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_USBINTR_SRE 7
#define BM_USBCTRL_USBINTR_SRE 0x80
#define BF_USBCTRL_USBINTR_SRE(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_USBINTR_SLE 8
#define BM_USBCTRL_USBINTR_SLE 0x100
#define BF_USBCTRL_USBINTR_SLE(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_USBINTR_ULPIE 10
#define BM_USBCTRL_USBINTR_ULPIE 0x400
#define BF_USBCTRL_USBINTR_ULPIE(v) (((v) << 10) & 0x400)
#define BP_USBCTRL_USBINTR_NAKE 16
#define BM_USBCTRL_USBINTR_NAKE 0x10000
#define BF_USBCTRL_USBINTR_NAKE(v) (((v) << 16) & 0x10000)
/**
* Register: HW_USBCTRL_FRINDEX
* Address: 0x14c
* SCT: no
*/
#define HW_USBCTRL_FRINDEX (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x14c))
#define BP_USBCTRL_FRINDEX_LISTINDEX 3
#define BM_USBCTRL_FRINDEX_LISTINDEX 0x3ff8
#define BF_USBCTRL_FRINDEX_LISTINDEX(v) (((v) << 3) & 0x3ff8)
#define BP_USBCTRL_FRINDEX_UINDEX 0
#define BM_USBCTRL_FRINDEX_UINDEX 0x7
#define BF_USBCTRL_FRINDEX_UINDEX(v) (((v) << 0) & 0x7)
/**
* Register: HW_USBCTRL_CTRLDSSEGMENT
* Address: 0x150
* SCT: no
*/
#define HW_USBCTRL_CTRLDSSEGMENT (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x150))
#define BP_USBCTRL_CTRLDSSEGMENT_EMPTY 0
#define BM_USBCTRL_CTRLDSSEGMENT_EMPTY 0xffffffff
#define BF_USBCTRL_CTRLDSSEGMENT_EMPTY(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_USBCTRL_PERIODICLISTBASE
* Address: 0x154
* SCT: no
*/
#define HW_USBCTRL_PERIODICLISTBASE (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x154))
#define BP_USBCTRL_PERIODICLISTBASE_BASEADDR 12
#define BM_USBCTRL_PERIODICLISTBASE_BASEADDR 0xfffff000
#define BF_USBCTRL_PERIODICLISTBASE_BASEADDR(v) (((v) << 12) & 0xfffff000)
/**
* Register: HW_USBCTRL_ASYNCLISTADDR
* Address: 0x158
* SCT: no
*/
#define HW_USBCTRL_ASYNCLISTADDR (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x158))
#define BP_USBCTRL_ASYNCLISTADDR_ASYBASE 5
#define BM_USBCTRL_ASYNCLISTADDR_ASYBASE 0xffffffe0
#define BF_USBCTRL_ASYNCLISTADDR_ASYBASE(v) (((v) << 5) & 0xffffffe0)
/**
* Register: HW_USBCTRL_TTCTRL
* Address: 0x15c
* SCT: no
*/
#define HW_USBCTRL_TTCTRL (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x15c))
#define BP_USBCTRL_TTCTRL_TTHA 24
#define BM_USBCTRL_TTCTRL_TTHA 0x7f000000
#define BF_USBCTRL_TTCTRL_TTHA(v) (((v) << 24) & 0x7f000000)
/**
* Register: HW_USBCTRL_BURSTSIZE
* Address: 0x160
* SCT: no
*/
#define HW_USBCTRL_BURSTSIZE (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x160))
#define BP_USBCTRL_BURSTSIZE_TX 8
#define BM_USBCTRL_BURSTSIZE_TX 0xff00
#define BF_USBCTRL_BURSTSIZE_TX(v) (((v) << 8) & 0xff00)
#define BP_USBCTRL_BURSTSIZE_RX 0
#define BM_USBCTRL_BURSTSIZE_RX 0xff
#define BF_USBCTRL_BURSTSIZE_RX(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_TXFILLTUNING
* Address: 0x164
* SCT: no
*/
#define HW_USBCTRL_TXFILLTUNING (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x164))
#define BP_USBCTRL_TXFILLTUNING_TXFIFOTHRES 16
#define BM_USBCTRL_TXFILLTUNING_TXFIFOTHRES 0x3f0000
#define BF_USBCTRL_TXFILLTUNING_TXFIFOTHRES(v) (((v) << 16) & 0x3f0000)
#define BP_USBCTRL_TXFILLTUNING_TXSCHEALTH 8
#define BM_USBCTRL_TXFILLTUNING_TXSCHEALTH 0x1f00
#define BF_USBCTRL_TXFILLTUNING_TXSCHEALTH(v) (((v) << 8) & 0x1f00)
#define BP_USBCTRL_TXFILLTUNING_TXSCHOH 0
#define BM_USBCTRL_TXFILLTUNING_TXSCHOH 0xff
#define BF_USBCTRL_TXFILLTUNING_TXSCHOH(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_TXTTFILLTUNING
* Address: 0x168
* SCT: no
*/
#define HW_USBCTRL_TXTTFILLTUNING (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x168))
#define BP_USBCTRL_TXTTFILLTUNING_EMPTY 0
#define BM_USBCTRL_TXTTFILLTUNING_EMPTY 0xffffffff
#define BF_USBCTRL_TXTTFILLTUNING_EMPTY(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_USBCTRL_ULPI
* Address: 0x170
* SCT: no
*/
#define HW_USBCTRL_ULPI (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x170))
#define BP_USBCTRL_ULPI_WAKEUP 31
#define BM_USBCTRL_ULPI_WAKEUP 0x80000000
#define BF_USBCTRL_ULPI_WAKEUP(v) (((v) << 31) & 0x80000000)
#define BP_USBCTRL_ULPI_RUN 30
#define BM_USBCTRL_ULPI_RUN 0x40000000
#define BF_USBCTRL_ULPI_RUN(v) (((v) << 30) & 0x40000000)
#define BP_USBCTRL_ULPI_RDWR 29
#define BM_USBCTRL_ULPI_RDWR 0x20000000
#define BF_USBCTRL_ULPI_RDWR(v) (((v) << 29) & 0x20000000)
#define BP_USBCTRL_ULPI_ERROR 28
#define BM_USBCTRL_ULPI_ERROR 0x10000000
#define BF_USBCTRL_ULPI_ERROR(v) (((v) << 28) & 0x10000000)
#define BP_USBCTRL_ULPI_SYNC 27
#define BM_USBCTRL_ULPI_SYNC 0x8000000
#define BF_USBCTRL_ULPI_SYNC(v) (((v) << 27) & 0x8000000)
#define BP_USBCTRL_ULPI_PORT 24
#define BM_USBCTRL_ULPI_PORT 0x7000000
#define BF_USBCTRL_ULPI_PORT(v) (((v) << 24) & 0x7000000)
#define BP_USBCTRL_ULPI_ADDR 16
#define BM_USBCTRL_ULPI_ADDR 0xff0000
#define BF_USBCTRL_ULPI_ADDR(v) (((v) << 16) & 0xff0000)
#define BP_USBCTRL_ULPI_DATARD 8
#define BM_USBCTRL_ULPI_DATARD 0xff00
#define BF_USBCTRL_ULPI_DATARD(v) (((v) << 8) & 0xff00)
#define BP_USBCTRL_ULPI_DATAWR 0
#define BM_USBCTRL_ULPI_DATAWR 0xff
#define BF_USBCTRL_ULPI_DATAWR(v) (((v) << 0) & 0xff)
/**
* Register: HW_USBCTRL_VFRAME
* Address: 0x174
* SCT: no
*/
#define HW_USBCTRL_VFRAME (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x174))
#define BP_USBCTRL_VFRAME_EMPTY 0
#define BM_USBCTRL_VFRAME_EMPTY 0xffffffff
#define BF_USBCTRL_VFRAME_EMPTY(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_USBCTRL_EPNAK
* Address: 0x178
* SCT: no
*/
#define HW_USBCTRL_EPNAK (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x178))
#define BP_USBCTRL_EPNAK_EPTN 16
#define BM_USBCTRL_EPNAK_EPTN 0xffff0000
#define BF_USBCTRL_EPNAK_EPTN(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_EPNAK_EPRN 0
#define BM_USBCTRL_EPNAK_EPRN 0xffff
#define BF_USBCTRL_EPNAK_EPRN(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_EPNAKEN
* Address: 0x17c
* SCT: no
*/
#define HW_USBCTRL_EPNAKEN (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x17c))
#define BP_USBCTRL_EPNAKEN_EPTNE 16
#define BM_USBCTRL_EPNAKEN_EPTNE 0xffff0000
#define BF_USBCTRL_EPNAKEN_EPTNE(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_EPNAKEN_EPRNE 0
#define BM_USBCTRL_EPNAKEN_EPRNE 0xffff
#define BF_USBCTRL_EPNAKEN_EPRNE(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_CONFIGFLAG
* Address: 0x180
* SCT: no
*/
#define HW_USBCTRL_CONFIGFLAG (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x180))
#define BP_USBCTRL_CONFIGFLAG_FLAG 0
#define BM_USBCTRL_CONFIGFLAG_FLAG 0x1
#define BF_USBCTRL_CONFIGFLAG_FLAG(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_PORTSC1
* Address: 0x184
* SCT: no
*/
#define HW_USBCTRL_PORTSC1 (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x184))
#define BP_USBCTRL_PORTSC1_PTS 30
#define BM_USBCTRL_PORTSC1_PTS 0xc0000000
#define BV_USBCTRL_PORTSC1_PTS__UTMI 0x0
#define BV_USBCTRL_PORTSC1_PTS__PHIL 0x1
#define BV_USBCTRL_PORTSC1_PTS__ULPI 0x2
#define BV_USBCTRL_PORTSC1_PTS__SERIAL 0x3
#define BF_USBCTRL_PORTSC1_PTS(v) (((v) << 30) & 0xc0000000)
#define BF_USBCTRL_PORTSC1_PTS_V(v) ((BV_USBCTRL_PORTSC1_PTS__##v << 30) & 0xc0000000)
#define BP_USBCTRL_PORTSC1_STS 29
#define BM_USBCTRL_PORTSC1_STS 0x20000000
#define BF_USBCTRL_PORTSC1_STS(v) (((v) << 29) & 0x20000000)
#define BP_USBCTRL_PORTSC1_PTW 28
#define BM_USBCTRL_PORTSC1_PTW 0x10000000
#define BF_USBCTRL_PORTSC1_PTW(v) (((v) << 28) & 0x10000000)
#define BP_USBCTRL_PORTSC1_PSPD 26
#define BM_USBCTRL_PORTSC1_PSPD 0xc000000
#define BV_USBCTRL_PORTSC1_PSPD__FULL 0x0
#define BV_USBCTRL_PORTSC1_PSPD__LO 0x1
#define BV_USBCTRL_PORTSC1_PSPD__HI 0x2
#define BF_USBCTRL_PORTSC1_PSPD(v) (((v) << 26) & 0xc000000)
#define BF_USBCTRL_PORTSC1_PSPD_V(v) ((BV_USBCTRL_PORTSC1_PSPD__##v << 26) & 0xc000000)
#define BP_USBCTRL_PORTSC1_PFSC 24
#define BM_USBCTRL_PORTSC1_PFSC 0x1000000
#define BF_USBCTRL_PORTSC1_PFSC(v) (((v) << 24) & 0x1000000)
#define BP_USBCTRL_PORTSC1_PHCD 23
#define BM_USBCTRL_PORTSC1_PHCD 0x800000
#define BF_USBCTRL_PORTSC1_PHCD(v) (((v) << 23) & 0x800000)
#define BP_USBCTRL_PORTSC1_WKOC 22
#define BM_USBCTRL_PORTSC1_WKOC 0x400000
#define BF_USBCTRL_PORTSC1_WKOC(v) (((v) << 22) & 0x400000)
#define BP_USBCTRL_PORTSC1_WKDS 21
#define BM_USBCTRL_PORTSC1_WKDS 0x200000
#define BF_USBCTRL_PORTSC1_WKDS(v) (((v) << 21) & 0x200000)
#define BP_USBCTRL_PORTSC1_WKCN 20
#define BM_USBCTRL_PORTSC1_WKCN 0x100000
#define BF_USBCTRL_PORTSC1_WKCN(v) (((v) << 20) & 0x100000)
#define BP_USBCTRL_PORTSC1_PTC 16
#define BM_USBCTRL_PORTSC1_PTC 0xf0000
#define BV_USBCTRL_PORTSC1_PTC__DISABLE 0x0
#define BV_USBCTRL_PORTSC1_PTC__J 0x1
#define BV_USBCTRL_PORTSC1_PTC__K 0x2
#define BV_USBCTRL_PORTSC1_PTC__SE0orNAK 0x3
#define BV_USBCTRL_PORTSC1_PTC__Packet 0x4
#define BV_USBCTRL_PORTSC1_PTC__ForceEnableHS 0x5
#define BV_USBCTRL_PORTSC1_PTC__ForceEnableFS 0x6
#define BV_USBCTRL_PORTSC1_PTC__ForceEnableLS 0x7
#define BF_USBCTRL_PORTSC1_PTC(v) (((v) << 16) & 0xf0000)
#define BF_USBCTRL_PORTSC1_PTC_V(v) ((BV_USBCTRL_PORTSC1_PTC__##v << 16) & 0xf0000)
#define BP_USBCTRL_PORTSC1_PIC 14
#define BM_USBCTRL_PORTSC1_PIC 0xc000
#define BV_USBCTRL_PORTSC1_PIC__OFF 0x0
#define BV_USBCTRL_PORTSC1_PIC__AMBER 0x1
#define BV_USBCTRL_PORTSC1_PIC__GREEN 0x2
#define BV_USBCTRL_PORTSC1_PIC__UNDEF 0x3
#define BF_USBCTRL_PORTSC1_PIC(v) (((v) << 14) & 0xc000)
#define BF_USBCTRL_PORTSC1_PIC_V(v) ((BV_USBCTRL_PORTSC1_PIC__##v << 14) & 0xc000)
#define BP_USBCTRL_PORTSC1_PO 13
#define BM_USBCTRL_PORTSC1_PO 0x2000
#define BF_USBCTRL_PORTSC1_PO(v) (((v) << 13) & 0x2000)
#define BP_USBCTRL_PORTSC1_PP 12
#define BM_USBCTRL_PORTSC1_PP 0x1000
#define BF_USBCTRL_PORTSC1_PP(v) (((v) << 12) & 0x1000)
#define BP_USBCTRL_PORTSC1_LS 10
#define BM_USBCTRL_PORTSC1_LS 0xc00
#define BV_USBCTRL_PORTSC1_LS__SE0 0x0
#define BV_USBCTRL_PORTSC1_LS__K 0x1
#define BV_USBCTRL_PORTSC1_LS__J 0x2
#define BF_USBCTRL_PORTSC1_LS(v) (((v) << 10) & 0xc00)
#define BF_USBCTRL_PORTSC1_LS_V(v) ((BV_USBCTRL_PORTSC1_LS__##v << 10) & 0xc00)
#define BP_USBCTRL_PORTSC1_HSP 9
#define BM_USBCTRL_PORTSC1_HSP 0x200
#define BF_USBCTRL_PORTSC1_HSP(v) (((v) << 9) & 0x200)
#define BP_USBCTRL_PORTSC1_PR 8
#define BM_USBCTRL_PORTSC1_PR 0x100
#define BF_USBCTRL_PORTSC1_PR(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_PORTSC1_SUSP 7
#define BM_USBCTRL_PORTSC1_SUSP 0x80
#define BF_USBCTRL_PORTSC1_SUSP(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_PORTSC1_FPR 6
#define BM_USBCTRL_PORTSC1_FPR 0x40
#define BF_USBCTRL_PORTSC1_FPR(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_PORTSC1_OCC 5
#define BM_USBCTRL_PORTSC1_OCC 0x20
#define BF_USBCTRL_PORTSC1_OCC(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_PORTSC1_OCA 4
#define BM_USBCTRL_PORTSC1_OCA 0x10
#define BF_USBCTRL_PORTSC1_OCA(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_PORTSC1_PEC 3
#define BM_USBCTRL_PORTSC1_PEC 0x8
#define BF_USBCTRL_PORTSC1_PEC(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_PORTSC1_PE 2
#define BM_USBCTRL_PORTSC1_PE 0x4
#define BF_USBCTRL_PORTSC1_PE(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_PORTSC1_CSC 1
#define BM_USBCTRL_PORTSC1_CSC 0x2
#define BF_USBCTRL_PORTSC1_CSC(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_PORTSC1_CCS 0
#define BM_USBCTRL_PORTSC1_CCS 0x1
#define BF_USBCTRL_PORTSC1_CCS(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_OTGSC
* Address: 0x1a4
* SCT: no
*/
#define HW_USBCTRL_OTGSC (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1a4))
#define BP_USBCTRL_OTGSC_DPIE 30
#define BM_USBCTRL_OTGSC_DPIE 0x40000000
#define BF_USBCTRL_OTGSC_DPIE(v) (((v) << 30) & 0x40000000)
#define BP_USBCTRL_OTGSC_ONEMSE 29
#define BM_USBCTRL_OTGSC_ONEMSE 0x20000000
#define BF_USBCTRL_OTGSC_ONEMSE(v) (((v) << 29) & 0x20000000)
#define BP_USBCTRL_OTGSC_BSEIE 28
#define BM_USBCTRL_OTGSC_BSEIE 0x10000000
#define BF_USBCTRL_OTGSC_BSEIE(v) (((v) << 28) & 0x10000000)
#define BP_USBCTRL_OTGSC_BSVIE 27
#define BM_USBCTRL_OTGSC_BSVIE 0x8000000
#define BF_USBCTRL_OTGSC_BSVIE(v) (((v) << 27) & 0x8000000)
#define BP_USBCTRL_OTGSC_ASVIE 26
#define BM_USBCTRL_OTGSC_ASVIE 0x4000000
#define BF_USBCTRL_OTGSC_ASVIE(v) (((v) << 26) & 0x4000000)
#define BP_USBCTRL_OTGSC_AVVIE 25
#define BM_USBCTRL_OTGSC_AVVIE 0x2000000
#define BF_USBCTRL_OTGSC_AVVIE(v) (((v) << 25) & 0x2000000)
#define BP_USBCTRL_OTGSC_IDIE 24
#define BM_USBCTRL_OTGSC_IDIE 0x1000000
#define BF_USBCTRL_OTGSC_IDIE(v) (((v) << 24) & 0x1000000)
#define BP_USBCTRL_OTGSC_DPIS 22
#define BM_USBCTRL_OTGSC_DPIS 0x400000
#define BF_USBCTRL_OTGSC_DPIS(v) (((v) << 22) & 0x400000)
#define BP_USBCTRL_OTGSC_ONEMSS 21
#define BM_USBCTRL_OTGSC_ONEMSS 0x200000
#define BF_USBCTRL_OTGSC_ONEMSS(v) (((v) << 21) & 0x200000)
#define BP_USBCTRL_OTGSC_BSEIS 20
#define BM_USBCTRL_OTGSC_BSEIS 0x100000
#define BF_USBCTRL_OTGSC_BSEIS(v) (((v) << 20) & 0x100000)
#define BP_USBCTRL_OTGSC_BSVIS 19
#define BM_USBCTRL_OTGSC_BSVIS 0x80000
#define BF_USBCTRL_OTGSC_BSVIS(v) (((v) << 19) & 0x80000)
#define BP_USBCTRL_OTGSC_ASVIS 18
#define BM_USBCTRL_OTGSC_ASVIS 0x40000
#define BF_USBCTRL_OTGSC_ASVIS(v) (((v) << 18) & 0x40000)
#define BP_USBCTRL_OTGSC_AVVIS 17
#define BM_USBCTRL_OTGSC_AVVIS 0x20000
#define BF_USBCTRL_OTGSC_AVVIS(v) (((v) << 17) & 0x20000)
#define BP_USBCTRL_OTGSC_IDIS 16
#define BM_USBCTRL_OTGSC_IDIS 0x10000
#define BF_USBCTRL_OTGSC_IDIS(v) (((v) << 16) & 0x10000)
#define BP_USBCTRL_OTGSC_DPS 14
#define BM_USBCTRL_OTGSC_DPS 0x4000
#define BF_USBCTRL_OTGSC_DPS(v) (((v) << 14) & 0x4000)
#define BP_USBCTRL_OTGSC_ONEMST 13
#define BM_USBCTRL_OTGSC_ONEMST 0x2000
#define BF_USBCTRL_OTGSC_ONEMST(v) (((v) << 13) & 0x2000)
#define BP_USBCTRL_OTGSC_BSE 12
#define BM_USBCTRL_OTGSC_BSE 0x1000
#define BF_USBCTRL_OTGSC_BSE(v) (((v) << 12) & 0x1000)
#define BP_USBCTRL_OTGSC_BSV 11
#define BM_USBCTRL_OTGSC_BSV 0x800
#define BF_USBCTRL_OTGSC_BSV(v) (((v) << 11) & 0x800)
#define BP_USBCTRL_OTGSC_ASV 10
#define BM_USBCTRL_OTGSC_ASV 0x400
#define BF_USBCTRL_OTGSC_ASV(v) (((v) << 10) & 0x400)
#define BP_USBCTRL_OTGSC_AVV 9
#define BM_USBCTRL_OTGSC_AVV 0x200
#define BF_USBCTRL_OTGSC_AVV(v) (((v) << 9) & 0x200)
#define BP_USBCTRL_OTGSC_ID 8
#define BM_USBCTRL_OTGSC_ID 0x100
#define BF_USBCTRL_OTGSC_ID(v) (((v) << 8) & 0x100)
#define BP_USBCTRL_OTGSC_HABA 7
#define BM_USBCTRL_OTGSC_HABA 0x80
#define BF_USBCTRL_OTGSC_HABA(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_OTGSC_HADP 6
#define BM_USBCTRL_OTGSC_HADP 0x40
#define BF_USBCTRL_OTGSC_HADP(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_OTGSC_IDPU 5
#define BM_USBCTRL_OTGSC_IDPU 0x20
#define BF_USBCTRL_OTGSC_IDPU(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_OTGSC_DP 4
#define BM_USBCTRL_OTGSC_DP 0x10
#define BF_USBCTRL_OTGSC_DP(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_OTGSC_OT 3
#define BM_USBCTRL_OTGSC_OT 0x8
#define BF_USBCTRL_OTGSC_OT(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_OTGSC_HAAR 2
#define BM_USBCTRL_OTGSC_HAAR 0x4
#define BF_USBCTRL_OTGSC_HAAR(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_OTGSC_VC 1
#define BM_USBCTRL_OTGSC_VC 0x2
#define BF_USBCTRL_OTGSC_VC(v) (((v) << 1) & 0x2)
#define BP_USBCTRL_OTGSC_VD 0
#define BM_USBCTRL_OTGSC_VD 0x1
#define BF_USBCTRL_OTGSC_VD(v) (((v) << 0) & 0x1)
/**
* Register: HW_USBCTRL_USBMODE
* Address: 0x1a8
* SCT: no
*/
#define HW_USBCTRL_USBMODE (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1a8))
#define BP_USBCTRL_USBMODE_SDIS 4
#define BM_USBCTRL_USBMODE_SDIS 0x10
#define BF_USBCTRL_USBMODE_SDIS(v) (((v) << 4) & 0x10)
#define BP_USBCTRL_USBMODE_SLOM 3
#define BM_USBCTRL_USBMODE_SLOM 0x8
#define BF_USBCTRL_USBMODE_SLOM(v) (((v) << 3) & 0x8)
#define BP_USBCTRL_USBMODE_ES 2
#define BM_USBCTRL_USBMODE_ES 0x4
#define BF_USBCTRL_USBMODE_ES(v) (((v) << 2) & 0x4)
#define BP_USBCTRL_USBMODE_CM 0
#define BM_USBCTRL_USBMODE_CM 0x3
#define BV_USBCTRL_USBMODE_CM__IDLE 0x0
#define BV_USBCTRL_USBMODE_CM__DEVICE 0x2
#define BV_USBCTRL_USBMODE_CM__HOST 0x3
#define BF_USBCTRL_USBMODE_CM(v) (((v) << 0) & 0x3)
#define BF_USBCTRL_USBMODE_CM_V(v) ((BV_USBCTRL_USBMODE_CM__##v << 0) & 0x3)
/**
* Register: HW_USBCTRL_ENDPTSETUPSTAT
* Address: 0x1ac
* SCT: no
*/
#define HW_USBCTRL_ENDPTSETUPSTAT (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1ac))
#define BP_USBCTRL_ENDPTSETUPSTAT_STS 0
#define BM_USBCTRL_ENDPTSETUPSTAT_STS 0xffff
#define BF_USBCTRL_ENDPTSETUPSTAT_STS(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_ENDPTPRIME
* Address: 0x1b0
* SCT: no
*/
#define HW_USBCTRL_ENDPTPRIME (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1b0))
#define BP_USBCTRL_ENDPTPRIME_PETB 16
#define BM_USBCTRL_ENDPTPRIME_PETB 0xffff0000
#define BF_USBCTRL_ENDPTPRIME_PETB(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_ENDPTPRIME_PERB 0
#define BM_USBCTRL_ENDPTPRIME_PERB 0xffff
#define BF_USBCTRL_ENDPTPRIME_PERB(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_ENDPTFLUSH
* Address: 0x1b4
* SCT: no
*/
#define HW_USBCTRL_ENDPTFLUSH (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1b4))
#define BP_USBCTRL_ENDPTFLUSH_FETB 16
#define BM_USBCTRL_ENDPTFLUSH_FETB 0xffff0000
#define BF_USBCTRL_ENDPTFLUSH_FETB(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_ENDPTFLUSH_FERB 0
#define BM_USBCTRL_ENDPTFLUSH_FERB 0xffff
#define BF_USBCTRL_ENDPTFLUSH_FERB(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_ENDPTSTATUS
* Address: 0x1b8
* SCT: no
*/
#define HW_USBCTRL_ENDPTSTATUS (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1b8))
#define BP_USBCTRL_ENDPTSTATUS_ETBR 16
#define BM_USBCTRL_ENDPTSTATUS_ETBR 0xffff0000
#define BF_USBCTRL_ENDPTSTATUS_ETBR(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_ENDPTSTATUS_ERBR 0
#define BM_USBCTRL_ENDPTSTATUS_ERBR 0xffff
#define BF_USBCTRL_ENDPTSTATUS_ERBR(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_ENDPTCOMPLETE
* Address: 0x1bc
* SCT: no
*/
#define HW_USBCTRL_ENDPTCOMPLETE (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1bc))
#define BP_USBCTRL_ENDPTCOMPLETE_ETCE 16
#define BM_USBCTRL_ENDPTCOMPLETE_ETCE 0xffff0000
#define BF_USBCTRL_ENDPTCOMPLETE_ETCE(v) (((v) << 16) & 0xffff0000)
#define BP_USBCTRL_ENDPTCOMPLETE_ERCE 0
#define BM_USBCTRL_ENDPTCOMPLETE_ERCE 0xffff
#define BF_USBCTRL_ENDPTCOMPLETE_ERCE(v) (((v) << 0) & 0xffff)
/**
* Register: HW_USBCTRL_ENDPTCTRLn
* Address: 0x1c0+n*0x4
* SCT: no
*/
#define HW_USBCTRL_ENDPTCTRLn(n) (*(volatile unsigned long *)(REGS_USBCTRL_BASE + 0x1c0+(n)*0x4))
#define BP_USBCTRL_ENDPTCTRLn_TXE 23
#define BM_USBCTRL_ENDPTCTRLn_TXE 0x800000
#define BF_USBCTRL_ENDPTCTRLn_TXE(v) (((v) << 23) & 0x800000)
#define BP_USBCTRL_ENDPTCTRLn_TXR 22
#define BM_USBCTRL_ENDPTCTRLn_TXR 0x400000
#define BF_USBCTRL_ENDPTCTRLn_TXR(v) (((v) << 22) & 0x400000)
#define BP_USBCTRL_ENDPTCTRLn_TXI 21
#define BM_USBCTRL_ENDPTCTRLn_TXI 0x200000
#define BF_USBCTRL_ENDPTCTRLn_TXI(v) (((v) << 21) & 0x200000)
#define BP_USBCTRL_ENDPTCTRLn_TXT 18
#define BM_USBCTRL_ENDPTCTRLn_TXT 0xc0000
#define BV_USBCTRL_ENDPTCTRLn_TXT__ISOCHRONOUS 0x1
#define BV_USBCTRL_ENDPTCTRLn_TXT__BULK 0x2
#define BV_USBCTRL_ENDPTCTRLn_TXT__INT 0x3
#define BF_USBCTRL_ENDPTCTRLn_TXT(v) (((v) << 18) & 0xc0000)
#define BF_USBCTRL_ENDPTCTRLn_TXT_V(v) ((BV_USBCTRL_ENDPTCTRLn_TXT__##v << 18) & 0xc0000)
#define BP_USBCTRL_ENDPTCTRLn_TXS 16
#define BM_USBCTRL_ENDPTCTRLn_TXS 0x10000
#define BF_USBCTRL_ENDPTCTRLn_TXS(v) (((v) << 16) & 0x10000)
#define BP_USBCTRL_ENDPTCTRLn_RXE 7
#define BM_USBCTRL_ENDPTCTRLn_RXE 0x80
#define BF_USBCTRL_ENDPTCTRLn_RXE(v) (((v) << 7) & 0x80)
#define BP_USBCTRL_ENDPTCTRLn_RXR 6
#define BM_USBCTRL_ENDPTCTRLn_RXR 0x40
#define BF_USBCTRL_ENDPTCTRLn_RXR(v) (((v) << 6) & 0x40)
#define BP_USBCTRL_ENDPTCTRLn_RXI 5
#define BM_USBCTRL_ENDPTCTRLn_RXI 0x20
#define BF_USBCTRL_ENDPTCTRLn_RXI(v) (((v) << 5) & 0x20)
#define BP_USBCTRL_ENDPTCTRLn_RXT 2
#define BM_USBCTRL_ENDPTCTRLn_RXT 0xc
#define BF_USBCTRL_ENDPTCTRLn_RXT(v) (((v) << 2) & 0xc)
#define BP_USBCTRL_ENDPTCTRLn_RXS 0
#define BM_USBCTRL_ENDPTCTRLn_RXS 0x1
#define BF_USBCTRL_ENDPTCTRLn_RXS(v) (((v) << 0) & 0x1)
#endif /* __HEADERGEN__STMP3700__USBCTRL__H__ */