185 lines
5.7 KiB
C
185 lines
5.7 KiB
C
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021-2022 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __X1000_CODEC_H__
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#define __X1000_CODEC_H__
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#include "config.h"
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#include <stdbool.h>
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/* Note: the internal X1000 codec supports playback and record, but devices
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* can employ an external codec for one and the internal codec for the other.
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* The caveat, in this case, is that only one codec can be used at a time
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* because the HW cannot mux playback/record independently.
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*
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* At present only recording is implemented, since all X1000 ports use an
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* external DAC for playback.
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*/
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#ifdef HAVE_X1000_ICODEC_PLAY
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# error "X1000 icodec playback not implemented"
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#endif
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#define X1000_ICODEC_ADC_GAIN_MIN 0
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#define X1000_ICODEC_ADC_GAIN_MAX 43
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#define X1000_ICODEC_ADC_GAIN_STEP 1
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#define X1000_ICODEC_MIC_GAIN_MIN 0
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#define X1000_ICODEC_MIC_GAIN_MAX 20
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#define X1000_ICODEC_MIC_GAIN_STEP 4
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#ifdef HAVE_X1000_ICODEC_REC
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AUDIOHW_SETTING(MIC_GAIN, "dB", 0, 1, 0, 63, 12)
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#endif
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#define JZCODEC_INDIRECT_CREG(r) ((r) & 0xff)
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#define JZCODEC_INDIRECT_INDEX(r) (((r) >> 8) & 0x7)
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#define JZCODEC_INDIRECT_BIT 0x800
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#define JZCODEC_INDIRECT(c, i) (JZCODEC_INDIRECT_BIT | ((i) << 8) | (c))
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/* Codec registers from Ingenic's kernel sources. The datasheet is badly
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* screwed up and the addresses listed cannot be trusted. */
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enum {
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JZCODEC_SR = 0,
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JZCODEC_SR2,
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JZCODEC_SIGR,
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JZCODEC_SIGR2,
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JZCODEC_SIGR3,
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JZCODEC_SIGR5,
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JZCODEC_SIGR7,
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JZCODEC_MR,
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JZCODEC_AICR_DAC,
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JZCODEC_AICR_ADC,
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JZCODEC_CR_DMIC,
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JZCODEC_CR_MIC1,
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JZCODEC_CR_MIC2,
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JZCODEC_CR_DAC,
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JZCODEC_CR_DAC2,
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JZCODEC_CR_ADC,
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JZCODEC_CR_MIX,
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JZCODEC_DR_MIX,
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JZCODEC_CR_VIC,
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JZCODEC_CR_CK,
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JZCODEC_FCR_DAC,
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JZCODEC_SFCCR_DAC,
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JZCODEC_SFFCR_DAC,
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JZCODEC_FCR_ADC,
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JZCODEC_CR_TIMER_MSB,
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JZCODEC_CR_TIMER_LSB,
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JZCODEC_ICR,
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JZCODEC_IMR,
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JZCODEC_IFR,
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JZCODEC_IMR2,
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JZCODEC_IFR2,
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JZCODEC_GCR_DACL,
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JZCODEC_GCR_DACR,
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JZCODEC_GCR_DACL2,
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JZCODEC_GCR_DACR2,
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JZCODEC_GCR_MIC1,
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JZCODEC_GCR_MIC2,
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JZCODEC_GCR_ADCL,
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JZCODEC_GCR_ADCR,
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JZCODEC_GCR_MIXDACL,
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JZCODEC_GCR_MIXDACR,
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JZCODEC_GCR_MIXADCL,
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JZCODEC_GCR_MIXADCR,
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JZCODEC_CR_DAC_AGC,
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JZCODEC_DR_DAC_AGC,
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JZCODEC_CR_DAC2_AGC,
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JZCODEC_DR_DAC2_AGC,
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JZCODEC_CR_ADC_AGC,
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JZCODEC_DR_ADC_AGC,
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JZCODEC_SR_ADC_AGCDGL,
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JZCODEC_SR_ADC_AGCDGR,
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JZCODEC_SR_ADC_AGCAGL,
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JZCODEC_SR_ADC_AGCAGR,
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JZCODEC_CR_TR,
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JZCODEC_DR_TR,
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JZCODEC_SR_TR1,
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JZCODEC_SR_TR2,
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JZCODEC_SR_TR_SRCDAC,
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JZCODEC_MIX0 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 0),
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JZCODEC_MIX1 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 1),
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JZCODEC_MIX2 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 2),
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JZCODEC_MIX3 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 3),
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JZCODEC_MIX4 = JZCODEC_INDIRECT(JZCODEC_CR_MIX, 4),
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JZCODEC_DAC_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 0),
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JZCODEC_DAC_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 1),
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JZCODEC_DAC_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 2),
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JZCODEC_DAC_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_DAC_AGC, 3),
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JZCODEC_DAC2_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 0),
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JZCODEC_DAC2_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 1),
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JZCODEC_DAC2_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 2),
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JZCODEC_DAC2_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_DAC2_AGC, 3),
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JZCODEC_ADC_AGC0 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 0),
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JZCODEC_ADC_AGC1 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 1),
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JZCODEC_ADC_AGC2 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 2),
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JZCODEC_ADC_AGC3 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 3),
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JZCODEC_ADC_AGC4 = JZCODEC_INDIRECT(JZCODEC_CR_ADC_AGC, 4),
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};
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/* for use with x1000_icodec_mic1_configure() */
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enum {
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JZCODEC_MIC1_SINGLE_ENDED = (0 << 6),
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JZCODEC_MIC1_DIFFERENTIAL = (1 << 6),
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JZCODEC_MIC1_BIAS_2_08V = (0 << 3),
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JZCODEC_MIC1_BIAS_1_66V = (1 << 3),
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JZCODEC_MIC1_CONFIGURE_MASK = (1 << 6) | (1 << 3),
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};
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/* for use with x1000_icodec_adc_mic_sel() */
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enum {
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JZCODEC_MIC_SEL_ANALOG,
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JZCODEC_MIC_SEL_DIGITAL,
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};
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extern void x1000_icodec_open(void);
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extern void x1000_icodec_close(void);
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extern void x1000_icodec_dac_frequency(int fsel);
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extern void x1000_icodec_adc_enable(bool en);
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extern void x1000_icodec_adc_mute(bool muted);
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extern void x1000_icodec_adc_mic_sel(int sel);
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extern void x1000_icodec_adc_frequency(int fsel);
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extern void x1000_icodec_adc_highpass_filter(bool en);
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extern void x1000_icodec_adc_gain(int gain_dB);
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extern void x1000_icodec_mic1_enable(bool en);
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extern void x1000_icodec_mic1_bias_enable(bool en);
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extern void x1000_icodec_mic1_configure(int settings);
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extern void x1000_icodec_mic1_gain(int gain_dB);
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extern void x1000_icodec_mixer_enable(bool en);
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extern int x1000_icodec_read(int reg);
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extern void x1000_icodec_write(int reg, int value);
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extern void x1000_icodec_update(int reg, int mask, int value);
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#endif /* __X1000_CODEC_H__ */
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