2011-05-01 13:02:46 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef SYSTEM_TARGET_H
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#define SYSTEM_TARGET_H
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#include "system-arm.h"
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#include "mmu-arm.h"
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#include "panic.h"
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#include "clock-target.h" /* CPUFREQ_* are defined here */
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#define HW_DIGCTL_BASE 0x8001C000
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#define HW_DIGCTL_MICROSECONDS (*(volatile uint32_t *)(HW_DIGCTL_BASE + 0xC0))
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2011-05-04 18:00:22 +00:00
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#define HW_POWER_BASE 0x80044000
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#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0))
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#define HW_POWER_STS__PSWITCH_BP 20
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#define HW_POWER_STS__PSWITCH_BM (3 << 20)
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#define HW_POWER_RESET (*(volatile uint32_t *)(HW_POWER_BASE + 0x100))
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#define HW_POWER_RESET__UNLOCK 0x3E770000
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#define HW_POWER_RESET__PWD 0x1
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#define HW_ICOLL_BASE 0x80000000
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#define HW_ICOLL_VECTOR (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x0))
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#define HW_ICOLL_LEVELACK (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x10))
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#define HW_ICOLL_LEVELACK__LEVEL0 0x1
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#define HW_ICOLL_CTRL (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x20))
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#define HW_ICOLL_CTRL__IRQ_FINAL_ENABLE (1 << 16)
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#define HW_ICOLL_CTRL__ARM_RSE_MODE (1 << 18)
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#define HW_ICOLL_VBASE (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x40))
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#define HW_ICOLL_INTERRUPT(i) (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x120 + (i) * 0x10))
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#define HW_ICOLL_INTERRUPT__PRIORITY_BM 0x3
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#define HW_ICOLL_INTERRUPT__ENABLE 0x4
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#define HW_ICOLL_INTERRUPT__SOFTIRQ 0x8
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#define HW_ICOLL_INTERRUPT__ENFIQ 0x10
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2011-05-01 13:02:46 +00:00
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#define INT_SRC_USB_CTRL 11
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#define INT_SRC_TIMER(nr) (28 + (nr))
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#define INT_SRC_LCDIF_DMA 45
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#define INT_SRC_LCDIF_ERROR 46
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#define INT_SRC_NR_SOURCES 66
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void imx233_enable_interrupt(int src, bool enable);
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void imx233_softirq(int src, bool enable);
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void udelay(unsigned us);
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bool imx233_us_elapsed(uint32_t ref, unsigned us_delay);
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void imx233_reset_block(volatile uint32_t *block_reg);
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void power_off(void);
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void udelay(unsigned usecs);
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static inline void mdelay(unsigned msecs)
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{
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udelay(1000 * msecs);
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}
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#endif /* SYSTEM_TARGET_H */
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