2005-11-14 20:41:49 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "lcd.h"
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#include "kernel.h"
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#include "thread.h"
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#include <string.h>
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#include <stdlib.h>
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#include "file.h"
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#include "debug.h"
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#include "system.h"
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#include "font.h"
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#include "bidi.h"
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2005-12-20 23:15:27 +00:00
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static bool display_on=false; /* is the display turned on? */
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/* register defines */
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#define R_START_OSC 0x00
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#define R_DRV_OUTPUT_CONTROL 0x01
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#define R_DRV_WAVEFORM_CONTROL 0x02
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#define R_ENTRY_MODE 0x03
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#define R_COMPARE_REG1 0x04
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#define R_COMPARE_REG2 0x05
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#define R_DISP_CONTROL1 0x07
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#define R_DISP_CONTROL2 0x08
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#define R_DISP_CONTROL3 0x09
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#define R_FRAME_CYCLE_CONTROL 0x0b
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#define R_EXT_DISP_IF_CONTROL 0x0c
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#define R_POWER_CONTROL1 0x10
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#define R_POWER_CONTROL2 0x11
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#define R_POWER_CONTROL3 0x12
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#define R_POWER_CONTROL4 0x13
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#define R_RAM_ADDR_SET 0x21
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#define R_WRITE_DATA_2_GRAM 0x22
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#define R_GAMMA_FINE_ADJ_POS1 0x30
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#define R_GAMMA_FINE_ADJ_POS2 0x31
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#define R_GAMMA_FINE_ADJ_POS3 0x32
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#define R_GAMMA_GRAD_ADJ_POS 0x33
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#define R_GAMMA_FINE_ADJ_NEG1 0x34
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#define R_GAMMA_FINE_ADJ_NEG2 0x35
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#define R_GAMMA_FINE_ADJ_NEG3 0x36
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#define R_GAMMA_GRAD_ADJ_NEG 0x37
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#define R_GAMMA_AMP_ADJ_RES_POS 0x38
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#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
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#define R_GATE_SCAN_POS 0x40
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#define R_VERT_SCROLL_CONTROL 0x41
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#define R_1ST_SCR_DRV_POS 0x42
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#define R_2ND_SCR_DRV_POS 0x43
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#define R_HORIZ_RAM_ADDR_POS 0x44
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#define R_VERT_RAM_ADDR_POS 0x45
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/* called very frequently - inline! */
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2006-02-05 00:24:08 +00:00
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static inline void lcd_write_reg(int reg, int val)
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2005-11-14 20:41:49 +00:00
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{
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*(volatile unsigned short *)0xf0000000 = reg;
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*(volatile unsigned short *)0xf0000002 = val;
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}
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2005-12-20 23:15:27 +00:00
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/* called very frequently - inline! */
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2006-02-05 00:24:08 +00:00
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static inline void lcd_begin_write_gram(void)
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2005-11-14 20:41:49 +00:00
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{
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2005-12-20 23:15:27 +00:00
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*(volatile unsigned short *)0xf0000000 = R_WRITE_DATA_2_GRAM;
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2005-11-14 20:41:49 +00:00
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}
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/*** hardware configuration ***/
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void lcd_set_contrast(int val)
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{
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(void)val;
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}
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void lcd_set_invert_display(bool yesno)
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{
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(void)yesno;
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}
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/* turn the display upside down (call lcd_update() afterwards) */
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void lcd_set_flip(bool yesno)
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{
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(void)yesno;
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}
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/* Rolls up the lcd display by the specified amount of lines.
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* Lines that are rolled out over the top of the screen are
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* rolled in from the bottom again. This is a hardware
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* remapping only and all operations on the lcd are affected.
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* ->
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* @param int lines - The number of lines that are rolled.
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* The value must be 0 <= pixels < LCD_HEIGHT. */
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void lcd_roll(int lines)
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{
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(void)lines;
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}
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/* LCD init */
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void lcd_init_device(void)
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{
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/* GPO46 is LCD RESET */
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or_l(0x00004000, &GPIO1_OUT);
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or_l(0x00004000, &GPIO1_ENABLE);
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or_l(0x00004000, &GPIO1_FUNCTION);
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/* Reset LCD */
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sleep(1);
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and_l(~0x00004000, &GPIO1_OUT);
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sleep(1);
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or_l(0x00004000, &GPIO1_OUT);
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscilation */
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_DISP_CONTROL1, 0x0040); /* zero all bits */
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lcd_write_reg(R_POWER_CONTROL3, 0x0000);
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lcd_write_reg(R_POWER_CONTROL4, 0x0000);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_POWER_CONTROL2, 0x0003); /* VciOUT = 0.83*VciLVL */
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lcd_write_reg(R_POWER_CONTROL3, 0x0008); /* Vreg1OUT = REGP*1.90 */
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/* Vcom-level amplitude = 1.23*Vreg1OUT
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* VcomH-level amplitude = 0.84*Vreg1OUT */
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lcd_write_reg(R_POWER_CONTROL4, 0x3617);
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lcd_write_reg(R_POWER_CONTROL3, 0x0008); /* Vreg1OUT = REGP*1.90 */
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lcd_write_reg(R_POWER_CONTROL1, 0x0004); /* Step-up circuit 1 ON */
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lcd_write_reg(R_POWER_CONTROL1, 0x0004);
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lcd_write_reg(R_POWER_CONTROL2, 0x0002); /* VciOUT = 0.87*VciLVL */
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lcd_write_reg(R_POWER_CONTROL3, 0x0018); /* turn on VLOUT3 */
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lcd_write_reg(R_POWER_CONTROL1, 0x0044); /* LCD power supply Op.Amp
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const curr = 1 */
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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/* Step-up rate:
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* VLOUT1 (DDVDH) = Vci1*2
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* VLOUT4 (VCL) = Vci1*(-1)
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* VLOUT2 (VGH) = DDVDH*3 = Vci1*6
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* VLOUT3 (VGL) = - DDVDH*2 = Vci1*(-4) */
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lcd_write_reg(R_POWER_CONTROL1, 0x0144);
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/* Step-Up circuit 1 Off;
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* VLOUT2 (VGH) = Vci1 + DDVDH*2 = Vci1*5
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* VLOUT3 (VGL) = -(Vci1+DDVDH) = Vci1*(-3) */
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lcd_write_reg(R_POWER_CONTROL1, 0x0540);
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/* Vcom-level ampl = Vreg1OUT*1.11
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* VcomH-level ampl = Vreg1OUT*0.86 */
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lcd_write_reg(R_POWER_CONTROL4, 0x3218);
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/* ??Number lines invalid? */
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x001b);
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/* B/C = 1 ; n-line inversion form; polarity inverses at completion of
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* driving n lines
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* Exclusive OR = 1; polarity inversion occurs by applying an EOR to
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* odd/even frame select signal and an n-line inversion signal.
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* FLD = 01b (1 field interlaced scan, external display iface) */
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lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700);
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/* Address counter updated in vertical direction; left to right;
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* vertical increment horizontal increment.
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* data format for 8bit transfer or spi = 65k (5,6,5)
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* Reverse order of RGB to BGR for 18bit data written to GRAM
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* Replace data on writing to GRAM */
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lcd_write_reg(R_ENTRY_MODE, 0x7038);
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/* ???? compare val = (1)1100 0011 0000b; the MSB bit is out of spec.*/
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lcd_write_reg(R_COMPARE_REG1, 0x7030);
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lcd_write_reg(R_COMPARE_REG2, 0x0000);
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lcd_write_reg(R_GATE_SCAN_POS, 0x0000);
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lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
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/* Gate Line = 0+1 = 1
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* gate "end" line = 0xdb + 1 = 0xdc */
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lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdb00);
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lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000);
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lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0xaf00);/* horiz ram addr 0 - 175 */
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lcd_write_reg(R_VERT_RAM_ADDR_POS, 0xdb00);/* vert ram addr 0 - 219 */
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/* 19 clocks,no equalization */
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lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002);
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/* Transfer mode for RGB interface disabled
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* internal clock operation;
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* System interface/VSYNC interface */
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lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0x0003);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_POWER_CONTROL1, 0x4540); /* Turn on the op-amp (1) */
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/* Enable internal display operations, not showed on the ext. display yet
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* Source: GND; Internal: ON; Gate-Driver control signals: ON*/
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lcd_write_reg(R_DISP_CONTROL1, 0x0041);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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/* Front porch lines: 8; Back porch lines: 8; */
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lcd_write_reg(R_DISP_CONTROL2, 0x0808);
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/* Scan mode by the gate driver in the non-display area: disabled;
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* Cycle of scan by the gate driver - set to 31frames(518ms),disabled by
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* above setting */
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lcd_write_reg(R_DISP_CONTROL3, 0x003f);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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/* Vertical scrolling disabled;
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* Gate Output: VGH/VGL;
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* Reversed grayscale image on;
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* Source output: Non-lit display; internal disp.operation: ON, gate-driver
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* control signals: ON
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* Note: bit 6 (zero based) isn't set to 1 (according to the datasheet
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* it should be) */
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lcd_write_reg(R_DISP_CONTROL1, 0x0636);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_DISP_CONTROL1, 0x0626);/* Gate output:VGL; 6th bit not set*/
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0707);
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0007);
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lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0705);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0007);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0000);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
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lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0507);
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lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0x1d09);
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lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0x0303);
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2005-11-14 20:41:49 +00:00
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2005-12-20 23:15:27 +00:00
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/* VcomH = Vreg1OUT*0.70
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* Vcom amplitude = Vreg1OUT*0.78 */
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lcd_write_reg(R_POWER_CONTROL4, 0x2610);
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2005-11-14 20:41:49 +00:00
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2005-12-20 23:15:27 +00:00
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/* LCD ON
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* Vertical scrolling: Originaly designated position/external display
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* Reverse grayscale off;
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* Internal display operation ON, Gate driver control signals: ON; Source
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* output GND */
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lcd_write_reg(R_DISP_CONTROL1, 0x0061);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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/* init the GRAM, the framebuffer is already cleared in the
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* device independent lcd_init() */
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lcd_write_reg(R_RAM_ADDR_SET, 0);
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lcd_begin_write_gram();
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lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT);
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/* Reverse grayscale on;
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* Source output: display */
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lcd_write_reg(R_DISP_CONTROL1, 0x0067);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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/* Vertical Scrolling disabled
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* Gate output: VGH/VGL
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* 6th bit not set*/
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lcd_write_reg(R_DISP_CONTROL1, 0x0637);
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2006-01-09 16:11:19 +00:00
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/* ok, the display is finally on */
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display_on=true;
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2005-12-20 23:15:27 +00:00
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}
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void lcd_enable(bool on)
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{
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if(display_on!=on)
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{
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if(on)
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{
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lcd_init_device();
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}
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else
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{
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lcd_write_reg(R_FRAME_CYCLE_CONTROL,0x0002); /* No EQ, 19 clocks */
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/* Gate Output VGH/VGL; Non-lit display internal disp. ON,
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* gate-driver control ON; */
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lcd_write_reg(R_DISP_CONTROL1,0x0072);
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sleep(1);
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lcd_write_reg(R_DISP_CONTROL1,0x0062); /* Gate Output: VGL */
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sleep(1);
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/* Gate Output VGH; Source Output: GND;
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* internal display operation:halt
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* Gate-Driver control signals: OFF */
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lcd_write_reg(R_DISP_CONTROL1,0x0040);
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/* Now, turn off the power */
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/* Halt op. amp & step-up circuit */
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|
|
|
lcd_write_reg(R_POWER_CONTROL1,0x0000);
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|
|
|
lcd_write_reg(R_POWER_CONTROL3,0x0000); /* Turn OFF VLOUT3 */
|
|
|
|
|
|
|
|
/* halt negative volt ampl. */
|
|
|
|
lcd_write_reg(R_POWER_CONTROL4,0x0000);
|
2006-01-09 16:11:19 +00:00
|
|
|
display_on=false;
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2006-01-09 16:11:19 +00:00
|
|
|
/* display_on = on */
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*** update functions ***/
|
|
|
|
|
|
|
|
/* Performance function that works with an external buffer
|
|
|
|
note that by and bheight are in 8-pixel units! */
|
|
|
|
void lcd_blit(const fb_data* data, int x, int by, int width,
|
|
|
|
int bheight, int stride)
|
|
|
|
{
|
|
|
|
/* TODO: Implement lcd_blit() */
|
|
|
|
(void)data;
|
|
|
|
(void)x;
|
|
|
|
(void)by;
|
|
|
|
(void)width;
|
|
|
|
(void)bheight;
|
|
|
|
(void)stride;
|
2005-12-20 23:15:27 +00:00
|
|
|
/*if(display_on)*/
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Update the display.
|
|
|
|
This must be called after all other LCD functions that change the display. */
|
|
|
|
void lcd_update(void) ICODE_ATTR;
|
|
|
|
void lcd_update(void)
|
|
|
|
{
|
2005-12-20 23:15:27 +00:00
|
|
|
if(display_on){
|
|
|
|
/* Copy display bitmap to hardware */
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, 0);
|
|
|
|
lcd_begin_write_gram();
|
|
|
|
lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT);
|
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Update a fraction of the display. */
|
|
|
|
void lcd_update_rect(int, int, int, int) ICODE_ATTR;
|
|
|
|
void lcd_update_rect(int x, int y, int width, int height)
|
|
|
|
{
|
2005-12-20 23:15:27 +00:00
|
|
|
if(display_on) {
|
|
|
|
int ymax = y + height;
|
|
|
|
|
|
|
|
if(x + width > LCD_WIDTH)
|
|
|
|
width = LCD_WIDTH - x;
|
|
|
|
if (width <= 0)
|
|
|
|
return; /* nothing left to do, 0 is harmful to lcd_write_data() */
|
|
|
|
if(ymax >= LCD_HEIGHT)
|
|
|
|
ymax = LCD_HEIGHT-1;
|
|
|
|
|
|
|
|
/* set update window */
|
|
|
|
|
|
|
|
/* horiz ram addr */
|
|
|
|
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (ymax<<8) | y);
|
|
|
|
|
|
|
|
/* vert ram addr */
|
2006-02-05 00:24:08 +00:00
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS,((x+width-1)<<8) | x);
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, (x<<8) | y);
|
2005-12-20 23:15:27 +00:00
|
|
|
lcd_begin_write_gram();
|
|
|
|
|
|
|
|
/* Copy specified rectangle bitmap to hardware */
|
|
|
|
for (; y <= ymax; y++)
|
|
|
|
{
|
|
|
|
lcd_write_data ((unsigned short *)&lcd_framebuffer[y][x], width);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* reset update window */
|
|
|
|
/* horiz ram addr: 0 - 175 */
|
|
|
|
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0xaf00);
|
|
|
|
|
|
|
|
/* vert ram addr: 0 - 219 */
|
2006-02-05 00:24:08 +00:00
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS, 0xdb00);
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|