2004-09-03 13:16:19 +00:00
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#include "config.h"
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2004-09-03 13:02:16 +00:00
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ENTRY(start)
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2007-01-08 18:21:12 +00:00
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2005-07-18 12:40:29 +00:00
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#ifdef CPU_COLDFIRE
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2005-01-28 13:19:01 +00:00
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OUTPUT_FORMAT(elf32-m68k)
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2006-08-31 19:45:05 +00:00
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INPUT(target/coldfire/crt0.o)
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#elif defined(CPU_PP)
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2007-01-08 18:21:12 +00:00
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OUTPUT_FORMAT(elf32-littlearm)
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2006-08-31 19:45:05 +00:00
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INPUT(target/arm/crt0-pp.o)
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#elif defined(CPU_ARM)
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2007-01-08 18:21:12 +00:00
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OUTPUT_FORMAT(elf32-littlearm)
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2006-08-31 19:45:05 +00:00
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INPUT(target/arm/crt0.o)
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#elif CONFIG_CPU == SH7034
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2007-01-08 18:21:12 +00:00
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OUTPUT_FORMAT(elf32-sh)
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2006-08-31 19:45:05 +00:00
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INPUT(target/sh/crt0.o)
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#else
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2007-01-08 18:21:12 +00:00
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OUTPUT_FORMAT(elf32-sh)
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2004-09-03 13:02:16 +00:00
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INPUT(crt0.o)
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2006-08-31 19:45:05 +00:00
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#endif
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2005-01-12 01:25:19 +00:00
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2005-02-15 14:00:37 +00:00
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#if MEMORYSIZE >= 32
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2007-01-08 18:21:12 +00:00
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#define PLUGINSIZE PLUGIN_BUFFER_SIZE
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2005-02-15 14:00:37 +00:00
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#else
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2005-01-12 01:25:19 +00:00
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#define PLUGINSIZE 0x8000
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2005-02-15 14:00:37 +00:00
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#endif
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2005-01-12 01:25:19 +00:00
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2005-01-28 13:19:01 +00:00
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2007-01-08 18:21:12 +00:00
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#ifdef IRIVER_H100_SERIES
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#define CODECSIZE CODEC_SIZE
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2005-04-20 06:48:17 +00:00
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#define DRAMORIG 0x31000000
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2005-01-28 13:19:01 +00:00
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#define IRAMORIG 0x10000000
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2007-01-08 18:21:12 +00:00
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#define IRAMSIZE 0xc000
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#define FLASHORIG 0x00100028
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#define FLASHSIZE 0x000eff80
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2005-01-28 13:19:01 +00:00
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#else
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#define DRAMORIG 0x09000000
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2005-01-12 01:25:19 +00:00
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#define IRAMORIG 0x0f000000
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#define IRAMSIZE 0x1000
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#define FLASHORIG 0x02000000 + ROM_START
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#define FLASHSIZE 256K - ROM_START
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2005-01-28 13:19:01 +00:00
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#endif
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2005-01-12 01:25:19 +00:00
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2007-01-08 18:21:12 +00:00
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#ifdef CODECSIZE
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - CODECSIZE
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/* Where the codec buffer ends, and the plugin buffer starts */
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#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
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#else
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE
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/* Where the audio buffer ends, and the plugin buffer starts */
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#define ENDADDR ENDAUDIOADDR
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#endif
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/* End of the audio buffer, where the codec/plugin buffer starts */
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#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
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2005-01-12 01:25:19 +00:00
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2004-09-03 13:02:16 +00:00
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MEMORY
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{
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2005-01-12 01:25:19 +00:00
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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FLASH : ORIGIN = FLASHORIG, LENGTH = FLASHSIZE
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2004-09-03 13:02:16 +00:00
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}
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SECTIONS
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{
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2005-08-23 07:26:40 +00:00
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.flashheader :
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{
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/* place flash link address first, so the plugin can check */
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LONG(FLASHORIG);
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/* followed by the start address, the first vector takes care of this. */
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/* If we ever place the table elsewhere, put a constant here. */
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} > FLASH
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2004-09-03 13:02:16 +00:00
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.vectors :
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{
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_datacopy = .;
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} > FLASH
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.data : AT ( _datacopy )
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{
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2005-03-31 08:47:02 +00:00
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loadaddress = .;
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_loadaddress = .;
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2004-09-03 13:02:16 +00:00
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_datastart = .;
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*(.resetvectors);
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*(.vectors);
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2005-01-28 13:19:01 +00:00
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. = ALIGN(0x200);
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2004-09-03 13:02:16 +00:00
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*(.data)
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. = ALIGN(0x4);
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2007-01-08 18:21:12 +00:00
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_dataend = .;
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2004-09-06 07:05:12 +00:00
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. = ALIGN(0x10); /* Maintain proper alignment for .text section */
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2004-09-03 13:02:16 +00:00
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} > DRAM
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2007-01-08 18:21:12 +00:00
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/DISCARD/ :
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{
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*(.eh_frame)
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}
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2004-09-06 07:05:12 +00:00
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/* TRICK ALERT! Newer versions of the linker don't allow output sections
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to overlap even if one of them is empty, so advance the location pointer
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"by hand" */
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.text LOADADDR(.data) + SIZEOF(.data) :
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2004-09-03 13:02:16 +00:00
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{
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*(.init.text)
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*(.text)
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. = ALIGN(0x4);
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} > FLASH
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.rodata :
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{
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*(.rodata)
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2005-01-28 13:19:01 +00:00
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*(.rodata.str1.1)
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2004-09-03 13:02:16 +00:00
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*(.rodata.str1.4)
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. = ALIGN(0x4);
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_iramcopy = .;
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} > FLASH
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2005-01-28 13:19:01 +00:00
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.iram IRAMORIG : AT ( _iramcopy )
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2004-09-03 13:02:16 +00:00
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{
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_iramstart = .;
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*(.icode)
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2005-10-19 19:35:24 +00:00
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*(.irodata)
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2004-09-03 13:02:16 +00:00
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*(.idata)
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_iramend = .;
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} > IRAM
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2007-01-08 18:21:12 +00:00
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2005-10-19 19:35:24 +00:00
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.ibss)
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. = ALIGN(0x4);
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_iend = .;
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} > IRAM
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2004-09-03 13:02:16 +00:00
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.stack :
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{
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*(.stack)
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_stackbegin = .;
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2005-01-28 13:19:01 +00:00
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stackbegin = .;
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2004-09-03 13:02:16 +00:00
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. += 0x2000;
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_stackend = .;
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2005-01-28 13:19:01 +00:00
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stackend = .;
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2007-01-08 18:21:12 +00:00
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} > IRAM
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2004-09-03 13:02:16 +00:00
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2007-01-08 18:21:12 +00:00
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#ifdef CPU_COLDFIRE
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.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
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#else
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2004-09-03 13:02:16 +00:00
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.bss :
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2007-01-08 18:21:12 +00:00
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#endif
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2004-09-03 13:02:16 +00:00
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{
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_edata = .;
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2007-01-08 18:21:12 +00:00
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*(.bss*)
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2004-09-03 13:02:16 +00:00
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*(COMMON)
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2007-01-08 18:21:12 +00:00
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. = ALIGN(0x4);
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2004-09-03 13:02:16 +00:00
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_end = .;
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} > DRAM
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2007-01-08 18:21:12 +00:00
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.audiobuf ALIGN(4):
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2004-09-03 13:02:16 +00:00
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{
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2005-04-05 11:33:58 +00:00
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_audiobuffer = .;
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2007-01-08 18:21:12 +00:00
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audiobuffer = .;
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2004-09-03 13:02:16 +00:00
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} > DRAM
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2007-01-08 18:21:12 +00:00
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#ifdef CODECSIZE
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.audiobufend ENDAUDIOADDR:
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#else
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2005-04-05 11:33:58 +00:00
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.audiobufend ENDADDR:
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2007-01-08 18:21:12 +00:00
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#endif
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2004-09-03 13:02:16 +00:00
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{
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2005-04-05 11:33:58 +00:00
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_audiobufend = .;
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2007-01-08 18:21:12 +00:00
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audiobufend = .;
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2004-09-03 13:02:16 +00:00
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} > DRAM
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2007-01-08 18:21:12 +00:00
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#ifdef CODECSIZE
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.codec ENDAUDIOADDR:
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{
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codecbuf = .;
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_codecbuf = .;
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}
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#endif
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2005-01-12 01:25:19 +00:00
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.plugin ENDADDR:
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2004-09-03 13:02:16 +00:00
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{
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_pluginbuf = .;
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2007-01-08 18:21:12 +00:00
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pluginbuf = .;
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2004-09-03 13:02:16 +00:00
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}
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}
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