2013-06-13 17:03:33 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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2014-02-18 17:19:44 +00:00
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* headergen version: 2.1.8
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2013-06-13 17:03:33 +00:00
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* XML versions: stmp3600:2.3.0
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*
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* Copyright (C) 2013 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN__STMP3600__TIMROT__H__
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#define __HEADERGEN__STMP3600__TIMROT__H__
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#define REGS_TIMROT_BASE (0x80068000)
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#define REGS_TIMROT_VERSION "2.3.0"
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/**
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* Register: HW_TIMROT_ROTCTRL
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* Address: 0
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* SCT: yes
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*/
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#define HW_TIMROT_ROTCTRL (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x0 + 0x0))
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#define HW_TIMROT_ROTCTRL_SET (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x0 + 0x4))
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#define HW_TIMROT_ROTCTRL_CLR (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x0 + 0x8))
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#define HW_TIMROT_ROTCTRL_TOG (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x0 + 0xc))
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#define BP_TIMROT_ROTCTRL_SFTRST 31
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#define BM_TIMROT_ROTCTRL_SFTRST 0x80000000
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#define BF_TIMROT_ROTCTRL_SFTRST(v) (((v) << 31) & 0x80000000)
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#define BP_TIMROT_ROTCTRL_CLKGATE 30
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#define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000
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#define BF_TIMROT_ROTCTRL_CLKGATE(v) (((v) << 30) & 0x40000000)
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#define BP_TIMROT_ROTCTRL_ROTARY_PRESENT 29
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#define BM_TIMROT_ROTCTRL_ROTARY_PRESENT 0x20000000
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#define BF_TIMROT_ROTCTRL_ROTARY_PRESENT(v) (((v) << 29) & 0x20000000)
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#define BP_TIMROT_ROTCTRL_TIM3_PRESENT 28
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#define BM_TIMROT_ROTCTRL_TIM3_PRESENT 0x10000000
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#define BF_TIMROT_ROTCTRL_TIM3_PRESENT(v) (((v) << 28) & 0x10000000)
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#define BP_TIMROT_ROTCTRL_TIM2_PRESENT 27
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#define BM_TIMROT_ROTCTRL_TIM2_PRESENT 0x8000000
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#define BF_TIMROT_ROTCTRL_TIM2_PRESENT(v) (((v) << 27) & 0x8000000)
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#define BP_TIMROT_ROTCTRL_TIM1_PRESENT 26
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#define BM_TIMROT_ROTCTRL_TIM1_PRESENT 0x4000000
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#define BF_TIMROT_ROTCTRL_TIM1_PRESENT(v) (((v) << 26) & 0x4000000)
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#define BP_TIMROT_ROTCTRL_TIM0_PRESENT 25
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#define BM_TIMROT_ROTCTRL_TIM0_PRESENT 0x2000000
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#define BF_TIMROT_ROTCTRL_TIM0_PRESENT(v) (((v) << 25) & 0x2000000)
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#define BP_TIMROT_ROTCTRL_STATE 22
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#define BM_TIMROT_ROTCTRL_STATE 0x1c00000
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#define BF_TIMROT_ROTCTRL_STATE(v) (((v) << 22) & 0x1c00000)
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#define BP_TIMROT_ROTCTRL_DIVIDER 16
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#define BM_TIMROT_ROTCTRL_DIVIDER 0x3f0000
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#define BF_TIMROT_ROTCTRL_DIVIDER(v) (((v) << 16) & 0x3f0000)
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#define BP_TIMROT_ROTCTRL_RELATIVE 12
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#define BM_TIMROT_ROTCTRL_RELATIVE 0x1000
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#define BF_TIMROT_ROTCTRL_RELATIVE(v) (((v) << 12) & 0x1000)
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#define BP_TIMROT_ROTCTRL_OVERSAMPLE 10
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#define BM_TIMROT_ROTCTRL_OVERSAMPLE 0xc00
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__8X 0x0
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__4X 0x1
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__2X 0x2
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__1X 0x3
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#define BF_TIMROT_ROTCTRL_OVERSAMPLE(v) (((v) << 10) & 0xc00)
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#define BF_TIMROT_ROTCTRL_OVERSAMPLE_V(v) ((BV_TIMROT_ROTCTRL_OVERSAMPLE__##v << 10) & 0xc00)
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#define BP_TIMROT_ROTCTRL_POLARITY_B 9
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#define BM_TIMROT_ROTCTRL_POLARITY_B 0x200
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#define BF_TIMROT_ROTCTRL_POLARITY_B(v) (((v) << 9) & 0x200)
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#define BP_TIMROT_ROTCTRL_POLARITY_A 8
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#define BM_TIMROT_ROTCTRL_POLARITY_A 0x100
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#define BF_TIMROT_ROTCTRL_POLARITY_A(v) (((v) << 8) & 0x100)
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#define BP_TIMROT_ROTCTRL_SELECT_B 4
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#define BM_TIMROT_ROTCTRL_SELECT_B 0x70
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#define BV_TIMROT_ROTCTRL_SELECT_B__NEVER_TICK 0x0
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM0 0x1
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM1 0x2
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM2 0x3
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM3 0x4
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM4 0x5
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#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYA 0x6
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#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYB 0x7
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#define BF_TIMROT_ROTCTRL_SELECT_B(v) (((v) << 4) & 0x70)
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#define BF_TIMROT_ROTCTRL_SELECT_B_V(v) ((BV_TIMROT_ROTCTRL_SELECT_B__##v << 4) & 0x70)
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#define BP_TIMROT_ROTCTRL_SELECT_A 0
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#define BM_TIMROT_ROTCTRL_SELECT_A 0x7
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#define BV_TIMROT_ROTCTRL_SELECT_A__NEVER_TICK 0x0
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM0 0x1
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM1 0x2
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM2 0x3
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM3 0x4
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM4 0x5
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#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA 0x6
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#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYB 0x7
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#define BF_TIMROT_ROTCTRL_SELECT_A(v) (((v) << 0) & 0x7)
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#define BF_TIMROT_ROTCTRL_SELECT_A_V(v) ((BV_TIMROT_ROTCTRL_SELECT_A__##v << 0) & 0x7)
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/**
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* Register: HW_TIMROT_ROTCOUNT
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* Address: 0x10
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* SCT: no
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*/
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#define HW_TIMROT_ROTCOUNT (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x10))
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#define BP_TIMROT_ROTCOUNT_UPDOWN 0
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#define BM_TIMROT_ROTCOUNT_UPDOWN 0xffff
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#define BF_TIMROT_ROTCOUNT_UPDOWN(v) (((v) << 0) & 0xffff)
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/**
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* Register: HW_TIMROT_TIMCTRL3
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* Address: 0x80
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* SCT: yes
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*/
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#define HW_TIMROT_TIMCTRL3 (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x80 + 0x0))
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#define HW_TIMROT_TIMCTRL3_SET (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x80 + 0x4))
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#define HW_TIMROT_TIMCTRL3_CLR (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x80 + 0x8))
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#define HW_TIMROT_TIMCTRL3_TOG (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x80 + 0xc))
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#define BP_TIMROT_TIMCTRL3_TEST_SIGNAL 16
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#define BM_TIMROT_TIMCTRL3_TEST_SIGNAL 0xf0000
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM0 0x1
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM1 0x2
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM2 0x3
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM3 0x4
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM4 0x5
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__4KHZ_XTAL 0xa
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__1KHZ_XTAL 0xb
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__TICK_ALWAYS 0xc
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#define BF_TIMROT_TIMCTRL3_TEST_SIGNAL(v) (((v) << 16) & 0xf0000)
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#define BF_TIMROT_TIMCTRL3_TEST_SIGNAL_V(v) ((BV_TIMROT_TIMCTRL3_TEST_SIGNAL__##v << 16) & 0xf0000)
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#define BP_TIMROT_TIMCTRL3_IRQ 15
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#define BM_TIMROT_TIMCTRL3_IRQ 0x8000
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#define BF_TIMROT_TIMCTRL3_IRQ(v) (((v) << 15) & 0x8000)
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#define BP_TIMROT_TIMCTRL3_IRQ_EN 14
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#define BM_TIMROT_TIMCTRL3_IRQ_EN 0x4000
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#define BF_TIMROT_TIMCTRL3_IRQ_EN(v) (((v) << 14) & 0x4000)
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#define BP_TIMROT_TIMCTRL3_DUTY_VALID 10
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#define BM_TIMROT_TIMCTRL3_DUTY_VALID 0x400
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#define BF_TIMROT_TIMCTRL3_DUTY_VALID(v) (((v) << 10) & 0x400)
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#define BP_TIMROT_TIMCTRL3_DUTY_CYCLE 9
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#define BM_TIMROT_TIMCTRL3_DUTY_CYCLE 0x200
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#define BF_TIMROT_TIMCTRL3_DUTY_CYCLE(v) (((v) << 9) & 0x200)
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#define BP_TIMROT_TIMCTRL3_POLARITY 8
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#define BM_TIMROT_TIMCTRL3_POLARITY 0x100
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#define BF_TIMROT_TIMCTRL3_POLARITY(v) (((v) << 8) & 0x100)
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#define BP_TIMROT_TIMCTRL3_UPDATE 7
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#define BM_TIMROT_TIMCTRL3_UPDATE 0x80
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#define BF_TIMROT_TIMCTRL3_UPDATE(v) (((v) << 7) & 0x80)
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#define BP_TIMROT_TIMCTRL3_RELOAD 6
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#define BM_TIMROT_TIMCTRL3_RELOAD 0x40
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#define BF_TIMROT_TIMCTRL3_RELOAD(v) (((v) << 6) & 0x40)
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#define BP_TIMROT_TIMCTRL3_PRESCALE 4
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#define BM_TIMROT_TIMCTRL3_PRESCALE 0x30
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_1 0x0
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_2 0x1
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_4 0x2
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_8 0x3
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#define BF_TIMROT_TIMCTRL3_PRESCALE(v) (((v) << 4) & 0x30)
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#define BF_TIMROT_TIMCTRL3_PRESCALE_V(v) ((BV_TIMROT_TIMCTRL3_PRESCALE__##v << 4) & 0x30)
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#define BP_TIMROT_TIMCTRL3_SELECT 0
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#define BM_TIMROT_TIMCTRL3_SELECT 0xf
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#define BV_TIMROT_TIMCTRL3_SELECT__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM0 0x1
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM1 0x2
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM2 0x3
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM3 0x4
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM4 0x5
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#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRL3_SELECT__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRL3_SELECT__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRL3_SELECT__4KHZ_XTAL 0xa
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#define BV_TIMROT_TIMCTRL3_SELECT__1KHZ_XTAL 0xb
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#define BV_TIMROT_TIMCTRL3_SELECT__TICK_ALWAYS 0xc
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#define BF_TIMROT_TIMCTRL3_SELECT(v) (((v) << 0) & 0xf)
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#define BF_TIMROT_TIMCTRL3_SELECT_V(v) ((BV_TIMROT_TIMCTRL3_SELECT__##v << 0) & 0xf)
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/**
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* Register: HW_TIMROT_TIMCOUNT3
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* Address: 0x90
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* SCT: no
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*/
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#define HW_TIMROT_TIMCOUNT3 (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x90))
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#define BP_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 16
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#define BM_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 0xffff0000
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#define BF_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT(v) (((v) << 16) & 0xffff0000)
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#define BP_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0
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#define BM_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0xffff
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#define BF_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT(v) (((v) << 0) & 0xffff)
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/**
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* Register: HW_TIMROT_TIMCOUNTn
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* Address: 0x30+n*0x20
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* SCT: no
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*/
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#define HW_TIMROT_TIMCOUNTn(n) (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x30+(n)*0x20))
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#define BP_TIMROT_TIMCOUNTn_RUNNING_COUNT 16
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#define BM_TIMROT_TIMCOUNTn_RUNNING_COUNT 0xffff0000
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#define BF_TIMROT_TIMCOUNTn_RUNNING_COUNT(v) (((v) << 16) & 0xffff0000)
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#define BP_TIMROT_TIMCOUNTn_FIXED_COUNT 0
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#define BM_TIMROT_TIMCOUNTn_FIXED_COUNT 0xffff
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#define BF_TIMROT_TIMCOUNTn_FIXED_COUNT(v) (((v) << 0) & 0xffff)
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/**
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* Register: HW_TIMROT_TIMCTRLn
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* Address: 0x20+n*0x20
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* SCT: yes
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*/
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#define HW_TIMROT_TIMCTRLn(n) (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x20+(n)*0x20 + 0x0))
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#define HW_TIMROT_TIMCTRLn_SET(n) (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x20+(n)*0x20 + 0x4))
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#define HW_TIMROT_TIMCTRLn_CLR(n) (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x20+(n)*0x20 + 0x8))
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#define HW_TIMROT_TIMCTRLn_TOG(n) (*(volatile unsigned long *)(REGS_TIMROT_BASE + 0x20+(n)*0x20 + 0xc))
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#define BP_TIMROT_TIMCTRLn_IRQ 15
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#define BM_TIMROT_TIMCTRLn_IRQ 0x8000
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#define BF_TIMROT_TIMCTRLn_IRQ(v) (((v) << 15) & 0x8000)
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#define BP_TIMROT_TIMCTRLn_IRQ_EN 14
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#define BM_TIMROT_TIMCTRLn_IRQ_EN 0x4000
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#define BF_TIMROT_TIMCTRLn_IRQ_EN(v) (((v) << 14) & 0x4000)
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#define BP_TIMROT_TIMCTRLn_POLARITY 8
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#define BM_TIMROT_TIMCTRLn_POLARITY 0x100
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#define BF_TIMROT_TIMCTRLn_POLARITY(v) (((v) << 8) & 0x100)
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#define BP_TIMROT_TIMCTRLn_UPDATE 7
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#define BM_TIMROT_TIMCTRLn_UPDATE 0x80
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#define BF_TIMROT_TIMCTRLn_UPDATE(v) (((v) << 7) & 0x80)
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#define BP_TIMROT_TIMCTRLn_RELOAD 6
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#define BM_TIMROT_TIMCTRLn_RELOAD 0x40
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#define BF_TIMROT_TIMCTRLn_RELOAD(v) (((v) << 6) & 0x40)
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#define BP_TIMROT_TIMCTRLn_PRESCALE 4
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#define BM_TIMROT_TIMCTRLn_PRESCALE 0x30
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_1 0x0
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_2 0x1
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_4 0x2
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_8 0x3
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#define BF_TIMROT_TIMCTRLn_PRESCALE(v) (((v) << 4) & 0x30)
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#define BF_TIMROT_TIMCTRLn_PRESCALE_V(v) ((BV_TIMROT_TIMCTRLn_PRESCALE__##v << 4) & 0x30)
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#define BP_TIMROT_TIMCTRLn_SELECT 0
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#define BM_TIMROT_TIMCTRLn_SELECT 0xf
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#define BV_TIMROT_TIMCTRLn_SELECT__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM0 0x1
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM1 0x2
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM2 0x3
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM3 0x4
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM4 0x5
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#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRLn_SELECT__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRLn_SELECT__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRLn_SELECT__4KHZ_XTAL 0xa
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#define BV_TIMROT_TIMCTRLn_SELECT__1KHZ_XTAL 0xb
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#define BV_TIMROT_TIMCTRLn_SELECT__TICK_ALWAYS 0xc
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#define BF_TIMROT_TIMCTRLn_SELECT(v) (((v) << 0) & 0xf)
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#define BF_TIMROT_TIMCTRLn_SELECT_V(v) ((BV_TIMROT_TIMCTRLn_SELECT__##v << 0) & 0xf)
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#endif /* __HEADERGEN__STMP3600__TIMROT__H__ */
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