438 lines
9.3 KiB
C
438 lines
9.3 KiB
C
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/*
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* Copyright (C) 1996-1998 Szeredi Miklos
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* Email: mszeredi@inf.bme.hu
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version. See the file COPYING.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef NO_OPDEF
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#include "z80_def.h"
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#include "z80_op6.h"
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#endif
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#define GHL DANM(cbaddr)
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#define B7(r) (((r) & 0x80) >> 7)
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#define B0(r) ((r) & 0x01)
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#define SHIFTROTL(r, mod) \
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{ \
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register int carry; \
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carry = B7(r); \
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r = mod; \
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RF = (RF & ~(AALLF)) | carry | \
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TAB(orf_tbl)[(byte) r]; \
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}
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#define SHIFTROTR(r, mod) \
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{ \
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register int carry; \
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carry = B0(r); \
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r = mod; \
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RF = (RF & ~(AALLF)) | carry | \
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TAB(orf_tbl)[(byte) r]; \
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}
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#define RLC(r) SHIFTROTL(r, (r << 1) | carry)
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#define RRC(r) SHIFTROTR(r, (r >> 1) | (carry << 7))
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#define RLN(r) SHIFTROTL(r, (r << 1) | (RF & CF))
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#define RRN(r) SHIFTROTR(r, (r >> 1) | ((RF & CF) << 7))
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#define SLA(r) SHIFTROTL(r, r << 1)
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#define SRA(r) SHIFTROTR(r, (byte) ((sbyte) r >> 1))
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#define SLL(r) SHIFTROTL(r, (r << 1) | 0x01)
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#define SRL(r) SHIFTROTR(r, r >> 1)
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#define SHRR(shrn, func, an, rn, r, n) \
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OPDEF(shrn ## _ ## rn, 0x00+an*8+n) \
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{ \
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func(r); \
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ENTIME(8); \
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}
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#define SHRIHL(shrn, func, an) \
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OPDEF(shrn ## _ihl, 0x06+an*8) \
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{ \
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register byte btmp; \
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btmp = READ(GHL); \
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func(btmp); \
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WRITE(GHL, btmp); \
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ENTIME(15); \
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}
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#define RLC_R(rn, r, n) SHRR(rlc, RLC, 0, rn, r, n)
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#define RRC_R(rn, r, n) SHRR(rrc, RRC, 1, rn, r, n)
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#define RL_R(rn, r, n) SHRR(rl, RLN, 2, rn, r, n)
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#define RR_R(rn, r, n) SHRR(rr, RRN, 3, rn, r, n)
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#define SLA_R(rn, r, n) SHRR(sla, SLA, 4, rn, r, n)
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#define SRA_R(rn, r, n) SHRR(sra, SRA, 5, rn, r, n)
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#define SLL_R(rn, r, n) SHRR(sll, SLL, 6, rn, r, n)
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#define SRL_R(rn, r, n) SHRR(srl, SRL, 7, rn, r, n)
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RLC_R(b, RB, 0)
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RLC_R(c, RC, 1)
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RLC_R(d, RD, 2)
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RLC_R(e, RE, 3)
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RLC_R(h, RH, 4)
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RLC_R(l, RL, 5)
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RLC_R(a, RA, 7)
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RRC_R(b, RB, 0)
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RRC_R(c, RC, 1)
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RRC_R(d, RD, 2)
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RRC_R(e, RE, 3)
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RRC_R(h, RH, 4)
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RRC_R(l, RL, 5)
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RRC_R(a, RA, 7)
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RL_R(b, RB, 0)
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RL_R(c, RC, 1)
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RL_R(d, RD, 2)
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RL_R(e, RE, 3)
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RL_R(h, RH, 4)
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RL_R(l, RL, 5)
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RL_R(a, RA, 7)
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RR_R(b, RB, 0)
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RR_R(c, RC, 1)
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RR_R(d, RD, 2)
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RR_R(e, RE, 3)
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RR_R(h, RH, 4)
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RR_R(l, RL, 5)
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RR_R(a, RA, 7)
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SLA_R(b, RB, 0)
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SLA_R(c, RC, 1)
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SLA_R(d, RD, 2)
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SLA_R(e, RE, 3)
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SLA_R(h, RH, 4)
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SLA_R(l, RL, 5)
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SLA_R(a, RA, 7)
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SRA_R(b, RB, 0)
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SRA_R(c, RC, 1)
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SRA_R(d, RD, 2)
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SRA_R(e, RE, 3)
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SRA_R(h, RH, 4)
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SRA_R(l, RL, 5)
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SRA_R(a, RA, 7)
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SLL_R(b, RB, 0)
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SLL_R(c, RC, 1)
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SLL_R(d, RD, 2)
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SLL_R(e, RE, 3)
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SLL_R(h, RH, 4)
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SLL_R(l, RL, 5)
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SLL_R(a, RA, 7)
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SRL_R(b, RB, 0)
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SRL_R(c, RC, 1)
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SRL_R(d, RD, 2)
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SRL_R(e, RE, 3)
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SRL_R(h, RH, 4)
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SRL_R(l, RL, 5)
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SRL_R(a, RA, 7)
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SHRIHL(rlc, RLC, 0)
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SHRIHL(rrc, RRC, 1)
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SHRIHL(rl, RLN, 2)
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SHRIHL(rr, RRN, 3)
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SHRIHL(sla, SLA, 4)
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SHRIHL(sra, SRA, 5)
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SHRIHL(sll, SLL, 6)
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SHRIHL(srl, SRL, 7)
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#define BIT(r, n) \
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RF = (RF & ~(SF | ZF | NF)) | (r & SF) | (((~r >> n) & 0x01) << 6)
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#define BIT_N_R(bn, rn, r, n) \
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OPDEF(bit_ ## bn ## _ ## rn, 0x40+bn*8+n) \
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{ \
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BIT(r, bn); \
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ENTIME(8); \
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}
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#define BIT_N_IHL(bn) \
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OPDEF(bit_ ## bn ## _ihl, 0x46+bn*8) \
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{ \
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register byte btmp; \
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btmp = READ(GHL); \
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BIT(btmp, bn); \
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ENTIME(12); \
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}
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BIT_N_R(0, b, RB, 0)
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BIT_N_R(0, c, RC, 1)
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BIT_N_R(0, d, RD, 2)
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BIT_N_R(0, e, RE, 3)
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BIT_N_R(0, h, RH, 4)
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BIT_N_R(0, l, RL, 5)
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BIT_N_R(0, a, RA, 7)
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BIT_N_R(1, b, RB, 0)
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BIT_N_R(1, c, RC, 1)
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BIT_N_R(1, d, RD, 2)
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BIT_N_R(1, e, RE, 3)
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BIT_N_R(1, h, RH, 4)
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BIT_N_R(1, l, RL, 5)
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BIT_N_R(1, a, RA, 7)
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BIT_N_R(2, b, RB, 0)
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BIT_N_R(2, c, RC, 1)
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BIT_N_R(2, d, RD, 2)
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BIT_N_R(2, e, RE, 3)
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BIT_N_R(2, h, RH, 4)
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BIT_N_R(2, l, RL, 5)
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BIT_N_R(2, a, RA, 7)
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BIT_N_R(3, b, RB, 0)
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BIT_N_R(3, c, RC, 1)
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BIT_N_R(3, d, RD, 2)
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BIT_N_R(3, e, RE, 3)
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BIT_N_R(3, h, RH, 4)
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BIT_N_R(3, l, RL, 5)
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BIT_N_R(3, a, RA, 7)
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BIT_N_R(4, b, RB, 0)
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BIT_N_R(4, c, RC, 1)
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BIT_N_R(4, d, RD, 2)
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BIT_N_R(4, e, RE, 3)
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BIT_N_R(4, h, RH, 4)
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BIT_N_R(4, l, RL, 5)
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BIT_N_R(4, a, RA, 7)
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BIT_N_R(5, b, RB, 0)
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BIT_N_R(5, c, RC, 1)
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BIT_N_R(5, d, RD, 2)
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BIT_N_R(5, e, RE, 3)
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BIT_N_R(5, h, RH, 4)
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BIT_N_R(5, l, RL, 5)
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BIT_N_R(5, a, RA, 7)
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BIT_N_R(6, b, RB, 0)
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BIT_N_R(6, c, RC, 1)
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BIT_N_R(6, d, RD, 2)
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BIT_N_R(6, e, RE, 3)
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BIT_N_R(6, h, RH, 4)
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BIT_N_R(6, l, RL, 5)
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BIT_N_R(6, a, RA, 7)
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BIT_N_R(7, b, RB, 0)
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BIT_N_R(7, c, RC, 1)
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BIT_N_R(7, d, RD, 2)
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BIT_N_R(7, e, RE, 3)
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BIT_N_R(7, h, RH, 4)
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BIT_N_R(7, l, RL, 5)
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BIT_N_R(7, a, RA, 7)
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BIT_N_IHL(0)
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BIT_N_IHL(1)
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BIT_N_IHL(2)
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BIT_N_IHL(3)
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BIT_N_IHL(4)
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BIT_N_IHL(5)
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BIT_N_IHL(6)
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BIT_N_IHL(7)
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#define RES(r, n) r &= ~(1 << n)
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#define RES_N_R(bn, rn, r, n) \
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OPDEF(res_ ## bn ## _ ## rn, 0x80+bn*8+n) \
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{ \
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RES(r, bn); \
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ENTIME(8); \
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}
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#define RES_N_IHL(bn) \
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OPDEF(res_ ## bn ## _ihl, 0x86+bn*8) \
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{ \
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register byte btmp; \
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btmp = READ(GHL); \
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RES(btmp, bn); \
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WRITE(GHL, btmp); \
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ENTIME(15); \
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}
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RES_N_R(0, b, RB, 0)
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RES_N_R(0, c, RC, 1)
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RES_N_R(0, d, RD, 2)
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RES_N_R(0, e, RE, 3)
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RES_N_R(0, h, RH, 4)
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RES_N_R(0, l, RL, 5)
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RES_N_R(0, a, RA, 7)
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RES_N_R(1, b, RB, 0)
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RES_N_R(1, c, RC, 1)
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RES_N_R(1, d, RD, 2)
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RES_N_R(1, e, RE, 3)
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RES_N_R(1, h, RH, 4)
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RES_N_R(1, l, RL, 5)
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RES_N_R(1, a, RA, 7)
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RES_N_R(2, b, RB, 0)
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RES_N_R(2, c, RC, 1)
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RES_N_R(2, d, RD, 2)
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RES_N_R(2, e, RE, 3)
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RES_N_R(2, h, RH, 4)
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RES_N_R(2, l, RL, 5)
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RES_N_R(2, a, RA, 7)
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RES_N_R(3, b, RB, 0)
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RES_N_R(3, c, RC, 1)
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RES_N_R(3, d, RD, 2)
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RES_N_R(3, e, RE, 3)
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RES_N_R(3, h, RH, 4)
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RES_N_R(3, l, RL, 5)
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RES_N_R(3, a, RA, 7)
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RES_N_R(4, b, RB, 0)
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RES_N_R(4, c, RC, 1)
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RES_N_R(4, d, RD, 2)
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RES_N_R(4, e, RE, 3)
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RES_N_R(4, h, RH, 4)
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RES_N_R(4, l, RL, 5)
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RES_N_R(4, a, RA, 7)
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RES_N_R(5, b, RB, 0)
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RES_N_R(5, c, RC, 1)
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RES_N_R(5, d, RD, 2)
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RES_N_R(5, e, RE, 3)
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RES_N_R(5, h, RH, 4)
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RES_N_R(5, l, RL, 5)
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RES_N_R(5, a, RA, 7)
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RES_N_R(6, b, RB, 0)
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RES_N_R(6, c, RC, 1)
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RES_N_R(6, d, RD, 2)
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RES_N_R(6, e, RE, 3)
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RES_N_R(6, h, RH, 4)
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RES_N_R(6, l, RL, 5)
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RES_N_R(6, a, RA, 7)
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RES_N_R(7, b, RB, 0)
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RES_N_R(7, c, RC, 1)
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RES_N_R(7, d, RD, 2)
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RES_N_R(7, e, RE, 3)
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RES_N_R(7, h, RH, 4)
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RES_N_R(7, l, RL, 5)
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|
RES_N_R(7, a, RA, 7)
|
||
|
|
|
||
|
|
RES_N_IHL(0)
|
||
|
|
RES_N_IHL(1)
|
||
|
|
RES_N_IHL(2)
|
||
|
|
RES_N_IHL(3)
|
||
|
|
RES_N_IHL(4)
|
||
|
|
RES_N_IHL(5)
|
||
|
|
RES_N_IHL(6)
|
||
|
|
RES_N_IHL(7)
|
||
|
|
|
||
|
|
|
||
|
|
#define SET(r, n) r |= (1 << n)
|
||
|
|
|
||
|
|
#define SET_N_R(bn, rn, r, n) \
|
||
|
|
OPDEF(set_ ## bn ## _ ## rn, 0xC0+bn*8+n) \
|
||
|
|
{ \
|
||
|
|
SET(r, bn); \
|
||
|
|
ENTIME(8); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define SET_N_IHL(bn) \
|
||
|
|
OPDEF(set_ ## bn ## _ihl, 0x86+bn*8) \
|
||
|
|
{ \
|
||
|
|
register byte btmp; \
|
||
|
|
btmp = READ(GHL); \
|
||
|
|
SET(btmp, bn); \
|
||
|
|
WRITE(GHL, btmp); \
|
||
|
|
ENTIME(15); \
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
SET_N_R(0, b, RB, 0)
|
||
|
|
SET_N_R(0, c, RC, 1)
|
||
|
|
SET_N_R(0, d, RD, 2)
|
||
|
|
SET_N_R(0, e, RE, 3)
|
||
|
|
SET_N_R(0, h, RH, 4)
|
||
|
|
SET_N_R(0, l, RL, 5)
|
||
|
|
SET_N_R(0, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(1, b, RB, 0)
|
||
|
|
SET_N_R(1, c, RC, 1)
|
||
|
|
SET_N_R(1, d, RD, 2)
|
||
|
|
SET_N_R(1, e, RE, 3)
|
||
|
|
SET_N_R(1, h, RH, 4)
|
||
|
|
SET_N_R(1, l, RL, 5)
|
||
|
|
SET_N_R(1, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(2, b, RB, 0)
|
||
|
|
SET_N_R(2, c, RC, 1)
|
||
|
|
SET_N_R(2, d, RD, 2)
|
||
|
|
SET_N_R(2, e, RE, 3)
|
||
|
|
SET_N_R(2, h, RH, 4)
|
||
|
|
SET_N_R(2, l, RL, 5)
|
||
|
|
SET_N_R(2, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(3, b, RB, 0)
|
||
|
|
SET_N_R(3, c, RC, 1)
|
||
|
|
SET_N_R(3, d, RD, 2)
|
||
|
|
SET_N_R(3, e, RE, 3)
|
||
|
|
SET_N_R(3, h, RH, 4)
|
||
|
|
SET_N_R(3, l, RL, 5)
|
||
|
|
SET_N_R(3, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(4, b, RB, 0)
|
||
|
|
SET_N_R(4, c, RC, 1)
|
||
|
|
SET_N_R(4, d, RD, 2)
|
||
|
|
SET_N_R(4, e, RE, 3)
|
||
|
|
SET_N_R(4, h, RH, 4)
|
||
|
|
SET_N_R(4, l, RL, 5)
|
||
|
|
SET_N_R(4, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(5, b, RB, 0)
|
||
|
|
SET_N_R(5, c, RC, 1)
|
||
|
|
SET_N_R(5, d, RD, 2)
|
||
|
|
SET_N_R(5, e, RE, 3)
|
||
|
|
SET_N_R(5, h, RH, 4)
|
||
|
|
SET_N_R(5, l, RL, 5)
|
||
|
|
SET_N_R(5, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(6, b, RB, 0)
|
||
|
|
SET_N_R(6, c, RC, 1)
|
||
|
|
SET_N_R(6, d, RD, 2)
|
||
|
|
SET_N_R(6, e, RE, 3)
|
||
|
|
SET_N_R(6, h, RH, 4)
|
||
|
|
SET_N_R(6, l, RL, 5)
|
||
|
|
SET_N_R(6, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_R(7, b, RB, 0)
|
||
|
|
SET_N_R(7, c, RC, 1)
|
||
|
|
SET_N_R(7, d, RD, 2)
|
||
|
|
SET_N_R(7, e, RE, 3)
|
||
|
|
SET_N_R(7, h, RH, 4)
|
||
|
|
SET_N_R(7, l, RL, 5)
|
||
|
|
SET_N_R(7, a, RA, 7)
|
||
|
|
|
||
|
|
SET_N_IHL(0)
|
||
|
|
SET_N_IHL(1)
|
||
|
|
SET_N_IHL(2)
|
||
|
|
SET_N_IHL(3)
|
||
|
|
SET_N_IHL(4)
|
||
|
|
SET_N_IHL(5)
|
||
|
|
SET_N_IHL(6)
|
||
|
|
SET_N_IHL(7)
|