2006-12-29 02:49:12 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Michael Sevakis
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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2007-05-02 22:33:24 +00:00
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#include <stdlib.h>
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2006-12-29 02:49:12 +00:00
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#include "system.h"
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#include "kernel.h"
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#include "logf.h"
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#include "audio.h"
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2007-03-11 06:21:43 +00:00
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#include "sound.h"
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2006-12-29 02:49:12 +00:00
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#include "file.h"
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2007-01-04 11:36:25 +00:00
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#include "mmu-meg-fx.h"
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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#define GIGABEAT_8000HZ (0x02 << 1)
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#define GIGABEAT_11025HZ (0x19 << 1)
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#define GIGABEAT_22050HZ (0x1b << 1)
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#define GIGABEAT_44100HZ (0x11 << 1)
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#define GIGABEAT_88200HZ (0x1f << 1)
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2007-01-18 13:48:06 +00:00
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2007-05-02 22:33:24 +00:00
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static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
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static int sr_ctrl = GIGABEAT_44100HZ;
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2006-12-29 02:49:12 +00:00
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#define FIFO_COUNT ((IISFCON >> 6) & 0x01F)
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/* number of bytes in FIFO */
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#define IIS_FIFO_SIZE 64
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/* Setup for the DMA controller */
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#define DMA_CONTROL_SETUP ((1<<31) | (1<<29) | (1<<23) | (1<<22) | (1<<20))
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unsigned short * p;
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size_t p_size;
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/* DMA count has hit zero - no more data */
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/* Get more data from the callback and top off the FIFO */
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//void fiq(void) __attribute__ ((interrupt ("naked")));
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void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
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2007-05-02 22:33:24 +00:00
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static void _pcm_apply_settings(void)
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{
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static int last_freqency = 0;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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if (pcm_freq != last_freqency)
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2006-12-29 02:49:12 +00:00
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{
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2007-05-02 22:33:24 +00:00
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last_freqency = pcm_freq;
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audiohw_set_frequency(sr_ctrl);
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2006-12-29 02:49:12 +00:00
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}
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}
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2007-05-02 22:33:24 +00:00
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void pcm_apply_settings(void)
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{
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int oldstatus = set_fiq_status(FIQ_DISABLED);
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_pcm_apply_settings();
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set_fiq_status(oldstatus);
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}
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2006-12-29 02:49:12 +00:00
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void pcm_init(void)
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{
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pcm_playing = false;
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pcm_paused = false;
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pcm_callback_for_more = NULL;
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2007-01-04 11:36:25 +00:00
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2006-12-29 02:49:12 +00:00
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audiohw_init();
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audiohw_enable_output(true);
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2007-01-16 03:36:32 +00:00
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pcm_set_frequency(SAMPR_44);
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2006-12-29 02:49:12 +00:00
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/* init GPIO */
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GPCCON = (GPCCON & ~(3<<14)) | (1<<14);
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GPCDAT |= 1<<7;
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GPECON |= 0x2aa;
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2007-01-16 03:36:32 +00:00
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/* Do not service DMA requests, yet */
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2006-12-29 02:49:12 +00:00
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/* clear any pending int and mask it */
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INTMSK |= (1<<19); /* mask the interrupt */
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SRCPND = (1<<19); /* clear any pending interrupts */
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INTMOD |= (1<<19); /* connect to FIQ */
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}
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2007-03-11 06:21:43 +00:00
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void pcm_postinit(void)
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{
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audiohw_postinit();
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}
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2006-12-29 02:49:12 +00:00
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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/* sanity check: bad pointer or too small file */
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2007-01-16 03:36:32 +00:00
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if (NULL == addr || size <= IIS_FIFO_SIZE) return;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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disable_fiq();
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2006-12-29 02:49:12 +00:00
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p = (unsigned short *)addr;
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p_size = size;
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/* Enable the IIS clock */
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2007-01-04 11:36:25 +00:00
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CLKCON |= (1<<17);
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2006-12-29 02:49:12 +00:00
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/* IIS interface setup and set to idle */
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IISCON = (1<<5) | (1<<3);
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2007-01-04 11:36:25 +00:00
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/* slave, transmit mode, 16 bit samples - 384fs - use 16.9344Mhz */
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2006-12-29 02:49:12 +00:00
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IISMOD = (1<<9) | (1<<8) | (2<<6) | (1<<3) | (1<<2);
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/* connect DMA to the FIFO and enable the FIFO */
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IISFCON = (1<<15) | (1<<13);
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/* set DMA dest */
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2007-01-04 11:36:25 +00:00
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DIDST2 = (int)&IISFIFO;
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2006-12-29 02:49:12 +00:00
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/* IIS is on the APB bus, INT when TC reaches 0, fixed dest addr */
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DIDSTC2 = 0x03;
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2007-01-04 11:36:25 +00:00
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2006-12-29 02:49:12 +00:00
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/* How many transfers to make - we transfer half-word at a time = 2 bytes */
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/* DMA control: CURR_TC int, single service mode, I2SSDO int, HW trig */
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/* no auto-reload, half-word (16bit) */
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DCON2 = DMA_CONTROL_SETUP | (p_size / 2);
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/* set DMA source and options */
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DISRC2 = (int)p + 0x30000000;
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DISRCC2 = 0x00; /* memory is on AHB bus, increment addresses */
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/* clear pending DMA interrupt */
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SRCPND = 1<<19;
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2007-05-02 22:33:24 +00:00
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pcm_playing = true;
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_pcm_apply_settings();
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2007-01-01 12:09:45 +00:00
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set_fiq_handler(fiq);
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2006-12-29 02:49:12 +00:00
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/* unmask the DMA interrupt */
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INTMSK &= ~(1<<19);
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2007-01-04 11:36:25 +00:00
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/* Flush any pending writes */
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clean_dcache_range(addr, size);
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2006-12-29 02:49:12 +00:00
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/* Activate the channel */
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DMASKTRIG2 = 0x2;
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2007-01-04 11:36:25 +00:00
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2006-12-29 02:49:12 +00:00
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/* turn off the idle */
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IISCON &= ~(1<<3);
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/* start the IIS */
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IISCON |= (1<<0);
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2007-05-02 22:33:24 +00:00
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enable_fiq();
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2006-12-29 02:49:12 +00:00
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}
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2007-05-02 22:33:24 +00:00
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static void pcm_play_dma_stop_fiq(void)
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2006-12-29 02:49:12 +00:00
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{
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/* mask the DMA interrupt */
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INTMSK |= (1<<19);
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2007-01-16 03:36:32 +00:00
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/* are we playing? wait for the chunk to finish */
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if (pcm_playing)
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{
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/* wait for the FIFO to empty before turning things off */
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while (IISCON & (1<<7)) ;
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2006-12-29 02:49:12 +00:00
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2007-01-16 03:36:32 +00:00
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pcm_playing = false;
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}
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2006-12-29 02:49:12 +00:00
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2007-01-16 03:36:32 +00:00
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/* De-Activate the DMA channel */
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DMASKTRIG2 = 0x4;
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2006-12-29 02:49:12 +00:00
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2007-01-16 03:36:32 +00:00
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/* Disconnect the IIS clock */
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2007-01-04 11:36:25 +00:00
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CLKCON &= ~(1<<17);
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2007-05-02 22:33:24 +00:00
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}
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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void fiq(void)
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{
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/* clear any pending interrupt */
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SRCPND = (1<<19);
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/* Buffer empty. Try to get more. */
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if (pcm_callback_for_more)
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{
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pcm_callback_for_more((unsigned char**)&p, &p_size);
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}
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else
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{
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/* callback func is missing? */
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pcm_play_dma_stop_fiq();
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return;
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}
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if (p_size)
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{
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/* Flush any pending cache writes */
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clean_dcache_range(p, p_size);
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/* set the new DMA values */
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DCON2 = DMA_CONTROL_SETUP | (p_size >> 1);
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DISRC2 = (int)p + 0x30000000;
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/* Re-Activate the channel */
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DMASKTRIG2 = 0x2;
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}
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else
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{
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/* No more DMA to do */
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pcm_play_dma_stop_fiq();
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}
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2006-12-29 02:49:12 +00:00
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}
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2007-05-02 22:33:24 +00:00
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/* Disconnect the DMA and wait for the FIFO to clear */
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void pcm_play_dma_stop(void)
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{
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disable_fiq();
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pcm_play_dma_stop_fiq();
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}
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2006-12-29 02:49:12 +00:00
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void pcm_play_pause_pause(void)
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{
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2007-01-16 03:36:32 +00:00
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/* stop servicing refills */
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2007-05-02 22:33:24 +00:00
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int oldstatus = set_fiq_status(FIQ_DISABLED);
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2007-01-16 03:36:32 +00:00
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INTMSK |= (1<<19);
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2007-05-02 22:33:24 +00:00
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set_fiq_status(oldstatus);
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2006-12-29 02:49:12 +00:00
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}
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void pcm_play_pause_unpause(void)
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{
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2007-01-16 03:36:32 +00:00
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/* refill buffer and keep going */
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2007-05-02 22:33:24 +00:00
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int oldstatus = set_fiq_status(FIQ_DISABLED);
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_pcm_apply_settings();
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2007-01-16 03:36:32 +00:00
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INTMSK &= ~(1<<19);
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2007-05-02 22:33:24 +00:00
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set_fiq_status(oldstatus);
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2006-12-29 02:49:12 +00:00
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}
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void pcm_set_frequency(unsigned int frequency)
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{
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switch(frequency)
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{
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2007-01-18 13:48:06 +00:00
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case SAMPR_8:
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sr_ctrl = GIGABEAT_8000HZ;
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break;
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2006-12-29 02:49:12 +00:00
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case SAMPR_11:
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2007-01-18 13:48:06 +00:00
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sr_ctrl = GIGABEAT_11025HZ;
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break;
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2006-12-29 02:49:12 +00:00
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case SAMPR_22:
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2007-01-18 13:48:06 +00:00
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sr_ctrl = GIGABEAT_22050HZ;
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break;
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2006-12-29 02:49:12 +00:00
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default:
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2007-01-18 13:48:06 +00:00
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frequency = SAMPR_44;
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2006-12-29 02:49:12 +00:00
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case SAMPR_44:
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2007-01-18 13:48:06 +00:00
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sr_ctrl = GIGABEAT_44100HZ;
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break;
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2006-12-29 02:49:12 +00:00
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case SAMPR_88:
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2007-01-18 13:48:06 +00:00
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sr_ctrl = GIGABEAT_88200HZ;
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break;
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2006-12-29 02:49:12 +00:00
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}
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2007-01-18 13:48:06 +00:00
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2006-12-29 02:49:12 +00:00
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pcm_freq = frequency;
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}
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size_t pcm_get_bytes_waiting(void)
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{
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return (DSTAT2 & 0xFFFFF) * 2;
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}
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2007-05-02 22:33:24 +00:00
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#if 0
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2006-12-29 02:49:12 +00:00
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void pcm_set_monitor(int monitor)
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{
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(void)monitor;
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}
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2007-05-02 22:33:24 +00:00
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#endif
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2006-12-29 02:49:12 +00:00
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/** **/
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void pcm_mute(bool mute)
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{
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audiohw_mute(mute);
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if (mute)
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sleep(HZ/16);
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}
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2007-05-02 22:33:24 +00:00
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/**
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* Return playback peaks - Peaks ahead in the DMA buffer based upon the
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* calling period to attempt to compensate for
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* delay.
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2006-12-29 02:49:12 +00:00
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*/
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void pcm_calculate_peaks(int *left, int *right)
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{
|
2007-05-02 22:33:24 +00:00
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static unsigned long last_peak_tick = 0;
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static unsigned long frame_period = 0;
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static int peaks_l = 0, peaks_r = 0;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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/* Throttled peak ahead based on calling period */
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unsigned long period = current_tick - last_peak_tick;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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/* Keep reasonable limits on period */
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if (period < 1)
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period = 1;
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else if (period > HZ/5)
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period = HZ/5;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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frame_period = (3*frame_period + period) >> 2;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
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last_peak_tick = current_tick;
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2006-12-29 02:49:12 +00:00
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2007-05-02 22:33:24 +00:00
|
|
|
if (pcm_playing && !pcm_paused)
|
|
|
|
{
|
|
|
|
unsigned long *addr = (unsigned long *)DCSRC2;
|
|
|
|
long samples = DSTAT2;
|
|
|
|
long samp_frames;
|
|
|
|
|
|
|
|
samples &= 0xFFFFE;
|
|
|
|
samp_frames = frame_period*pcm_freq/(HZ/2);
|
|
|
|
samples = MIN(samp_frames, samples) >> 1;
|
|
|
|
|
|
|
|
if (samples > 0)
|
|
|
|
{
|
|
|
|
long peak_l = 0, peak_r = 0;
|
|
|
|
long peaksq_l = 0, peaksq_r = 0;
|
|
|
|
|
|
|
|
addr -= 0x30000000 >> 2;
|
|
|
|
addr = (long *)((long)addr & ~3);
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
long value = *addr;
|
|
|
|
long ch, chsq;
|
|
|
|
|
|
|
|
ch = (int16_t)value;
|
|
|
|
chsq = ch*ch;
|
|
|
|
if (chsq > peaksq_l)
|
|
|
|
peak_l = ch, peaksq_l = chsq;
|
|
|
|
|
|
|
|
ch = value >> 16;
|
|
|
|
chsq = ch*ch;
|
|
|
|
if (chsq > peaksq_r)
|
|
|
|
peak_r = ch, peaksq_r = chsq;
|
|
|
|
|
|
|
|
addr += 4;
|
|
|
|
}
|
|
|
|
while ((samples -= 4) > 0);
|
|
|
|
|
|
|
|
peaks_l = abs(peak_l);
|
|
|
|
peaks_r = abs(peak_r);
|
2006-12-29 02:49:12 +00:00
|
|
|
}
|
|
|
|
}
|
2007-05-02 22:33:24 +00:00
|
|
|
else
|
|
|
|
{
|
|
|
|
peaks_l = peaks_r = 0;
|
|
|
|
}
|
2006-12-29 02:49:12 +00:00
|
|
|
|
2007-05-02 22:33:24 +00:00
|
|
|
if (left)
|
|
|
|
*left = peaks_l;
|
2006-12-29 02:49:12 +00:00
|
|
|
|
2007-05-02 22:33:24 +00:00
|
|
|
if (right)
|
|
|
|
*right = peaks_r;
|
|
|
|
} /* pcm_calculate_peaks */
|