2011-08-07 20:01:04 +00:00
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// NES 2A03 APU sound chip emulator
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// Nes_Snd_Emu 0.1.8
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#ifndef NES_APU_H
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#define NES_APU_H
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#include "blargg_common.h"
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#include "nes_oscs.h"
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enum { apu_status_addr = 0x4015 };
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enum { apu_osc_count = 5 };
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enum { apu_no_irq = INT_MAX / 2 + 1 };
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enum { apu_irq_waiting = 0 };
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enum { apu_io_addr = 0x4000 };
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enum { apu_io_size = 0x18 };
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struct apu_state_t;
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struct Nes_Apu {
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nes_time_t last_dmc_time;
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int osc_enables;
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struct Nes_Osc* oscs [apu_osc_count];
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struct Nes_Square square1;
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struct Nes_Square square2;
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struct Nes_Noise noise;
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struct Nes_Triangle triangle;
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struct Nes_Dmc dmc;
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2011-08-09 20:21:55 +00:00
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int tempo_;
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2011-08-07 20:01:04 +00:00
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nes_time_t last_time; // has been run until this time in current frame
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nes_time_t earliest_irq_;
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nes_time_t next_irq;
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int frame_period;
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int frame_delay; // cycles until frame counter runs next
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int frame; // current frame (0-3)
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int frame_mode;
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bool irq_flag;
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void (*irq_notifier_)( void* user_data );
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void* irq_data;
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Synth square_synth; // shared by squares
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};
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// Init Nes apu
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void Apu_init( struct Nes_Apu* this );
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// Set buffer to generate all sound into, or disable sound if NULL
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void Apu_output( struct Nes_Apu* this, struct Blip_Buffer* ) ICODE_ATTR;
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// All time values are the number of cpu clock cycles relative to the
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// beginning of the current time frame. Before resetting the cpu clock
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// count, call end_frame( last_cpu_time ).
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// Write to register (0x4000-0x4017, except 0x4014 and 0x4016)
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void Apu_write_register( struct Nes_Apu* this, nes_time_t, addr_t, int data ) ICODE_ATTR;
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// Read from status register at 0x4015
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int Apu_read_status( struct Nes_Apu* this, nes_time_t ) ICODE_ATTR;
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// Run all oscillators up to specified time, end current time frame, then
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// start a new time frame at time 0. Time frames have no effect on emulation
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// and each can be whatever length is convenient.
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void Apu_end_frame( struct Nes_Apu* this, nes_time_t ) ICODE_ATTR;
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// Additional optional features (can be ignored without any problem)
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// Reset internal frame counter, registers, and all oscillators.
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// Use PAL timing if pal_timing is true, otherwise use NTSC timing.
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// Set the DMC oscillator's initial DAC value to initial_dmc_dac without
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// any audible click.
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void Apu_reset( struct Nes_Apu* this, bool pal_mode, int initial_dmc_dac );
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// Adjust frame period
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2011-08-09 20:21:55 +00:00
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void Apu_set_tempo( struct Nes_Apu* this, int );
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2011-08-07 20:01:04 +00:00
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// Set overall volume (default is 1.0)
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2011-08-11 06:18:39 +00:00
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void Apu_volume( struct Nes_Apu* this, int );
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2011-08-07 20:01:04 +00:00
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// Run DMC until specified time, so that any DMC memory reads can be
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// accounted for (i.e. inserting cpu wait states).
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void Apu_run_until( struct Nes_Apu* this, nes_time_t ) ICODE_ATTR;
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// Set sound output of specific oscillator to buffer. If buffer is NULL,
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// the specified oscillator is muted and emulation accuracy is reduced.
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// The oscillators are indexed as follows: 0) Square 1, 1) Square 2,
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// 2) Triangle, 3) Noise, 4) DMC.
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static inline void Apu_osc_output( struct Nes_Apu* this, int osc, struct Blip_Buffer* buf )
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{
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assert( (unsigned) osc < apu_osc_count );
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this->oscs [osc]->output = buf;
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}
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// Set memory reader callback used by DMC oscillator to fetch samples.
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// When callback is invoked, 'user_data' is passed unchanged as the
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// first parameter.
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static inline void Apu_dmc_reader( struct Nes_Apu* this, int (*func)( void*, addr_t ), void* user_data )
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{
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this->dmc.prg_reader_data = user_data;
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this->dmc.prg_reader = func;
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}
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// Set IRQ time callback that is invoked when the time of earliest IRQ
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// may have changed, or NULL to disable. When callback is invoked,
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// 'user_data' is passed unchanged as the first parameter.
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static inline void Apu_irq_notifier( struct Nes_Apu* this, void (*func)( void* user_data ), void* user_data )
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{
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this->irq_notifier_ = func;
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this->irq_data = user_data;
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}
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// Count number of DMC reads that would occur if 'run_until( t )' were executed.
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// If last_read is not NULL, set *last_read to the earliest time that
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// 'count_dmc_reads( time )' would result in the same result.
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static inline int Apu_count_dmc_reads( struct Nes_Apu* this, nes_time_t time, nes_time_t* last_read )
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{
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return Dmc_count_reads( &this->dmc, time, last_read );
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}
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static inline nes_time_t Dmc_next_read_time( struct Nes_Dmc* this )
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{
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if ( this->osc.length_counter == 0 )
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return apu_no_irq; // not reading
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return this->apu->last_dmc_time + this->osc.delay + (long) (this->bits_remain - 1) * this->period;
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}
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// Time when next DMC memory read will occur
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static inline nes_time_t Apu_next_dmc_read_time( struct Nes_Apu* this ) { return Dmc_next_read_time( &this->dmc ); }
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void Apu_irq_changed( struct Nes_Apu* this ) ICODE_ATTR;
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#endif
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