2011-10-18 22:06:05 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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2012-02-05 14:26:32 +00:00
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#include "audioin-imx233.h"
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2013-06-18 13:43:43 +00:00
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#include "pcm_sampr.h"
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2013-07-13 00:41:17 +00:00
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#include "string.h"
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2013-06-18 13:43:43 +00:00
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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#include "regs/audioin.h"
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/* some audioout registers impact audioin */
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#include "regs/audioout.h"
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2016-09-20 23:02:14 +00:00
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#include "audio-target.h"
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#ifndef IMX233_AUDIO_MIC_SELECT
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#define IMX233_AUDIO_MIC_SELECT 1 /* lradc1 */
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#endif
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#ifndef IMX233_AUDIO_MIC_BIAS
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#define IMX233_AUDIO_MIC_BIAS 0 /* 1.21V */
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#endif
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#ifndef IMX233_AUDIO_MIC_RESISTOR
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#define IMX233_AUDIO_MIC_RESISTOR 2KOhm
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#endif
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2013-06-18 13:43:43 +00:00
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/* values in half-dB, one for each setting */
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static int audioin_vol[2][4]; /* 0=left, 1=right */
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static int audioin_select[2]; /* idem */
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2011-10-18 22:06:05 +00:00
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void imx233_audioin_preinit(void)
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{
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2012-02-05 14:26:32 +00:00
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/* Enable AUDIOIN block */
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imx233_reset_block(&HW_AUDIOIN_CTRL);
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/* Set word-length to 16-bit */
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2013-06-16 13:47:55 +00:00
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BF_SET(AUDIOIN_CTRL, WORD_LENGTH);
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2013-06-18 13:43:43 +00:00
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/* Gate Off */
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BF_SET(AUDIOIN_CTRL, CLKGATE);
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2011-10-18 22:06:05 +00:00
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}
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void imx233_audioin_postinit(void)
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{
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}
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2013-06-18 13:43:43 +00:00
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void imx233_audioin_open(void)
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{
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/* Gate On */
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BF_CLR(AUDIOIN_CTRL, CLKGATE);
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/* Enable ADC clock */
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BF_CLR(AUDIOIN_ANACLKCTRL, CLKGATE);
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/* Power up ADC (WARNING audioout register) */
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BF_CLR(AUDIOOUT_PWRDN, ADC);
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/* Start ADC */
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BF_SET(AUDIOIN_CTRL, RUN);
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}
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2011-10-18 22:06:05 +00:00
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void imx233_audioin_close(void)
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{
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2016-09-20 23:02:14 +00:00
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/* Stop ADC (doc says it gates off the module but that's not the case) */
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2013-06-16 13:47:55 +00:00
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BF_CLR(AUDIOIN_CTRL, RUN);
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2013-06-18 13:43:43 +00:00
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/* Disable ADC clock */
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BF_SET(AUDIOIN_ANACLKCTRL, CLKGATE);
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/* Power down ADC (WARNING audioout register) */
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BF_SET(AUDIOOUT_PWRDN, ADC);
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/* Gate Off */
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BF_SET(AUDIOIN_CTRL, CLKGATE);
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}
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static void apply_config(void)
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{
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int select_l = audioin_select[0];
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int select_r = audioin_select[1];
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int vol_l = audioin_vol[0][select_l];
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int vol_r = audioin_vol[1][select_r];
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/* Depending on the input, we have three available volumes to tweak:
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* - adc volume: -100dB -> -0.5dB in 0.5dB steps
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* - mux gain: 0dB -> 22.5dB in 1.5dB steps
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* - mic gain: 0dB -> 40dB in 10dB steps (except for 10)
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*
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* This means two available volume ranges:
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* - line1/line2/hp: -100dB -> 22dB in 0.5dB steps
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* - microphone: -100dB -> 62dB in 0.5dB steps
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*/
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2013-07-13 00:41:17 +00:00
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/* First apply mic gain if possible and necessary
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2013-06-18 13:43:43 +00:00
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* Only left volume is relevant with microphone
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* If gain is > 22dB, use mic gain */
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if(select_l == AUDIOIN_SELECT_MICROPHONE && vol_l > 22 * 2)
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{
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/* take lowest microphone gain to get back into the -100..22 range
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* achievable with mux+adc.*/
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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2013-06-18 13:43:43 +00:00
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/* from 52.5 dB and beyond: 40dB gain */
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if(vol_l > 52 * 2)
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{
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(40dB));
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2013-06-18 13:43:43 +00:00
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vol_l -= 40 * 2;
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}
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/* from 42.5 dB to 52dB: 30dB gain */
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else if(vol_l > 42 * 2)
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{
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(30dB));
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2013-06-18 13:43:43 +00:00
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vol_l -= 30 * 2;
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}
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/* from 22.5 dB to 42dB: 20dB gain */
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else if(vol_l > 22 * 2)
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{
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(20dB));
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2013-06-18 13:43:43 +00:00
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vol_l -= 20 * 2;
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}
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/* otherwise 0dB gain */
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else
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(0dB));
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2013-06-18 13:43:43 +00:00
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}
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/* max is 22dB */
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vol_l = MIN(vol_l, 44);
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vol_r = MIN(vol_r, 44);
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/* we use the mux volume to reach the volume or higher with 1.5dB steps
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* and then we use the ADC to go below 0dB or to obtain 0.5dB accuracy */
|
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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2013-06-18 13:43:43 +00:00
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int mux_vol_l = MAX(0, (vol_l + 2) / 3); /* 1.5dB = 3 * 0.5dB */
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int mux_vol_r = MAX(0, (vol_r + 2) / 3);
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#if IMX233_SUBTARGET >= 3700
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unsigned adc_zcd = BM_AUDIOIN_ADCVOL_EN_ADC_ZCD;
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#else
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unsigned adc_zcd = 0;
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#endif
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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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HW_AUDIOIN_ADCVOL = adc_zcd | BF_OR(AUDIOIN_ADCVOL, SELECT_LEFT(select_l),
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2013-06-18 13:43:43 +00:00
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SELECT_RIGHT(select_r), GAIN_LEFT(mux_vol_l), GAIN_RIGHT(mux_vol_r));
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vol_l -= mux_vol_l * 3; /* mux vol is in 1.5dB = 3 * 0.5dB steps */
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vol_r -= mux_vol_l * 3;
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vol_l = MIN(MAX(-200, vol_l), -1);
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vol_r = MIN(MAX(-200, vol_r), -1);
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/* unmute, enable zero cross and set volume.
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* 0xfe is -0.5dB */
|
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
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BF_WR_ALL(AUDIOIN_ADCVOLUME, EN_ZCD(1),
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2013-06-18 13:43:43 +00:00
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VOLUME_LEFT(0xff + vol_l), VOLUME_RIGHT(0xff + vol_r));
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}
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void imx233_audioin_select_mux_input(bool right, int select)
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{
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audioin_select[right] = select;
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apply_config();
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}
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void imx233_audioin_set_vol(bool right, int vol, int select)
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{
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audioin_vol[right][select] = vol;
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apply_config();
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}
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void imx233_audioin_enable_mic(bool enable)
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{
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if(enable)
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{
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2016-09-20 23:02:14 +00:00
|
|
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BF_WR(AUDIOIN_MICLINE, MIC_RESISTOR_V(IMX233_AUDIO_MIC_RESISTOR));
|
|
|
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BF_WR(AUDIOIN_MICLINE, MIC_BIAS(IMX233_AUDIO_MIC_BIAS));
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|
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BF_WR(AUDIOIN_MICLINE, MIC_SELECT(IMX233_AUDIO_MIC_SELECT));
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2013-06-18 13:43:43 +00:00
|
|
|
}
|
|
|
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else
|
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
|
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BF_WR(AUDIOIN_MICLINE, MIC_RESISTOR_V(Off));
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2013-06-18 13:43:43 +00:00
|
|
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}
|
|
|
|
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|
|
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void imx233_audioin_set_freq(int fsel)
|
|
|
|
{
|
|
|
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static struct
|
|
|
|
{
|
|
|
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int base_mult;
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|
|
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int src_hold;
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int src_int;
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int src_frac;
|
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}dacssr[HW_NUM_FREQ] =
|
|
|
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{
|
|
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HW_HAVE_8_([HW_FREQ_8] = { 0x1, 0x3, 0x17, 0xe00 } ,)
|
|
|
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HW_HAVE_11_([HW_FREQ_11] = { 0x1, 0x3, 0x11, 0x37 } ,)
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|
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HW_HAVE_12_([HW_FREQ_12] = { 0x1, 0x3, 0xf, 0x13ff },)
|
|
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HW_HAVE_16_([HW_FREQ_16] = { 0x1, 0x1, 0x17, 0xe00},)
|
|
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HW_HAVE_22_([HW_FREQ_22] = { 0x1, 0x1, 0x11, 0x37 },)
|
|
|
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HW_HAVE_24_([HW_FREQ_24] = { 0x1, 0x1, 0xf, 0x13ff },)
|
|
|
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HW_HAVE_32_([HW_FREQ_32] = { 0x1, 0x0, 0x17, 0xe00},)
|
|
|
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HW_HAVE_44_([HW_FREQ_44] = { 0x1, 0x0, 0x11, 0x37 },)
|
|
|
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HW_HAVE_48_([HW_FREQ_48] = { 0x1, 0x0, 0xf, 0x13ff },)
|
|
|
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HW_HAVE_64_([HW_FREQ_64] = { 0x2, 0x0, 0x17, 0xe00},)
|
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HW_HAVE_88_([HW_FREQ_88] = { 0x2, 0x0, 0x11, 0x37 },)
|
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HW_HAVE_96_([HW_FREQ_96] = { 0x2, 0x0, 0xf, 0x13ff },)
|
|
|
|
};
|
|
|
|
|
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2016-05-24 19:29:56 +00:00
|
|
|
BF_WR_ALL(AUDIOIN_ADCSRR,
|
2013-06-18 13:43:43 +00:00
|
|
|
SRC_FRAC(dacssr[fsel].src_frac), SRC_INT(dacssr[fsel].src_int),
|
|
|
|
SRC_HOLD(dacssr[fsel].src_hold), BASEMULT(dacssr[fsel].base_mult));
|
2011-10-18 22:06:05 +00:00
|
|
|
}
|
2013-07-13 00:41:17 +00:00
|
|
|
|
|
|
|
struct imx233_audioin_info_t imx233_audioin_get_info(void)
|
|
|
|
{
|
|
|
|
struct imx233_audioin_info_t info;
|
|
|
|
memset(&info, 0, sizeof(info));
|
|
|
|
/* 6*10^6*basemult/(src_frac*8*(src_hold+1)) in Hz */
|
|
|
|
info.freq = 60000000 * BF_RD(AUDIOIN_ADCSRR, BASEMULT) / 8 /
|
|
|
|
BF_RD(AUDIOIN_ADCSRR, SRC_FRAC) / (1 + BF_RD(AUDIOIN_ADCSRR, SRC_HOLD));
|
|
|
|
info.muxselect[0] = BF_RD(AUDIOIN_ADCVOL, SELECT_LEFT);
|
|
|
|
info.muxselect[1] = BF_RD(AUDIOIN_ADCVOL, SELECT_RIGHT);
|
|
|
|
/* convert half-dB to tenth-dB */
|
|
|
|
info.muxvol[0] = BF_RD(AUDIOIN_ADCVOL, GAIN_LEFT) * 15;
|
|
|
|
info.muxvol[1] = BF_RD(AUDIOIN_ADCVOL, GAIN_RIGHT) * 15;
|
|
|
|
info.muxmute[0] = info.adcmute[1] = BF_RD(AUDIOIN_ADCVOL, MUTE);
|
|
|
|
info.adcvol[0] = MAX((int)BF_RD(AUDIOIN_ADCVOLUME, VOLUME_LEFT) - 0xff, -100) * 5;
|
|
|
|
info.adcvol[1] = MAX((int)BF_RD(AUDIOIN_ADCVOLUME, VOLUME_RIGHT) - 0xff, -100) * 5;
|
|
|
|
info.adcmute[0] = info.adcmute[1] = false;
|
|
|
|
info.micvol[0] = BF_RD(AUDIOIN_MICLINE, MIC_GAIN);
|
|
|
|
if(info.micvol[0] != 0)
|
|
|
|
info.micvol[0] = info.micvol[1] = info.micvol[0] * 100 + 100;
|
|
|
|
info.micmute[0] = info.micmute[1] = false;
|
|
|
|
info.adc = !BF_RD(AUDIOOUT_PWRDN, ADC);
|
|
|
|
info.mic = info.mux = true;
|
|
|
|
return info;
|
|
|
|
}
|