2008-08-26 21:48:49 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Maurus Cuelenaere
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "usb_ch9.h"
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#include "usb_drv.h"
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#include "usb_core.h"
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#include "jz4740.h"
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#include "thread.h"
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#if 0
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#define EP1_INTR_BIT 2
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#define EP_FIFO_NOEMPTY 2
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#define GPIO_UDC_DETE_PIN (32 * 3 + 6)
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#define GPIO_UDC_DETE GPIO_UDC_DETE_PIN
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#define IRQ_GPIO_UDC_DETE (IRQ_GPIO_0 + GPIO_UDC_DETE)
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#define IS_CACHE(x) (x < 0xa0000000)
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bool usb_drv_connected(void)
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{
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return (__gpio_get_pin(GPIO_UDC_DETE)==1);
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}
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int usb_detect(void)
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{
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if(__gpio_get_pin(GPIO_UDC_DETE)==1)
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return USB_INSERTED;
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else
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return USB_EXTRACTED;
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}
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void usb_init_device(void)
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{
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system_enable_irq(IRQ_UDC);
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__gpio_as_input(GPIO_UDC_DETE_PIN);
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return;
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}
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void usb_enable(bool on)
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{
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if(on)
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usb_core_init();
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else
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usb_core_exit();
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}
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void usb_drv_init(void)
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{
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/* Set this bit to allow the UDC entering low-power mode when
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* there are no actions on the USB bus.
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* UDC still works during this bit was set.
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*/
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//__cpm_stop_udc();
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__cpm_start_udc();
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/* Enable the USB PHY */
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REG_CPM_SCR |= CPM_SCR_USBPHY_ENABLE;
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/* Disable interrupts */
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REG_USB_REG_INTRINE = 0;
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REG_USB_REG_INTROUTE = 0;
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REG_USB_REG_INTRUSBE = 0;
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/* Enable interrupts */
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REG_USB_REG_INTRINE |= USB_INTR_EP0;
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REG_USB_REG_INTRUSBE |= USB_INTR_RESET;
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/* Enable SUSPEND */
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/* usb_setb(USB_REG_POWER, USB_POWER_SUSPENDM); */
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/* Enable HS Mode */
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REG_USB_REG_POWER |= USB_POWER_HSENAB;
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/* Let host detect UDC:
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* Software must write a 1 to the PMR:USB_POWER_SOFTCONN bit to turn this
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* transistor on and pull the USBDP pin HIGH.
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*/
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REG_USB_REG_POWER |= USB_POWER_SOFTCONN;
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}
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void usb_drv_exit(void)
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{
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/* Disable interrupts */
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REG_USB_REG_INTRINE = 0;
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REG_USB_REG_INTROUTE = 0;
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REG_USB_REG_INTRUSBE = 0;
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/* Disable DMA */
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REG_USB_REG_CNTL1 = 0;
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REG_USB_REG_CNTL2 = 0;
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/* Disconnect from usb */
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REG_USB_REG_POWER &= ~USB_POWER_SOFTCONN;
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/* Disable the USB PHY */
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REG_CPM_SCR &= ~CPM_SCR_USBPHY_ENABLE;
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__cpm_stop_udc();
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}
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void usb_drv_set_address(int address)
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{
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REG_USB_REG_FADDR = address;
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}
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/* Interrupt handler */
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void UDC(void)
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{
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}
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#else
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//------------------------------------------
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#ifndef u8
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#define u8 unsigned char
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#endif
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#ifndef u16
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#define u16 unsigned short
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#endif
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#ifndef u32
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#define u32 unsigned int
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#endif
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#ifndef s8
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#define s8 char
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#endif
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#ifndef s16
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#define s16 short
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#endif
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#ifndef s32
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#define s32 int
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#endif
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extern int usbdebug;
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enum USB_ENDPOINT_TYPE
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{
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ENDPOINT_TYPE_CONTROL,
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/* Typically used to configure a device when attached to the host.
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* It may also be used for other device specific purposes, including
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* control of other pipes on the device.
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*/
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ENDPOINT_TYPE_ISOCHRONOUS,
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/* Typically used for applications which need guaranteed speed.
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* Isochronous transfer is fast but with possible data loss. A typical
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* use is audio data which requires a constant data rate.
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*/
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ENDPOINT_TYPE_BULK,
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/* Typically used by devices that generate or consume data in relatively
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* large and bursty quantities. Bulk transfer has wide dynamic latitude
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* in transmission constraints. It can use all remaining available bandwidth,
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* but with no guarantees on bandwidth or latency. Since the USB bus is
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* normally not very busy, there is typically 90% or more of the bandwidth
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* available for USB transfers.
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*/
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ENDPOINT_TYPE_INTERRUPT
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/* Typically used by devices that need guaranteed quick responses
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* (bounded latency).
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*/
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};
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enum USB_STANDARD_REQUEST_CODE {
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GET_STATUS,
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CLEAR_FEATURE,
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SET_FEATURE = 3,
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SET_ADDRESS = 5,
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GET_DESCRIPTOR,
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SET_DESCRIPTOR,
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GET_CONFIGURATION,
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SET_CONFIGURATION,
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GET_INTERFACE,
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SET_INTERFACE,
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SYNCH_FRAME
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};
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enum USB_DESCRIPTOR_TYPE {
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DEVICE_DESCRIPTOR = 1,
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CONFIGURATION_DESCRIPTOR,
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STRING_DESCRIPTOR,
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INTERFACE_DESCRIPTOR,
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ENDPOINT_DESCRIPTOR,
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DEVICE_QUALIFIER_DESCRIPTOR,
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OTHER_SPEED_CONFIGURATION_DESCRIPTOR,
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INTERFACE_POWER1_DESCRIPTOR
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};
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enum USB_FEATURE_SELECTOR {
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ENDPOINT_HALT,
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DEVICE_REMOTE_WAKEUP,
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TEST_MODE
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};
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enum USB_CLASS_CODE {
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CLASS_DEVICE,
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CLASS_AUDIO,
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CLASS_COMM_AND_CDC_CONTROL,
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CLASS_HID,
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CLASS_PHYSICAL = 0x05,
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CLASS_STILL_IMAGING,
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CLASS_PRINTER,
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CLASS_MASS_STORAGE,
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CLASS_HUB,
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CLASS_CDC_DATA,
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CLASS_SMART_CARD,
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CLASS_CONTENT_SECURITY = 0x0d,
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CLASS_VIDEO,
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CLASS_DIAGNOSTIC_DEVICE = 0xdc,
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CLASS_WIRELESS_CONTROLLER = 0xe0,
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CLASS_MISCELLANEOUS = 0xef,
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CLASS_APP_SPECIFIC = 0xfe,
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CLASS_VENDOR_SPECIFIC = 0xff
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};
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typedef struct {
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u8 bmRequestType;
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u8 bRequest;
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u16 wValue;
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u16 wIndex;
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u16 wLength;
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} __attribute__ ((packed)) USB_DeviceRequest;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u16 bcdUSB;
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u8 bDeviceClass;
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u8 bDeviceSubClass;
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u8 bDeviceProtocol;
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u8 bMaxPacketSize0;
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u16 idVendor;
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u16 idProduct;
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u16 bcdDevice;
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u8 iManufacturer;
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u8 iProduct;
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u8 iSerialNumber;
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u8 bNumConfigurations;
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} __attribute__ ((packed)) USB_DeviceDescriptor;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u16 bcdUSB;
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u8 bDeviceClass;
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u8 bDeviceSubClass;
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u8 bDeviceProtocol;
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u8 bMaxPacketSize0;
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u8 bNumConfigurations;
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u8 bReserved;
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} __attribute__ ((packed)) USB_DeviceQualifierDescriptor;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u16 wTotalLength;
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u8 bNumInterfaces;
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u8 bConfigurationValue;
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u8 iConfiguration;
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u8 bmAttributes;
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u8 MaxPower;
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} __attribute__ ((packed)) USB_ConfigDescriptor;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u16 wTotalLength;
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u8 bNumInterfaces;
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u8 bConfigurationValue;
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u8 iConfiguration;
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u8 bmAttributes;
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u8 bMaxPower;
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} __attribute__ ((packed)) USB_OtherSpeedConfigDescriptor;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u8 bInterfaceNumber;
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u8 bAlternateSetting;
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u8 bNumEndpoints;
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u8 bInterfaceClass;
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u8 bInterfaceSubClass;
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u8 bInterfaceProtocol;
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u8 iInterface;
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} __attribute__ ((packed)) USB_InterfaceDescriptor;
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typedef struct {
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u8 bLegth;
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u8 bDescriptorType;
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u8 bEndpointAddress;
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u8 bmAttributes;
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u16 wMaxPacketSize;
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u8 bInterval;
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} __attribute__ ((packed)) USB_EndPointDescriptor;
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typedef struct {
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u8 bLength;
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u8 bDescriptorType;
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u16 SomeDesriptor[1];
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} __attribute__ ((packed)) USB_StringDescriptor;
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//------------------------------------------
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#define MAX_EP0_SIZE 64
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#define MAX_EP1_SIZE 512
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#define USB_HS 0
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#define USB_FS 1
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#define USB_LS 2
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//definitions of EP0
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#define USB_EP0_IDLE 0
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#define USB_EP0_RX 1
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#define USB_EP0_TX 2
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/* Define maximum packet size for endpoint 0 */
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#define M_EP0_MAXP 64
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/* Endpoint 0 status structure */
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static __inline__ void usb_setb(u32 port, u8 val)
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{
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volatile u8 *ioport = (volatile u8 *)(port);
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*ioport = (*ioport) | val;
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}
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static __inline__ void usb_clearb(u32 port, u8 val)
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{
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volatile u8 *ioport = (volatile u8 *)(port);
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*ioport = (*ioport) & ~val;
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}
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static __inline__ void usb_setw(u32 port, u16 val)
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{
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volatile u16 *ioport = (volatile u16 *)(port);
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*ioport = (*ioport) | val;
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}
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static __inline__ void usb_clearw(u32 port, u16 val)
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{
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volatile u16 *ioport = (volatile u16 *)(port);
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*ioport = (*ioport) & ~val;
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}
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//---------------------------------
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#define BULK_OUT_BUF_SIZE 0x20000 //buffer size :
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#define BULK_IN_BUF_SIZE 0x20000 // too
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enum UDC_STATE
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{
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IDLE,
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BULK_IN,
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BULK_OUT
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};
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enum USB_JZ4740_REQUEST //add for USB_BOOT
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{
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VR_GET_CUP_INFO = 0,
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VR_SET_DATA_ADDERSS,
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VR_SET_DATA_LENGTH,
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VR_FLUSH_CACHES,
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VR_PROGRAM_START1,
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VR_PROGRAM_START2,
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VR_NOR_OPS,
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VR_NAND_OPS,
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VR_SDRAM_OPS,
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VR_CONFIGRATION
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};
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enum NOR_OPS_TYPE
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{
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NOR_INIT = 0,
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NOR_QUERY,
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NOR_WRITE,
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NOR_ERASE_CHIP,
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NOR_ERASE_SECTOR
|
|
|
|
};
|
|
|
|
|
|
|
|
enum NOR_FLASH_TYPE
|
|
|
|
{
|
|
|
|
NOR_AM29 = 0,
|
|
|
|
NOR_SST28,
|
|
|
|
NOR_SST39x16,
|
|
|
|
NOR_SST39x8
|
|
|
|
};
|
|
|
|
|
|
|
|
enum NAND_OPS_TYPE
|
|
|
|
{
|
|
|
|
NAND_QUERY = 0,
|
|
|
|
NAND_INIT,
|
|
|
|
NAND_MARK_BAD,
|
|
|
|
NAND_READ_OOB,
|
|
|
|
NAND_READ_RAW,
|
|
|
|
NAND_ERASE,
|
|
|
|
NAND_READ,
|
|
|
|
NAND_PROGRAM,
|
|
|
|
NAND_READ_TO_RAM
|
|
|
|
};
|
|
|
|
|
|
|
|
enum SDRAM_OPS_TYPE
|
|
|
|
{
|
|
|
|
SDRAM_LOAD,
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
enum DATA_STRUCTURE_OB
|
|
|
|
{
|
|
|
|
DS_flash_info ,
|
|
|
|
DS_hand
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*typedef enum _USB_BOOT_STATUS
|
|
|
|
{
|
|
|
|
USB_NO_ERR =0 ,
|
|
|
|
GET_CPU_INFO_ERR,
|
|
|
|
SET_DATA_ADDRESS_ERR,
|
|
|
|
SET_DATA_LENGTH_ERR,
|
|
|
|
FLUSH_CAHCES_ERR,
|
|
|
|
PROGRAM_START1_ERR,
|
|
|
|
PROGRAM_START2_ERR,
|
|
|
|
NOR_OPS_ERR,
|
|
|
|
NAND_OPS_ERR,
|
|
|
|
NOR_FLASHTYPE_ERR,
|
|
|
|
OPS_NOTSUPPORT_ERR
|
|
|
|
}USB_BOOT_STATUS;*/
|
|
|
|
|
|
|
|
enum OPTION
|
|
|
|
{
|
|
|
|
OOB_ECC,
|
|
|
|
OOB_NO_ECC,
|
|
|
|
NO_OOB,
|
|
|
|
};
|
|
|
|
//-------------------------
|
|
|
|
static inline void jz_writeb(u32 address, u8 value)
|
|
|
|
{
|
|
|
|
*((volatile u8 *)address) = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void jz_writew(u32 address, u16 value)
|
|
|
|
{
|
|
|
|
*((volatile u16 *)address) = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void jz_writel(u32 address, u32 value)
|
|
|
|
{
|
|
|
|
*((volatile u32 *)address) = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u8 jz_readb(u32 address)
|
|
|
|
{
|
|
|
|
return *((volatile u8 *)address);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u16 jz_readw(u32 address)
|
|
|
|
{
|
|
|
|
return *((volatile u16 *)address);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u32 jz_readl(u32 address)
|
|
|
|
{
|
|
|
|
return *((volatile u32 *)address);
|
|
|
|
}
|
|
|
|
//---------------------------
|
|
|
|
|
|
|
|
#define TXFIFOEP0 USB_FIFO_EP0
|
|
|
|
|
2008-09-17 21:44:47 +00:00
|
|
|
u8 *Bulk_in_buf;
|
2008-08-26 21:48:49 +00:00
|
|
|
u32 Bulk_out_buf[BULK_OUT_BUF_SIZE];
|
|
|
|
u32 Bulk_in_size,Bulk_in_finish,Bulk_out_size;
|
|
|
|
u16 handshake_PKT[4]={0,0,0,0};
|
|
|
|
u8 udc_state;
|
|
|
|
|
|
|
|
static u32 rx_buf[32];
|
|
|
|
static u32 tx_buf[32];
|
|
|
|
static u32 tx_size, rx_size, finished,fifo;
|
|
|
|
static u8 ep0state,USB_Version;
|
|
|
|
|
|
|
|
static u32 fifoaddr[] =
|
|
|
|
{
|
|
|
|
TXFIFOEP0, TXFIFOEP0+4 ,TXFIFOEP0+8
|
|
|
|
};
|
|
|
|
|
|
|
|
static u32 fifosize[] = {
|
|
|
|
MAX_EP0_SIZE, MAX_EP1_SIZE
|
|
|
|
};
|
|
|
|
|
|
|
|
static void udcReadFifo(u8 *ptr, int size)
|
|
|
|
{
|
|
|
|
u32 *d = (u32 *)ptr;
|
|
|
|
int s;
|
|
|
|
s = (size + 3) >> 2;
|
|
|
|
while (s--)
|
|
|
|
*d++ = REG32(fifo);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void udcWriteFifo(u8 *ptr, int size)
|
|
|
|
{
|
|
|
|
u32 *d = (u32 *)ptr;
|
|
|
|
u8 *c;
|
|
|
|
int s, q;
|
|
|
|
|
|
|
|
if (size > 0) {
|
|
|
|
s = size >> 2;
|
|
|
|
while (s--)
|
|
|
|
REG32(fifo) = *d++;
|
|
|
|
q = size & 3;
|
|
|
|
if (q) {
|
|
|
|
c = (u8 *)d;
|
|
|
|
while (q--)
|
|
|
|
REG8(fifo) = *c++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void HW_SendPKT(int ep, const u8 *buf, int size)
|
|
|
|
{
|
|
|
|
fifo = fifoaddr[ep];
|
|
|
|
|
|
|
|
if (ep!=0)
|
|
|
|
{
|
|
|
|
Bulk_in_size = size;
|
|
|
|
Bulk_in_finish = 0;
|
|
|
|
jz_writeb(USB_REG_INDEX, ep);
|
|
|
|
if (Bulk_in_size - Bulk_in_finish <= fifosize[ep])
|
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)buf+Bulk_in_finish),
|
|
|
|
Bulk_in_size - Bulk_in_finish);
|
|
|
|
usb_setb(USB_REG_INCSR, USB_INCSR_INPKTRDY);
|
|
|
|
Bulk_in_finish = Bulk_in_size;
|
2008-09-17 21:44:47 +00:00
|
|
|
}
|
|
|
|
else
|
2008-08-26 21:48:49 +00:00
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)buf+Bulk_in_finish),
|
|
|
|
fifosize[ep]);
|
|
|
|
usb_setb(USB_REG_INCSR, USB_INCSR_INPKTRDY);
|
|
|
|
Bulk_in_finish += fifosize[ep];
|
2008-09-17 21:44:47 +00:00
|
|
|
Bulk_in_buf = (u8*)buf;
|
2008-08-26 21:48:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else //EP0
|
|
|
|
{
|
|
|
|
tx_size = size;
|
|
|
|
finished = 0;
|
|
|
|
memcpy((void *)tx_buf, buf, size);
|
|
|
|
ep0state = USB_EP0_TX;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void HW_GetPKT(int ep, const u8 *buf, int size)
|
|
|
|
{
|
|
|
|
memcpy((void *)buf, (u8 *)rx_buf, size);
|
|
|
|
fifo = fifoaddr[ep];
|
|
|
|
if (rx_size > size)
|
|
|
|
rx_size -= size;
|
|
|
|
else {
|
|
|
|
size = rx_size;
|
|
|
|
rx_size = 0;
|
|
|
|
}
|
|
|
|
memcpy((u8 *)rx_buf, (u8 *)((u32)rx_buf+size), rx_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static USB_DeviceDescriptor devDesc =
|
|
|
|
{
|
|
|
|
sizeof(USB_DeviceDescriptor),
|
|
|
|
DEVICE_DESCRIPTOR, //1
|
|
|
|
0x0200, //Version 2.0
|
|
|
|
0xff, //Vendor spec class
|
|
|
|
0xff,
|
|
|
|
0xff,
|
|
|
|
64, /* Ep0 FIFO size */
|
|
|
|
0x601a, //vendor ID
|
|
|
|
0xDEAD, //Product ID
|
|
|
|
0xffff,
|
|
|
|
0x00,
|
|
|
|
0x00,
|
|
|
|
0x00,
|
|
|
|
0x01
|
|
|
|
};
|
|
|
|
|
|
|
|
#define CONFIG_DESCRIPTOR_LEN (sizeof(USB_ConfigDescriptor) + \
|
|
|
|
sizeof(USB_InterfaceDescriptor) + \
|
|
|
|
sizeof(USB_EndPointDescriptor) * 2)
|
|
|
|
|
|
|
|
static struct {
|
|
|
|
USB_ConfigDescriptor configuration_descriptor;
|
|
|
|
USB_InterfaceDescriptor interface_descritor;
|
|
|
|
USB_EndPointDescriptor endpoint_descriptor[2];
|
|
|
|
} __attribute__ ((packed)) confDesc = {
|
|
|
|
{
|
|
|
|
sizeof(USB_ConfigDescriptor),
|
|
|
|
CONFIGURATION_DESCRIPTOR,
|
|
|
|
CONFIG_DESCRIPTOR_LEN,
|
|
|
|
0x01,
|
|
|
|
0x01,
|
|
|
|
0x00,
|
|
|
|
0xc0, // Self Powered, no remote wakeup
|
|
|
|
0x64 // Maximum power consumption 2000 mA
|
|
|
|
},
|
|
|
|
{
|
|
|
|
sizeof(USB_InterfaceDescriptor),
|
|
|
|
INTERFACE_DESCRIPTOR,
|
|
|
|
0x00,
|
|
|
|
0x00,
|
|
|
|
0x02, /* ep number */
|
|
|
|
0xff,
|
|
|
|
0xff,
|
|
|
|
0xff,
|
|
|
|
0x00
|
|
|
|
},
|
|
|
|
{
|
|
|
|
{
|
|
|
|
sizeof(USB_EndPointDescriptor),
|
|
|
|
ENDPOINT_DESCRIPTOR,
|
|
|
|
(1 << 7) | 1,// endpoint 2 is IN endpoint
|
|
|
|
2, /* bulk */
|
|
|
|
512,
|
2008-09-17 21:44:47 +00:00
|
|
|
0
|
2008-08-26 21:48:49 +00:00
|
|
|
},
|
|
|
|
{
|
|
|
|
sizeof(USB_EndPointDescriptor),
|
|
|
|
ENDPOINT_DESCRIPTOR,
|
|
|
|
(0 << 7) | 1,// endpoint 5 is OUT endpoint
|
|
|
|
2, /* bulk */
|
|
|
|
512, /* OUT EP FIFO size */
|
2008-09-17 21:44:47 +00:00
|
|
|
0
|
2008-08-26 21:48:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
void sendDevDescString(int size)
|
|
|
|
{
|
|
|
|
u16 str_ret[13] = {
|
|
|
|
0x031a,//0x1a=26 byte
|
|
|
|
0x0041,
|
|
|
|
0x0030,
|
|
|
|
0x0030,
|
|
|
|
0x0041,
|
|
|
|
0x0030,
|
|
|
|
0x0030,
|
|
|
|
0x0041,
|
|
|
|
0x0030,
|
|
|
|
0x0030,
|
|
|
|
0x0041,
|
|
|
|
0x0030,
|
|
|
|
0x0030
|
|
|
|
};
|
|
|
|
if(size >= 26)
|
|
|
|
size = 26;
|
|
|
|
str_ret[0] = (0x0300 | size);
|
|
|
|
HW_SendPKT(0, (u8 *)str_ret,size);
|
|
|
|
}
|
|
|
|
|
|
|
|
void sendDevDesc(int size)
|
|
|
|
{
|
|
|
|
switch (size) {
|
|
|
|
case 18:
|
|
|
|
HW_SendPKT(0, (u8 *)&devDesc, sizeof(devDesc));
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
HW_SendPKT(0, (u8 *)&devDesc, 8);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void sendConfDesc(int size)
|
|
|
|
{
|
|
|
|
switch (size) {
|
|
|
|
case 9:
|
|
|
|
HW_SendPKT(0, (u8 *)&confDesc, 9);
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
HW_SendPKT(0, (u8 *)&confDesc, 8);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
HW_SendPKT(0, (u8 *)&confDesc, sizeof(confDesc));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void EP0_init(u32 out, u32 out_size, u32 in, u32 in_size)
|
|
|
|
{
|
|
|
|
confDesc.endpoint_descriptor[0].bEndpointAddress = (1<<7) | in;
|
|
|
|
confDesc.endpoint_descriptor[0].wMaxPacketSize = in_size;
|
|
|
|
confDesc.endpoint_descriptor[1].bEndpointAddress = (0<<7) | out;
|
|
|
|
confDesc.endpoint_descriptor[1].wMaxPacketSize = out_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void udc_reset(void)
|
|
|
|
{
|
|
|
|
//data init
|
|
|
|
ep0state = USB_EP0_IDLE;
|
|
|
|
Bulk_in_size = 0;
|
|
|
|
Bulk_in_finish = 0;
|
|
|
|
Bulk_out_size = 0;
|
|
|
|
udc_state = IDLE;
|
|
|
|
tx_size = 0;
|
|
|
|
rx_size = 0;
|
|
|
|
finished = 0;
|
|
|
|
/* Enable the USB PHY */
|
|
|
|
// REG_CPM_SCR |= CPM_SCR_USBPHY_ENABLE;
|
|
|
|
/* Disable interrupts */
|
|
|
|
jz_writew(USB_REG_INTRINE, 0);
|
|
|
|
jz_writew(USB_REG_INTROUTE, 0);
|
|
|
|
jz_writeb(USB_REG_INTRUSBE, 0);
|
|
|
|
jz_writeb(USB_REG_FADDR,0);
|
|
|
|
jz_writeb(USB_REG_POWER,0x60); //High speed
|
|
|
|
jz_writeb(USB_REG_INDEX,0);
|
|
|
|
jz_writeb(USB_REG_CSR0,0xc0);
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_INMAXP,512);
|
|
|
|
jz_writew(USB_REG_INCSR,0x2048);
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_OUTMAXP,512);
|
|
|
|
jz_writew(USB_REG_OUTCSR,0x0090);
|
|
|
|
jz_writew(USB_REG_INTRINE,0x3); //enable intr
|
|
|
|
jz_writew(USB_REG_INTROUTE,0x2);
|
|
|
|
jz_writeb(USB_REG_INTRUSBE,0x4);
|
|
|
|
|
|
|
|
if ((jz_readb(USB_REG_POWER)&0x10)==0)
|
|
|
|
{
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_INMAXP,64);
|
|
|
|
jz_writew(USB_REG_INCSR,0x2048);
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_OUTMAXP,64);
|
|
|
|
jz_writew(USB_REG_OUTCSR,0x0090);
|
|
|
|
USB_Version=USB_FS;
|
|
|
|
fifosize[1]=64;
|
|
|
|
EP0_init(1,64,1,64);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_INMAXP,512);
|
|
|
|
jz_writew(USB_REG_INCSR,0x2048);
|
|
|
|
jz_writeb(USB_REG_INDEX,1);
|
|
|
|
jz_writew(USB_REG_OUTMAXP,512);
|
|
|
|
jz_writew(USB_REG_OUTCSR,0x0090);
|
|
|
|
USB_Version=USB_HS;
|
|
|
|
fifosize[1]=512;
|
|
|
|
EP0_init(1,512,1,512);
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
void usbHandleStandDevReq(u8 *buf)
|
|
|
|
{
|
|
|
|
USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf;
|
|
|
|
switch (dreq->bRequest) {
|
|
|
|
case GET_DESCRIPTOR:
|
|
|
|
if (dreq->bmRequestType == 0x80) /* Dev2Host */
|
|
|
|
switch(dreq->wValue >> 8)
|
|
|
|
{
|
|
|
|
case DEVICE_DESCRIPTOR:
|
|
|
|
sendDevDesc(dreq->wLength);
|
|
|
|
break;
|
|
|
|
case CONFIGURATION_DESCRIPTOR:
|
|
|
|
sendConfDesc(dreq->wLength);
|
|
|
|
break;
|
|
|
|
case STRING_DESCRIPTOR:
|
|
|
|
if (dreq->wLength == 0x02)
|
|
|
|
HW_SendPKT(0, "\x04\x03", 2);
|
|
|
|
else
|
|
|
|
sendDevDescString(dreq->wLength);
|
|
|
|
//HW_SendPKT(0, "\x04\x03\x09\x04", 2);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
ep0state=USB_EP0_TX;
|
|
|
|
|
|
|
|
break;
|
|
|
|
case SET_ADDRESS:
|
|
|
|
jz_writeb(USB_REG_FADDR,dreq->wValue);
|
|
|
|
break;
|
|
|
|
case GET_STATUS:
|
|
|
|
switch (dreq->bmRequestType) {
|
|
|
|
case 80: /* device */
|
|
|
|
HW_SendPKT(0, "\x01\x00", 2);
|
|
|
|
break;
|
|
|
|
case 81: /* interface */
|
|
|
|
case 82: /* ep */
|
|
|
|
HW_SendPKT(0, "\x00\x00", 2);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
ep0state=USB_EP0_TX;
|
|
|
|
break;
|
|
|
|
case CLEAR_FEATURE:
|
|
|
|
case SET_CONFIGURATION:
|
|
|
|
case SET_INTERFACE:
|
|
|
|
case SET_FEATURE:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-09-17 21:44:47 +00:00
|
|
|
unsigned char nandbuffer[4096];
|
2008-08-26 21:48:49 +00:00
|
|
|
|
|
|
|
void usbHandleVendorReq(u8 *buf)
|
|
|
|
{
|
|
|
|
USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf;
|
2008-09-14 16:26:08 +00:00
|
|
|
switch (dreq->bRequest)
|
|
|
|
{
|
2008-09-17 21:44:47 +00:00
|
|
|
case 0xB0:
|
|
|
|
memset(&nandbuffer, 0, 4096);
|
|
|
|
jz_nand_read(dreq->wValue, dreq->wIndex, &nandbuffer);
|
|
|
|
//printf("Read block %d page %d", dreq->wValue, dreq->wIndex);
|
|
|
|
udc_state = IDLE;
|
|
|
|
break;
|
2008-09-14 16:26:08 +00:00
|
|
|
case 0xAB:
|
2008-09-17 21:44:47 +00:00
|
|
|
HW_SendPKT(1, nandbuffer, 4096);
|
|
|
|
//printf("Send data");
|
|
|
|
//udc_state = BULK_OUT;
|
2008-09-14 16:26:08 +00:00
|
|
|
break;
|
|
|
|
case 0x12:
|
|
|
|
HW_SendPKT(0, "TEST", 4);
|
2008-09-17 21:44:47 +00:00
|
|
|
//printf("Send test");
|
2008-09-14 16:26:08 +00:00
|
|
|
udc_state = IDLE;
|
|
|
|
break;
|
2008-08-26 21:48:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void Handshake_PKT(void)
|
|
|
|
{
|
|
|
|
if (udc_state!=IDLE)
|
|
|
|
{
|
|
|
|
HW_SendPKT(1,(u8 *)handshake_PKT,sizeof(handshake_PKT));
|
|
|
|
udc_state = IDLE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void usbHandleDevReq(u8 *buf)
|
|
|
|
{
|
|
|
|
switch ((buf[0] & (3 << 5)) >> 5) {
|
|
|
|
case 0: /* Standard request */
|
|
|
|
usbHandleStandDevReq(buf);
|
|
|
|
break;
|
|
|
|
case 1: /* Class request */
|
|
|
|
break;
|
|
|
|
case 2: /* Vendor request */
|
|
|
|
usbHandleVendorReq(buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void EP0_Handler (void)
|
|
|
|
{
|
|
|
|
u8 byCSR0;
|
|
|
|
|
|
|
|
/* Read CSR0 */
|
|
|
|
jz_writeb(USB_REG_INDEX, 0);
|
|
|
|
byCSR0 = jz_readb(USB_REG_CSR0);
|
|
|
|
|
|
|
|
/* Check for SentStall
|
2008-09-17 21:44:47 +00:00
|
|
|
if sendstall is set ,clear the sendstall bit*/
|
2008-08-26 21:48:49 +00:00
|
|
|
if (byCSR0 & USB_CSR0_SENTSTALL)
|
|
|
|
{
|
|
|
|
jz_writeb(USB_REG_CSR0, (byCSR0 & ~USB_CSR0_SENDSTALL));
|
|
|
|
ep0state = USB_EP0_IDLE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for SetupEnd */
|
|
|
|
if (byCSR0 & USB_CSR0_SETUPEND)
|
|
|
|
{
|
|
|
|
jz_writeb(USB_REG_CSR0, (byCSR0 | USB_CSR0_SVDSETUPEND));
|
|
|
|
ep0state = USB_EP0_IDLE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
/* Call relevant routines for endpoint 0 state */
|
|
|
|
if (ep0state == USB_EP0_IDLE)
|
|
|
|
{
|
|
|
|
if (byCSR0 & USB_CSR0_OUTPKTRDY) //There are datas in fifo
|
|
|
|
{
|
|
|
|
USB_DeviceRequest *dreq;
|
|
|
|
fifo=fifoaddr[0];
|
|
|
|
udcReadFifo((u8 *)rx_buf, sizeof(USB_DeviceRequest));
|
|
|
|
usb_setb(USB_REG_CSR0, 0x48);//clear OUTRD bit
|
|
|
|
dreq = (USB_DeviceRequest *)rx_buf;
|
|
|
|
usbHandleDevReq((u8 *)rx_buf);
|
|
|
|
}
|
|
|
|
rx_size = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ep0state == USB_EP0_TX)
|
|
|
|
{
|
|
|
|
fifo=fifoaddr[0];
|
|
|
|
if (tx_size - finished <= 64)
|
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)tx_buf+finished),
|
|
|
|
tx_size - finished);
|
|
|
|
finished = tx_size;
|
|
|
|
usb_setb(USB_REG_CSR0, USB_CSR0_INPKTRDY);
|
|
|
|
usb_setb(USB_REG_CSR0, USB_CSR0_DATAEND); //Set dataend!
|
|
|
|
ep0state=USB_EP0_IDLE;
|
|
|
|
} else
|
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)tx_buf+finished), 64);
|
|
|
|
usb_setb(USB_REG_CSR0, USB_CSR0_INPKTRDY);
|
|
|
|
finished += 64;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void EPIN_Handler(u8 EP)
|
|
|
|
{
|
|
|
|
jz_writeb(USB_REG_INDEX, EP);
|
|
|
|
fifo = fifoaddr[EP];
|
|
|
|
|
|
|
|
if (Bulk_in_size-Bulk_in_finish==0)
|
|
|
|
{
|
|
|
|
Handshake_PKT();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Bulk_in_size - Bulk_in_finish <= fifosize[EP])
|
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)Bulk_in_buf+Bulk_in_finish),
|
|
|
|
Bulk_in_size - Bulk_in_finish);
|
|
|
|
usb_setw(USB_REG_INCSR, USB_INCSR_INPKTRDY);
|
|
|
|
Bulk_in_finish = Bulk_in_size;
|
2008-09-17 21:44:47 +00:00
|
|
|
}
|
|
|
|
else
|
2008-08-26 21:48:49 +00:00
|
|
|
{
|
|
|
|
udcWriteFifo((u8 *)((u32)Bulk_in_buf+Bulk_in_finish),
|
|
|
|
fifosize[EP]);
|
|
|
|
usb_setw(USB_REG_INCSR, USB_INCSR_INPKTRDY);
|
|
|
|
Bulk_in_finish += fifosize[EP];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void EPOUT_Handler(u8 EP)
|
|
|
|
{
|
|
|
|
u32 size;
|
|
|
|
jz_writeb(USB_REG_INDEX, EP);
|
|
|
|
size = jz_readw(USB_REG_OUTCOUNT);
|
|
|
|
fifo = fifoaddr[EP];
|
|
|
|
udcReadFifo((u8 *)((u32)Bulk_out_buf+Bulk_out_size), size);
|
|
|
|
usb_clearb(USB_REG_OUTCSR,USB_OUTCSR_OUTPKTRDY);
|
|
|
|
Bulk_out_size += size;
|
|
|
|
}
|
|
|
|
|
|
|
|
void UDC(void)
|
|
|
|
{
|
|
|
|
u8 IntrUSB;
|
|
|
|
u16 IntrIn;
|
|
|
|
u16 IntrOut;
|
|
|
|
/* Read interrupt registers */
|
|
|
|
IntrUSB = jz_readb(USB_REG_INTRUSB);
|
|
|
|
IntrIn = jz_readw(USB_REG_INTRIN);
|
|
|
|
IntrOut = jz_readw(USB_REG_INTROUT);
|
|
|
|
|
|
|
|
if ( IntrUSB == 0 && IntrIn == 0 && IntrOut == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (IntrIn & 2)
|
|
|
|
{
|
|
|
|
EPIN_Handler(1);
|
|
|
|
}
|
|
|
|
if (IntrOut & 2)
|
|
|
|
{
|
|
|
|
EPOUT_Handler(1);
|
|
|
|
}
|
|
|
|
if (IntrUSB & USB_INTR_RESET)
|
|
|
|
{
|
|
|
|
udc_reset();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for endpoint 0 interrupt */
|
|
|
|
if (IntrIn & USB_INTR_EP0)
|
|
|
|
{
|
|
|
|
EP0_Handler();
|
|
|
|
}
|
|
|
|
|
|
|
|
IntrIn = jz_readw(USB_REG_INTRIN);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void __udc_start(void)
|
|
|
|
{
|
|
|
|
udc_reset();
|
|
|
|
|
|
|
|
ep0state = USB_EP0_IDLE;
|
|
|
|
Bulk_in_size = 0;
|
|
|
|
Bulk_in_finish = 0;
|
|
|
|
Bulk_out_size = 0;
|
|
|
|
udc_state = IDLE;
|
|
|
|
tx_size = 0;
|
|
|
|
rx_size = 0;
|
|
|
|
finished = 0;
|
|
|
|
|
|
|
|
if ((jz_readb(USB_REG_POWER)&0x10)==0)
|
|
|
|
{
|
|
|
|
USB_Version=USB_FS;
|
|
|
|
fifosize[1]=64;
|
|
|
|
EP0_init(1,64,1,64);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
USB_Version=USB_HS;
|
|
|
|
fifosize[1]=512;
|
|
|
|
EP0_init(1,512,1,512);
|
|
|
|
}
|
|
|
|
|
|
|
|
USB_Version=USB_HS;
|
|
|
|
system_enable_irq(IRQ_UDC);
|
|
|
|
}
|
|
|
|
|
2008-09-14 16:26:08 +00:00
|
|
|
void usb_init_device(void)
|
|
|
|
{
|
2008-09-17 21:44:47 +00:00
|
|
|
REG_USB_REG_POWER &= ~USB_POWER_SOFTCONN;
|
|
|
|
REG_USB_REG_POWER |= USB_POWER_SOFTCONN;
|
2008-09-14 16:26:08 +00:00
|
|
|
__udc_start();
|
|
|
|
}
|
2008-08-26 21:48:49 +00:00
|
|
|
|
|
|
|
#endif
|