2009-12-02 04:30:08 +00:00
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-c
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2008-05-16 21:16:01 +00:00
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-x
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2011-02-06 19:28:46 +00:00
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-stack 0x200
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-heap 0x200
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-l rts500.lib
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2008-05-16 21:16:01 +00:00
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MEMORY
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{
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PAGE 0:
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2009-12-02 04:30:08 +00:00
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DARAM (RWIX): origin = 80h, length = 7F00h
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VECS (RIX) : origin = 7F80h, length = 80h
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/* SARAM can be read and written to, but it cannot execute and does not need
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* to be initialized. */
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SARAM (RW) : origin = 8000h, length = 4000h
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2008-05-16 21:16:01 +00:00
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}
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SECTIONS
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{
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2009-12-02 04:30:08 +00:00
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.text > DARAM PAGE 0
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.cinit > DARAM PAGE 0
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.switch > DARAM PAGE 0
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.data > DARAM PAGE 0
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2008-05-16 21:16:01 +00:00
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2009-12-02 04:30:08 +00:00
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.bss > DARAM PAGE 0
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.const > DARAM PAGE 0
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.sysmem > DARAM PAGE 0
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.stack > DARAM PAGE 0
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2008-05-16 21:16:01 +00:00
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2009-12-02 04:30:08 +00:00
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.vectors > VECS PAGE 0
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2008-05-16 21:16:01 +00:00
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/* DMA buffers for ABU mode must start on a 2*size boundary. */
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2009-12-02 04:30:08 +00:00
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.dma > SARAM PAGE 0
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2008-05-16 21:16:01 +00:00
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}
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2011-02-06 19:28:46 +00:00
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