2007-09-22 06:04:14 +00:00
|
|
|
/***************************************************************************
|
|
|
|
* __________ __ ___.
|
|
|
|
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
|
|
|
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
|
|
|
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
|
|
|
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
|
|
|
* \/ \/ \/ \/ \/
|
|
|
|
* $Id$
|
|
|
|
*
|
|
|
|
* Copyright (C) 2002 by Linus Nielsen Feltzing
|
|
|
|
*
|
2007-09-22 15:43:38 +00:00
|
|
|
* Arm bootloader and startup code based on startup.s from the iPodLinux loader
|
|
|
|
*
|
|
|
|
* Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
|
|
|
|
* Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
|
|
|
|
*
|
2008-06-28 18:10:04 +00:00
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version 2
|
|
|
|
* of the License, or (at your option) any later version.
|
2007-09-22 06:04:14 +00:00
|
|
|
*
|
|
|
|
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
|
|
|
* KIND, either express or implied.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
#include "config.h"
|
|
|
|
#include "cpu.h"
|
|
|
|
|
|
|
|
.section .init.text,"ax",%progbits
|
|
|
|
|
|
|
|
.global start
|
|
|
|
start:
|
2007-10-26 05:17:15 +00:00
|
|
|
msr cpsr, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
|
2007-09-22 06:04:14 +00:00
|
|
|
|
2008-05-17 14:20:09 +00:00
|
|
|
#ifndef CREATIVE_ZVx
|
2007-09-22 06:04:14 +00:00
|
|
|
/* Copy exception handler code to address 0 */
|
|
|
|
ldr r2, =_vectorsstart
|
|
|
|
ldr r3, =_vectorsend
|
|
|
|
ldr r4, =_vectorscopy
|
|
|
|
1:
|
|
|
|
cmp r3, r2
|
|
|
|
ldrhi r5, [r4], #4
|
|
|
|
strhi r5, [r2], #4
|
|
|
|
bhi 1b
|
2008-05-17 14:20:09 +00:00
|
|
|
#endif
|
2007-09-22 06:04:14 +00:00
|
|
|
|
2007-10-23 03:29:15 +00:00
|
|
|
/* Disable data and instruction cache, high vectors (at 0xffff0000 instead of 0x00000000) */
|
2007-11-02 08:43:56 +00:00
|
|
|
mrc p15, 0, r0, c1, c0, 0
|
|
|
|
/* clear bits 13, 9:8 (--VI --RS) */
|
|
|
|
bic r0, r0, #0x00003300
|
|
|
|
/* clear bits 7, 2:0 (B--- -C-M) */
|
|
|
|
bic r0, r0, #0x00000085
|
|
|
|
/* make sure bit 2 (A) Align is set */
|
|
|
|
orr r0, r0, #0x00000002
|
|
|
|
mcr p15, 0, r0, c1, c0, 0
|
2007-09-25 04:45:49 +00:00
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
#if !defined(STUB)
|
2007-09-22 06:04:14 +00:00
|
|
|
/* Zero out IBSS */
|
|
|
|
ldr r2, =_iedata
|
|
|
|
ldr r3, =_iend
|
|
|
|
mov r4, #0
|
|
|
|
1:
|
|
|
|
cmp r3, r2
|
|
|
|
strhi r4, [r2], #4
|
|
|
|
bhi 1b
|
2007-10-23 03:29:15 +00:00
|
|
|
|
2008-05-17 14:20:09 +00:00
|
|
|
#ifndef CREATIVE_ZVx
|
2007-09-22 06:04:14 +00:00
|
|
|
/* Copy the IRAM */
|
|
|
|
ldr r2, =_iramcopy
|
|
|
|
ldr r3, =_iramstart
|
|
|
|
ldr r4, =_iramend
|
|
|
|
1:
|
|
|
|
cmp r4, r3
|
|
|
|
ldrhi r5, [r2], #4
|
|
|
|
strhi r5, [r3], #4
|
|
|
|
bhi 1b
|
2008-05-17 14:20:09 +00:00
|
|
|
#endif
|
2009-06-08 00:19:16 +00:00
|
|
|
#endif /* !STUB */
|
2007-09-22 06:04:14 +00:00
|
|
|
|
2007-10-26 05:17:15 +00:00
|
|
|
|
2009-04-01 03:21:18 +00:00
|
|
|
/* Initialise bss section to zero */
|
|
|
|
ldr r2, =_edata
|
|
|
|
ldr r3, =_end
|
|
|
|
mov r4, #0
|
|
|
|
bsszero:
|
|
|
|
cmp r3, r2
|
|
|
|
strhi r4, [r2], #4
|
|
|
|
bhi bsszero
|
2007-10-26 05:17:15 +00:00
|
|
|
|
2007-09-22 06:04:14 +00:00
|
|
|
/* Set up some stack and munge it with 0xdeadbeef */
|
2009-04-01 03:21:18 +00:00
|
|
|
ldr sp, =stackend
|
|
|
|
mov r3, sp
|
|
|
|
ldr r2, =stackbegin
|
|
|
|
ldr r4, =0xdeadbeef
|
|
|
|
stackmunge:
|
|
|
|
cmp r3, r2
|
|
|
|
strhi r4, [r2], #4
|
|
|
|
bhi stackmunge
|
2007-09-22 06:04:14 +00:00
|
|
|
|
2007-11-02 08:43:56 +00:00
|
|
|
/* Set up stack for IRQ mode */
|
2009-02-26 21:23:10 +00:00
|
|
|
msr cpsr_c, #0xd2 /* IRQ disabled, FIQ enabled */
|
2007-09-22 06:04:14 +00:00
|
|
|
ldr sp, =irq_stack
|
|
|
|
/* Set up stack for FIQ mode */
|
2007-10-26 05:17:15 +00:00
|
|
|
msr cpsr_c, #0xd1 /* IRQ/FIQ disabled */
|
2007-09-22 06:04:14 +00:00
|
|
|
ldr sp, =fiq_stack
|
|
|
|
|
|
|
|
/* Let abort and undefined modes use IRQ stack */
|
2007-10-26 05:17:15 +00:00
|
|
|
msr cpsr_c, #0xd7 /* IRQ/FIQ disabled */
|
2007-09-22 06:04:14 +00:00
|
|
|
ldr sp, =irq_stack
|
2007-10-26 05:17:15 +00:00
|
|
|
msr cpsr_c, #0xdb /* IRQ/FIQ disabled */
|
2007-09-22 06:04:14 +00:00
|
|
|
ldr sp, =irq_stack
|
2007-10-26 05:17:15 +00:00
|
|
|
|
2007-09-23 23:08:39 +00:00
|
|
|
/* Switch to supervisor mode (no IRQ) */
|
2007-09-22 06:04:14 +00:00
|
|
|
msr cpsr_c, #0xd3
|
|
|
|
ldr sp, =stackend
|
|
|
|
|
|
|
|
start_loc:
|
|
|
|
bl main
|
|
|
|
/* main() should never return */
|
|
|
|
|
|
|
|
/* Exception handlers. Will be copied to address 0 after memory remapping */
|
|
|
|
.section .vectors,"aw"
|
2010-02-07 17:50:24 +00:00
|
|
|
b start
|
|
|
|
b undef_instr_handler
|
|
|
|
b software_int_handler
|
|
|
|
b prefetch_abort_handler
|
|
|
|
b data_abort_handler
|
|
|
|
b reserved_handler
|
|
|
|
b irq_handler
|
2009-04-01 03:21:18 +00:00
|
|
|
b fiq_handler
|
2007-09-22 06:04:14 +00:00
|
|
|
|
|
|
|
.text
|
|
|
|
|
|
|
|
/* All illegal exceptions call into UIE with exception address as first
|
|
|
|
parameter. This is calculated differently depending on which exception
|
|
|
|
we're in. Second parameter is exception number, used for a string lookup
|
|
|
|
in UIE.
|
|
|
|
*/
|
|
|
|
undef_instr_handler:
|
2010-01-24 15:04:21 +00:00
|
|
|
sub r0, lr, #4
|
2007-09-22 06:04:14 +00:00
|
|
|
mov r1, #0
|
|
|
|
b UIE
|
|
|
|
|
|
|
|
/* We run supervisor mode most of the time, and should never see a software
|
|
|
|
exception being thrown. Perhaps make it illegal and call UIE?
|
|
|
|
*/
|
|
|
|
software_int_handler:
|
|
|
|
reserved_handler:
|
|
|
|
movs pc, lr
|
|
|
|
|
|
|
|
prefetch_abort_handler:
|
|
|
|
sub r0, lr, #4
|
|
|
|
mov r1, #1
|
|
|
|
b UIE
|
|
|
|
|
|
|
|
data_abort_handler:
|
|
|
|
sub r0, lr, #8
|
|
|
|
mov r1, #2
|
|
|
|
b UIE
|
|
|
|
|
2009-02-05 21:47:54 +00:00
|
|
|
#ifdef STUB
|
2007-09-22 06:04:14 +00:00
|
|
|
UIE:
|
|
|
|
b UIE
|
2007-09-30 16:29:21 +00:00
|
|
|
#endif
|
2007-09-22 06:04:14 +00:00
|
|
|
|