2007-10-18 05:14:10 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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2007-09-20 09:08:40 +00:00
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*
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2007-10-18 05:14:10 +00:00
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* Copyright (C) 2007 Catalin Patulea <cat@vv.carleton.ca>
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2007-09-20 09:08:40 +00:00
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*
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2007-10-18 05:14:10 +00:00
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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2007-09-20 09:08:40 +00:00
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*
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2007-10-18 05:14:10 +00:00
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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2007-09-20 09:08:40 +00:00
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*
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2007-10-18 05:14:10 +00:00
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****************************************************************************/
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2007-09-20 09:08:40 +00:00
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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/* UART 0/1 */
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2007-09-30 08:18:46 +00:00
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#define CONFIG_UART_BRSR 87
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2007-10-18 05:14:10 +00:00
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#define MAX_UART_BUFFER 31
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unsigned char uart1buffer[MAX_UART_BUFFER];
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2007-09-30 08:18:46 +00:00
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int uart1read = 0, uart1write = 0, uart1count = 0;
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2007-09-20 09:08:40 +00:00
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2007-10-01 05:42:12 +00:00
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/*
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static void do_checksums(char *data, int len, char *xor, char *add)
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2007-09-20 09:08:40 +00:00
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{
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int i;
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*xor = data[0];
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*add = data[0];
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for(i=1;i<len;i++)
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{
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*xor ^= data[i];
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*add += data[i];
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}
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}
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2007-10-01 05:42:12 +00:00
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*/
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2007-09-20 09:08:40 +00:00
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2007-10-18 05:14:10 +00:00
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void uart_init(void)
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2007-09-30 08:18:46 +00:00
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{
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2007-09-20 09:08:40 +00:00
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// 8-N-1
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2007-09-23 23:08:39 +00:00
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IO_UART1_MSR=0x8000;
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IO_UART1_BRSR=CONFIG_UART_BRSR;
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2007-10-18 05:14:10 +00:00
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IO_UART1_RFCR = 0x8010; /* Trigger later */
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2007-09-30 08:18:46 +00:00
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/* gio 27 is input, uart1 rx
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gio 28 is output, uart1 tx */
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IO_GIO_DIR1 |= (1<<11); /* gio 27 */
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IO_GIO_DIR1 &= ~(1<<12); /* gio 28 */
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2007-10-18 05:14:10 +00:00
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2007-09-30 08:18:46 +00:00
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/* init the recieve buffer */
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uart1read = 0;
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uart1write = 0;
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uart1count = 0;
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/* Enable the interrupt */
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IO_INTC_EINT0 |= (1<<IRQ_UART1);
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2007-09-20 09:08:40 +00:00
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}
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2007-10-01 05:42:12 +00:00
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void uart1_putc(char ch)
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{
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/* Wait for room in FIFO */
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2007-09-23 23:08:39 +00:00
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while ((IO_UART1_TFCR & 0x3f) >= 0x20);
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2007-09-20 09:08:40 +00:00
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2007-10-01 05:42:12 +00:00
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/* Write character */
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2007-09-23 23:08:39 +00:00
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IO_UART1_DTRR=ch;
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2007-09-20 09:08:40 +00:00
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}
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2007-10-01 05:42:12 +00:00
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/* Unsigned integer to ASCII hexadecimal conversion */
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void uart1_putHex(unsigned int n)
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{
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2007-09-20 09:08:40 +00:00
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unsigned int i;
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for (i = 8; i != 0; i--) {
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unsigned int digit = n >> 28;
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2007-10-01 05:42:12 +00:00
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uart1_putc(digit >= 10 ? digit - 10 + 'A' : digit + '0');
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2007-09-20 09:08:40 +00:00
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n <<= 4;
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}
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}
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2007-10-01 05:42:12 +00:00
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void uart1_puts(const char *str)
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{
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2007-09-20 09:08:40 +00:00
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char ch;
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while ((ch = *str++) != '\0') {
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2007-10-01 05:42:12 +00:00
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uart1_putc(ch);
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2007-09-20 09:08:40 +00:00
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}
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}
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2007-10-01 05:42:12 +00:00
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void uart1_gets(char *str, unsigned int size)
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{
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2007-09-20 09:08:40 +00:00
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for (;;) {
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char ch;
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2007-10-01 05:42:12 +00:00
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/* Wait for FIFO to contain something */
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2007-09-23 23:08:39 +00:00
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while ((IO_UART1_RFCR & 0x3f) == 0);
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2007-09-20 09:08:40 +00:00
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2007-10-01 05:42:12 +00:00
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/* Read character */
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2007-09-23 23:08:39 +00:00
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ch = (char)IO_UART1_DTRR;
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2007-10-18 05:14:10 +00:00
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2007-10-01 05:42:12 +00:00
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/* If CR, also echo LF, null-terminate, and return */
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2007-09-20 09:08:40 +00:00
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if (ch == '\r') {
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2007-09-23 23:08:39 +00:00
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IO_UART1_DTRR='\n';
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2007-09-20 09:08:40 +00:00
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if (size) {
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*str++ = '\0';
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}
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return;
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}
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2007-10-01 05:42:12 +00:00
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/* Append to buffer */
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2007-09-20 09:08:40 +00:00
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if (size) {
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*str++ = ch;
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--size;
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}
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}
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}
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2007-09-30 08:18:46 +00:00
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bool uart1_getch(char *c)
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{
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if (uart1count > 0)
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{
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2007-10-18 05:14:10 +00:00
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if(uart1read>MAX_UART_BUFFER)
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uart1read=0;
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*c = uart1buffer[uart1read++];
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2007-09-30 08:18:46 +00:00
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uart1count--;
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return true;
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}
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return false;
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}
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/* UART1 receive intterupt handler */
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void UART1(void)
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{
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2007-10-18 05:14:10 +00:00
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while (IO_UART1_RFCR & 0x3f)
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2007-09-30 08:18:46 +00:00
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{
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2007-10-18 05:14:10 +00:00
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if (uart1count > MAX_UART_BUFFER)
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2007-09-30 08:18:46 +00:00
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panicf("UART1 buffer overflow");
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2007-10-18 05:14:10 +00:00
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else
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{
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if(uart1write>MAX_UART_BUFFER)
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uart1write=0;
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uart1buffer[uart1write++] = IO_UART1_DTRR & 0xff;
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uart1count++;
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}
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2007-09-30 08:18:46 +00:00
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}
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2007-10-01 05:42:12 +00:00
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2007-09-30 08:18:46 +00:00
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IO_INTC_IRQ0 = (1<<IRQ_UART1);
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}
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