2006-08-01 22:28:14 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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2006-11-21 22:55:39 +00:00
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* Copyright (C) 2006 Daniel Ankers
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2006-08-01 22:28:14 +00:00
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*
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2008-06-28 18:10:04 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2006-08-01 22:28:14 +00:00
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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2009-07-17 22:28:49 +00:00
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#include "config.h" /* for HAVE_MULTIDRIVE */
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2010-06-05 21:12:16 +00:00
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#include "sdmmc.h"
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2010-08-12 13:38:25 +00:00
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#include "gcc_extensions.h"
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2009-07-01 10:07:22 +00:00
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#ifdef HAVE_HOTSWAP
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#include "sd-pp-target.h"
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#endif
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2006-11-21 22:55:39 +00:00
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#include "system.h"
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2006-08-01 22:28:14 +00:00
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#include <string.h>
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2007-06-30 02:08:27 +00:00
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#include "led.h"
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2007-11-05 16:12:13 +00:00
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#include "cpu.h"
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2008-11-01 16:14:28 +00:00
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#include "storage.h"
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2017-03-13 02:05:44 +00:00
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#include "fs_defines.h"
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2006-08-01 22:28:14 +00:00
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2006-12-21 18:32:47 +00:00
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#define BLOCKS_PER_BANK 0x7a7800
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2006-08-01 22:28:14 +00:00
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2009-02-01 09:08:12 +00:00
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/* Comparing documentations of various MMC/SD controllers revealed, */
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/* that this controller seems to be a mix of PXA27x, PXA255 and */
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/* some PP specific stuff. The register and bit definitions are */
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/* taken from the 'PXA27x Developers Manual', as it appears to be */
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/* the closest match. Known differences and obscurities are commented.*/
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#define MMC_STRPCL (*(volatile unsigned int *)(0x70008200))
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#define MMC_STAT (*(volatile unsigned int *)(0x70008204))
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#define MMC_CLKRT (*(volatile unsigned int *)(0x70008208))
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#define MMC_SPI (*(volatile unsigned int *)(0x7000820c))
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#define MMC_CMDAT (*(volatile unsigned int *)(0x70008210))
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#define MMC_RESTO (*(volatile unsigned int *)(0x70008214))
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#define MMC_RDTO (*(volatile unsigned int *)(0x70008218))
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#define MMC_BLKLEN (*(volatile unsigned int *)(0x7000821c))
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#define MMC_NUMBLK (*(volatile unsigned int *)(0x70008220))
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#define MMC_I_MASK (*(volatile unsigned int *)(0x70008224))
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#define MMC_CMD (*(volatile unsigned int *)(0x70008228))
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#define MMC_ARGH (*(volatile unsigned int *)(0x7000822c))
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#define MMC_ARGL (*(volatile unsigned int *)(0x70008230))
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#define MMC_RES (*(volatile unsigned int *)(0x70008234))
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/* PXA255/27x have separate RX/TX FIFOs with 32x8 bit */
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/* PP502x has a combined Data FIFO with 16x16 bit */
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#define MMC_DATA_FIFO (*(volatile unsigned int *)(0x70008280))
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/* PP specific registers, no other controller seem to have such. */
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#define MMC_SD_STATE (*(volatile unsigned int *)(0x70008238))
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#define MMC_INIT_1 (*(volatile unsigned int *)(0x70008240))
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#define MMC_INIT_2 (*(volatile unsigned int *)(0x70008244))
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/* MMC_STAT bits */
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#define STAT_SDIO_SUSPEND_ACK (1 << 16)
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#define STAT_SDIO_INT (1 << 15)
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#define STAT_RD_STALLED (1 << 14)
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#define STAT_END_CMD_RES (1 << 13)
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#define STAT_PRG_DONE (1 << 12)
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#define STAT_DATA_TRAN_DONE (1 << 11)
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#define STAT_SPI_WR_ERR (1 << 10)
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#define STAT_FLASH_ERR (1 << 9)
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#define STAT_CLK_EN (1 << 8)
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#define STAT_RECV_FIFO_FULL (1 << 7) /* taken from PXA255 */
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#define STAT_XMIT_FIFO_EMPTY (1 << 6) /* taken from PXA255 */
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#define STAT_RES_CRC_ERR (1 << 5)
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#define STAT_DAT_ERR_TOKEN (1 << 4)
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#define STAT_CRC_RD_ERR (1 << 3)
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#define STAT_CRC_WR_ERR (1 << 2)
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#define STAT_TIME_OUT_RES (1 << 1)
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#define STAT_TIME_OUT_READ (1)
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#define STAT_ERROR_BITS (0x3f)
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/* MMC_CMDAT bits */
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/* Some of the bits used by the OF don't make much sense with these */
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/* definitions. So they're probably different between PXA and PP502x */
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/* Bits 0-5 appear to match though. */
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#define CMDAT_SDIO_RESUME (1 << 13)
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#define CMDAT_SDIO_SUSPEND (1 << 12)
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#define CMDAT_SDIO_INT_EN (1 << 11)
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#define CMDAT_STOP_TRAN (1 << 10)
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#define CMDAT_SD_4DAT (1 << 8)
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#define CMDAT_DMA_EN (1 << 7)
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#define CMDAT_INIT (1 << 6)
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#define CMDAT_BUSY (1 << 5)
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#define CMDAT_STRM_BLK (1 << 4)
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#define CMDAT_WR_RD (1 << 3)
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#define CMDAT_DATA_EN (1 << 2)
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#define CMDAT_RES_TYPE3 (3)
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#define CMDAT_RES_TYPE2 (2)
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#define CMDAT_RES_TYPE1 (1)
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/* MMC_I_MASK bits */
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/* PP502x apparently only has bits 0-3 */
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#define I_MASK_SDIO_SUSPEND_ACK (1 << 12)
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#define I_MASK_SDIO_INT (1 << 11)
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#define I_MASK_RD_STALLED (1 << 10)
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#define I_MASK_RES_ERR (1 << 9)
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#define I_MASK_DAT_ERR (1 << 8)
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#define I_MASK_TINT (1 << 7)
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#define I_MASK_TXFIFO_WR_REQ (1 << 6)
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#define I_MASK_RXFIFO_RD_REQ (1 << 5)
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#define I_MASK_CLK_IS_OFF (1 << 4)
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#define I_MASK_STOP_CMD (1 << 3)
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#define I_MASK_END_CMD_RES (1 << 2)
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#define I_MASK_PRG_DONE (1 << 1)
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#define I_MASK_DATA_TRAN_DONE (1 << 0)
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2007-07-12 06:50:42 +00:00
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2007-07-25 06:15:07 +00:00
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#define FIFO_LEN 16 /* FIFO is 16 words deep */
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2006-11-21 22:55:39 +00:00
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2007-07-25 06:15:07 +00:00
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#define EC_OK 0
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#define EC_FAILED 1
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#define EC_NOCARD 2
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#define EC_WAIT_STATE_FAILED 3
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#define EC_CHECK_TIMEOUT_FAILED 4
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#define EC_POWER_UP 5
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#define EC_READ_TIMEOUT 6
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#define EC_WRITE_TIMEOUT 7
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#define EC_TRAN_SEL_BANK 8
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#define EC_TRAN_READ_ENTRY 9
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#define EC_TRAN_READ_EXIT 10
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#define EC_TRAN_WRITE_ENTRY 11
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#define EC_TRAN_WRITE_EXIT 12
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#define EC_FIFO_SEL_BANK_EMPTY 13
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#define EC_FIFO_SEL_BANK_DONE 14
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#define EC_FIFO_ENA_BANK_EMPTY 15
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#define EC_FIFO_READ_FULL 16
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#define EC_FIFO_WR_EMPTY 17
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#define EC_FIFO_WR_DONE 18
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#define EC_COMMAND 19
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#define NUM_EC 20
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2006-11-21 22:55:39 +00:00
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2007-06-30 02:08:27 +00:00
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/* for compatibility */
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2008-11-01 16:14:28 +00:00
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static long last_disk_activity = -1;
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2006-08-01 22:28:14 +00:00
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2007-07-25 06:15:07 +00:00
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static long next_yield = 0;
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2007-11-20 22:45:46 +00:00
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#define MIN_YIELD_PERIOD 1000
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2006-08-01 22:28:14 +00:00
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2009-07-01 10:07:22 +00:00
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static tCardInfo card_info[2];
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static tCardInfo *currcard = NULL; /* current active card */
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2007-07-25 06:15:07 +00:00
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struct sd_card_status
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{
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int retry;
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int retry_max;
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};
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2009-07-17 22:28:49 +00:00
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static struct sd_card_status sd_status[NUM_DRIVES] =
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2007-07-25 06:15:07 +00:00
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{
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{ 0, 1 },
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2009-07-17 22:28:49 +00:00
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#ifdef HAVE_MULTIDRIVE
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2007-07-25 06:15:07 +00:00
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{ 0, 10 }
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2007-10-08 20:39:46 +00:00
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#endif
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2007-07-25 06:15:07 +00:00
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};
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2006-08-01 22:28:14 +00:00
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2017-03-15 05:51:54 +00:00
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static struct mutex sd_mtx SHAREDBSS_ATTR;
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2006-11-25 13:04:50 +00:00
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2009-07-20 19:46:36 +00:00
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#ifdef HAVE_HOTSWAP
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2009-07-20 13:23:28 +00:00
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static int sd_first_drive = 0;
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2009-07-20 19:46:36 +00:00
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#endif
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2009-07-20 13:23:28 +00:00
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2006-11-21 22:55:39 +00:00
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/* Private Functions */
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2006-08-01 22:28:14 +00:00
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2007-07-25 06:15:07 +00:00
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static unsigned int check_time[NUM_EC];
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2007-06-30 02:08:27 +00:00
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2017-03-15 05:51:54 +00:00
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static inline void enable_controller(bool on)
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{
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if(on)
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{
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DEV_EN |= DEV_ATA; /* Enable controller */
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}
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else
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{
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DEV_EN &= ~DEV_ATA; /* Disable controller */
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}
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}
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2007-07-25 06:15:07 +00:00
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static inline bool sd_check_timeout(long timeout, int id)
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2006-08-01 22:28:14 +00:00
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{
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2007-07-25 06:15:07 +00:00
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return !TIME_AFTER(USEC_TIMER, check_time[id] + timeout);
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2007-06-30 02:08:27 +00:00
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}
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2007-07-25 06:15:07 +00:00
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static bool sd_poll_status(unsigned int trigger, long timeout)
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2007-06-30 02:08:27 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long t = USEC_TIMER;
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2007-06-30 02:08:27 +00:00
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2009-02-01 09:08:12 +00:00
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while ((MMC_STAT & trigger) == 0)
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2006-11-21 22:55:39 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long time = USEC_TIMER;
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if (TIME_AFTER(time, next_yield))
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2006-11-21 22:55:39 +00:00
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{
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2007-07-25 06:15:07 +00:00
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long ty = USEC_TIMER;
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2008-03-25 02:34:12 +00:00
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yield();
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2007-07-25 06:15:07 +00:00
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timeout += USEC_TIMER - ty;
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next_yield = ty + MIN_YIELD_PERIOD;
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}
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2007-06-30 02:08:27 +00:00
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2007-07-25 06:15:07 +00:00
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if (TIME_AFTER(time, t + timeout))
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2007-06-30 02:08:27 +00:00
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return false;
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}
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return true;
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2006-08-01 22:28:14 +00:00
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}
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2007-07-25 06:15:07 +00:00
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static int sd_command(unsigned int cmd, unsigned long arg1,
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2009-07-01 10:07:22 +00:00
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unsigned long *response, unsigned int cmdat)
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2006-08-01 22:28:14 +00:00
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{
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2009-02-01 09:08:12 +00:00
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int i, words; /* Number of 16 bit words to read from MMC_RES */
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2007-06-30 02:08:27 +00:00
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unsigned int data[9];
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2009-02-01 09:08:12 +00:00
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MMC_CMD = cmd;
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MMC_ARGH = (unsigned int)((arg1 & 0xffff0000) >> 16);
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MMC_ARGL = (unsigned int)((arg1 & 0xffff));
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MMC_CMDAT = cmdat;
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2007-06-30 02:08:27 +00:00
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2009-02-01 09:08:12 +00:00
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if (!sd_poll_status(STAT_END_CMD_RES, 100000))
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2007-07-25 06:15:07 +00:00
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return -EC_COMMAND;
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2007-06-30 02:08:27 +00:00
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2009-02-01 09:08:12 +00:00
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if ((MMC_STAT & STAT_ERROR_BITS) != 0)
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2007-07-25 06:15:07 +00:00
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/* Error sending command */
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2009-02-01 09:08:12 +00:00
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return -EC_COMMAND - (MMC_STAT & STAT_ERROR_BITS)*100;
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2006-11-21 22:55:39 +00:00
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2008-11-09 23:40:21 +00:00
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if (cmd == SD_GO_IDLE_STATE)
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2007-07-25 06:15:07 +00:00
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return 0; /* no response here */
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2007-06-30 02:08:27 +00:00
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2009-02-01 09:08:12 +00:00
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words = (cmdat == CMDAT_RES_TYPE2) ? 9 : 3;
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2007-06-30 02:08:27 +00:00
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2009-02-01 09:08:12 +00:00
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for (i = 0; i < words; i++) /* MMC_RES is read MSB first */
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data[i] = MMC_RES; /* Read most significant 16-bit word */
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2006-11-21 22:55:39 +00:00
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2007-07-25 06:15:07 +00:00
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if (response == NULL)
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{
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/* response discarded */
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}
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2009-02-01 09:08:12 +00:00
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else if (cmdat == CMDAT_RES_TYPE2)
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2006-11-21 22:55:39 +00:00
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{
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2007-06-30 02:08:27 +00:00
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/* Response type 2 has the following structure:
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* [135:135] Start Bit - '0'
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* [134:134] Transmission bit - '0'
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* [133:128] Reserved - '111111'
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* [127:001] CID or CSD register including internal CRC7
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* [000:000] End Bit - '1'
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*/
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2007-07-25 06:15:07 +00:00
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response[3] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
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response[2] = (data[2]<<24) + (data[3]<<8) + (data[4]>>8);
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response[1] = (data[4]<<24) + (data[5]<<8) + (data[6]>>8);
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response[0] = (data[6]<<24) + (data[7]<<8) + (data[8]>>8);
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2007-06-30 02:08:27 +00:00
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}
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else
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{
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2007-08-22 00:32:45 +00:00
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/* Response types 1, 1b, 3, 6, 7 have the following structure:
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2007-06-30 02:08:27 +00:00
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* Types 4 and 5 are not supported.
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*
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* [47] Start bit - '0'
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* [46] Transmission bit - '0'
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2007-08-22 00:32:45 +00:00
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* [45:40] R1, R1b, R6, R7: Command index
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2007-06-30 02:08:27 +00:00
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* R3: Reserved - '111111'
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* [39:8] R1, R1b: Card Status
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* R3: OCR Register
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* R6: [31:16] RCA
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* [15: 0] Card Status Bits 23, 22, 19, 12:0
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* [23] COM_CRC_ERROR
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|
|
* [22] ILLEGAL_COMMAND
|
|
|
|
* [19] ERROR
|
|
|
|
* [12:9] CURRENT_STATE
|
|
|
|
* [8] READY_FOR_DATA
|
|
|
|
* [7:6]
|
2008-11-09 23:40:21 +00:00
|
|
|
* [5] SD_APP_CMD
|
2007-06-30 02:08:27 +00:00
|
|
|
* [4]
|
|
|
|
* [3] AKE_SEQ_ERROR
|
|
|
|
* [2] Reserved
|
|
|
|
* [1:0] Reserved for test mode
|
2007-08-22 00:32:45 +00:00
|
|
|
* R7: [19:16] Voltage accepted
|
|
|
|
* [15:8] echo-back of check pattern
|
2007-06-30 02:08:27 +00:00
|
|
|
* [7:1] R1, R1b: CRC7
|
|
|
|
* R3: Reserved - '1111111'
|
|
|
|
* [0] End Bit - '1'
|
|
|
|
*/
|
2007-07-25 06:15:07 +00:00
|
|
|
response[0] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static int sd_wait_for_state(unsigned int state, int id)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2009-07-01 10:07:22 +00:00
|
|
|
unsigned long response = 0;
|
2007-07-25 06:15:07 +00:00
|
|
|
unsigned int timeout = 0x80000;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
check_time[id] = USEC_TIMER;
|
|
|
|
|
|
|
|
while (1)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2009-02-01 09:08:12 +00:00
|
|
|
int ret = sd_command(SD_SEND_STATUS, currcard->rca, &response, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
long us;
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
return ret*100 - id;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
if (((response >> 9) & 0xf) == state)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_SD_STATE = state;
|
2007-07-25 06:15:07 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_check_timeout(timeout, id))
|
|
|
|
return -EC_WAIT_STATE_FAILED*100 - id;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
us = USEC_TIMER;
|
|
|
|
if (TIME_AFTER(us, next_yield))
|
|
|
|
{
|
2008-03-25 02:34:12 +00:00
|
|
|
yield();
|
2007-07-25 06:15:07 +00:00
|
|
|
timeout += USEC_TIMER - us;
|
|
|
|
next_yield = us + MIN_YIELD_PERIOD;
|
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2009-11-26 00:51:09 +00:00
|
|
|
|
|
|
|
static inline bool card_detect_target(void)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
|
|
#ifdef SANSA_E200
|
|
|
|
return (GPIOA_INPUT_VAL & 0x80) == 0; /* low active */
|
|
|
|
#elif defined SANSA_C200
|
|
|
|
return (GPIOL_INPUT_VAL & 0x08) != 0; /* high active */
|
|
|
|
#endif
|
|
|
|
#else
|
|
|
|
return false;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
static inline void copy_read_sectors_fast(unsigned char **buf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Copy one chunk of 16 words using best method for start alignment */
|
|
|
|
switch ( (intptr_t)*buf & 3 )
|
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #16 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #16 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #16 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #16 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #16 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #16 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
2009-02-01 09:08:12 +00:00
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
2007-06-30 02:08:27 +00:00
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r3, r2, r3, lsl #16 \r\n"
|
|
|
|
"strb r3, [%[buf]], #1 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"strh r3, [%[buf]], #2 \r\n"
|
|
|
|
"mov r3, r3, lsr #16 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #8 \r\n"
|
|
|
|
"orr r3, r3, r5, lsl #24 \r\n"
|
|
|
|
"mov r5, r5, lsr #8 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #8 \r\n"
|
|
|
|
"orr r5, r5, r7, lsl #24 \r\n"
|
|
|
|
"mov r7, r7, lsr #8 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #8 \r\n"
|
|
|
|
"orr r7, r7, r9, lsl #24 \r\n"
|
|
|
|
"mov r2, r9, lsr #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r3-r10 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #8 \r\n"
|
|
|
|
"orr r2, r2, r4, lsl #24 \r\n"
|
|
|
|
"mov r4, r4, lsr #8 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #8 \r\n"
|
|
|
|
"orr r4, r4, r6, lsl #24 \r\n"
|
|
|
|
"mov r6, r6, lsr #8 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #8 \r\n"
|
|
|
|
"orr r6, r6, r8, lsl #24 \r\n"
|
|
|
|
"mov r8, r8, lsr #8 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #8 \r\n"
|
|
|
|
"orr r8, r8, r10, lsl #24 \r\n"
|
|
|
|
"mov r10, r10, lsr #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"strb r10, [%[buf]], #1 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
2009-02-01 09:08:12 +00:00
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
2007-06-30 02:08:27 +00:00
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"strh r2, [%[buf]], #2 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #16 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #16 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r2-r8, r10 } \r\n"
|
|
|
|
"orr r2, r9, r2, lsl #16 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #16 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #16 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #16 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r3, r5, r7 } \r\n"
|
|
|
|
"strh r10, [%[buf]], #2 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
2009-02-01 09:08:12 +00:00
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
2007-06-30 02:08:27 +00:00
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[data], { r2-r9 } \r\n"
|
|
|
|
"orr r3, r2, r3, lsl #16 \r\n"
|
|
|
|
"strb r3, [%[buf]], #1 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"orr r3, r3, r4, lsl #24 \r\n"
|
|
|
|
"mov r4, r4, lsr #8 \r\n"
|
|
|
|
"orr r5, r4, r5, lsl #8 \r\n"
|
|
|
|
"orr r5, r5, r6, lsl #24 \r\n"
|
|
|
|
"mov r6, r6, lsr #8 \r\n"
|
|
|
|
"orr r7, r6, r7, lsl #8 \r\n"
|
|
|
|
"orr r7, r7, r8, lsl #24 \r\n"
|
|
|
|
"mov r8, r8, lsr #8 \r\n"
|
|
|
|
"orr r2, r8, r9, lsl #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r3, r5, r7 } \r\n"
|
|
|
|
"ldmia %[data], { r3-r10 } \r\n"
|
|
|
|
"orr r2, r2, r3, lsl #24 \r\n"
|
|
|
|
"mov r3, r3, lsr #8 \r\n"
|
|
|
|
"orr r4, r3, r4, lsl #8 \r\n"
|
|
|
|
"orr r4, r4, r5, lsl #24 \r\n"
|
|
|
|
"mov r5, r5, lsr #8 \r\n"
|
|
|
|
"orr r6, r5, r6, lsl #8 \r\n"
|
|
|
|
"orr r6, r6, r7, lsl #24 \r\n"
|
|
|
|
"mov r7, r7, lsr #8 \r\n"
|
|
|
|
"orr r8, r7, r8, lsl #8 \r\n"
|
|
|
|
"orr r8, r8, r9, lsl #24 \r\n"
|
|
|
|
"mov r9, r9, lsr #8 \r\n"
|
|
|
|
"orr r10, r9, r10, lsl #8 \r\n"
|
|
|
|
"stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
|
|
|
|
"strh r10, [%[buf]], #2 \r\n"
|
|
|
|
"mov r10, r10, lsr #16 \r\n"
|
|
|
|
"strb r10, [%[buf]], #1 \r\n"
|
|
|
|
: [buf]"+&r"(*buf)
|
2009-02-01 09:08:12 +00:00
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
2007-06-30 02:08:27 +00:00
|
|
|
: "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
break;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
static inline void copy_read_sectors_slow(unsigned char** buf)
|
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
int cnt = FIFO_LEN;
|
2007-06-30 02:08:27 +00:00
|
|
|
int t;
|
|
|
|
|
|
|
|
/* Copy one chunk of 16 words */
|
|
|
|
asm volatile (
|
|
|
|
"1: \r\n"
|
|
|
|
"ldrh %[t], [%[data]] \r\n"
|
|
|
|
"strb %[t], [%[buf]], #1 \r\n"
|
|
|
|
"mov %[t], %[t], lsr #8 \r\n"
|
|
|
|
"strb %[t], [%[buf]], #1 \r\n"
|
|
|
|
"subs %[cnt], %[cnt], #1 \r\n"
|
|
|
|
"bgt 1b \r\n"
|
|
|
|
: [cnt]"+&r"(cnt), [buf]"+&r"(*buf),
|
|
|
|
[t]"=&r"(t)
|
2009-02-01 09:08:12 +00:00
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
2007-06-30 02:08:27 +00:00
|
|
|
);
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Writes have to be kept slow for now */
|
2007-07-25 06:15:07 +00:00
|
|
|
static inline void copy_write_sectors(const unsigned char** buf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2009-02-03 20:21:02 +00:00
|
|
|
int cnt = FIFO_LEN - 1;
|
2007-07-25 06:15:07 +00:00
|
|
|
unsigned t;
|
2009-02-03 20:21:02 +00:00
|
|
|
long time;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2009-02-03 20:21:02 +00:00
|
|
|
time = USEC_TIMER + 3;
|
|
|
|
if (((intptr_t)*buf & 3) == 0)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"ldmia %[buf]!, { r3, r5, r7, r9 } \r\n"
|
|
|
|
"mov r4, r3, lsr #16 \r\n"
|
|
|
|
"mov r6, r5, lsr #16 \r\n"
|
|
|
|
"mov r8, r7, lsr #16 \r\n"
|
|
|
|
"mov r10, r9, lsr #16 \r\n"
|
|
|
|
"stmia %[data], { r3-r10 } \r\n"
|
|
|
|
"ldmia %[buf]!, { r3, r5, r7, r9 } \r\n"
|
|
|
|
"mov r4, r3, lsr #16 \r\n"
|
|
|
|
"mov r6, r5, lsr #16 \r\n"
|
|
|
|
"mov r8, r7, lsr #16 \r\n"
|
|
|
|
"mov %[t], r9, lsr #16 \r\n"
|
|
|
|
"stmia %[data], { r3-r9 } \r\n"
|
|
|
|
: [buf]"+&r"(*buf), [t]"=&r"(t)
|
|
|
|
: [data]"r"(&MMC_DATA_FIFO)
|
|
|
|
: "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
else
|
2007-02-04 03:20:36 +00:00
|
|
|
{
|
2009-02-03 20:21:02 +00:00
|
|
|
do
|
|
|
|
{
|
|
|
|
t = *(*buf)++;
|
|
|
|
t |= *(*buf)++ << 8;
|
|
|
|
MMC_DATA_FIFO = t;
|
|
|
|
} while (--cnt > 0); /* tail loop is faster */
|
2007-07-25 06:15:07 +00:00
|
|
|
t = *(*buf)++;
|
|
|
|
t |= *(*buf)++ << 8;
|
2009-02-03 20:21:02 +00:00
|
|
|
}
|
|
|
|
/* Don't write the last word before at least 3 usec have elapsed since FIFO_EMPTY */
|
|
|
|
/* This prevents the 'two bytes inserted' bug. */
|
|
|
|
|
|
|
|
while (!TIME_AFTER(USEC_TIMER, time));
|
|
|
|
MMC_DATA_FIFO = t;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static int sd_select_bank(unsigned char bank)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2010-04-22 08:31:02 +00:00
|
|
|
unsigned char card_data[FIFO_LEN*2];// FIFO_LEN words=FIFO_LEN*2 bytes
|
2007-07-25 06:15:07 +00:00
|
|
|
const unsigned char* write_buf;
|
|
|
|
int i, ret;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2010-04-22 08:31:02 +00:00
|
|
|
memset(card_data, 0, sizeof card_data);
|
2007-07-25 06:15:07 +00:00
|
|
|
|
2008-11-09 23:40:21 +00:00
|
|
|
ret = sd_wait_for_state(SD_TRAN, EC_TRAN_SEL_BANK);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_BLKLEN = 512;
|
|
|
|
MMC_NUMBLK = 1;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(35, 0, NULL, /* CMD35 is vendor specific */
|
|
|
|
0x1c00 | CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_SD_STATE = SD_PRG;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
card_data[0] = bank;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Write the card data */
|
2009-07-01 21:49:13 +00:00
|
|
|
for (i = 0; i < SD_BLOCK_SIZE/2; i += FIFO_LEN)
|
2007-06-30 02:08:27 +00:00
|
|
|
{
|
2010-04-22 08:31:02 +00:00
|
|
|
write_buf = card_data;
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Wait for the FIFO to empty */
|
2009-02-01 09:08:12 +00:00
|
|
|
if (sd_poll_status(STAT_XMIT_FIFO_EMPTY, 10000))
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
|
|
|
copy_write_sectors(&write_buf); /* Copy one chunk of 16 words */
|
2010-04-22 08:31:02 +00:00
|
|
|
/* clear buffer: only the first chunk contains interesting data (bank), the remaining is zero filling */
|
|
|
|
memset(card_data, 0, sizeof card_data);
|
2007-07-25 06:15:07 +00:00
|
|
|
continue;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return -EC_FIFO_SEL_BANK_EMPTY;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
if (!sd_poll_status(STAT_PRG_DONE, 10000))
|
2007-07-25 06:15:07 +00:00
|
|
|
return -EC_FIFO_SEL_BANK_DONE;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
currcard->current_bank = bank;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return 0;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
static void sd_card_mux(int card_no)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
/* Set the current card mux */
|
2009-03-14 02:47:14 +00:00
|
|
|
#if defined(SANSA_E200)
|
2007-06-30 02:08:27 +00:00
|
|
|
if (card_no == 0)
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL |= 0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL &= ~0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
|
|
|
|
GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
|
|
|
|
}
|
2009-03-14 02:47:14 +00:00
|
|
|
#elif defined(SANSA_C200)
|
2007-09-06 03:28:58 +00:00
|
|
|
if (card_no == 0)
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL |= 0x4;
|
2007-09-06 03:28:58 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
|
|
|
|
GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
|
2007-09-06 03:28:58 +00:00
|
|
|
|
|
|
|
outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2007-11-05 16:12:13 +00:00
|
|
|
GPO32_VAL &= ~0x4;
|
2007-09-06 03:28:58 +00:00
|
|
|
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
|
|
|
|
GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
|
2007-09-06 03:28:58 +00:00
|
|
|
|
|
|
|
outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
|
|
|
|
}
|
2009-03-14 02:47:14 +00:00
|
|
|
#elif defined(PHILIPS_SA9200)
|
|
|
|
/* only 1 "card" (no external memory card) */
|
|
|
|
(void)card_no;
|
|
|
|
|
|
|
|
GPIO_SET_BITWISE(GPIOH_ENABLE, 0x80);
|
|
|
|
GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 0x80);
|
|
|
|
|
|
|
|
outl(0x255aa, 0x70000014);
|
|
|
|
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x04);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x04);
|
|
|
|
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
|
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
|
|
|
|
|
|
|
|
GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, 0x80);
|
|
|
|
GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 0x80);
|
2007-09-06 03:28:58 +00:00
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sd_init_device(int card_no)
|
|
|
|
{
|
|
|
|
/* SD Protocol registers */
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2009-07-01 10:07:22 +00:00
|
|
|
unsigned long response = 0;
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
unsigned int i;
|
|
|
|
unsigned char carddata[512];
|
|
|
|
unsigned char *dataptr;
|
2009-07-01 21:49:13 +00:00
|
|
|
unsigned long temp_reg[4];
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Enable and initialise controller */
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_CLKRT = 6; /* switch to lowest clock rate */
|
2007-07-25 06:15:07 +00:00
|
|
|
|
|
|
|
/* Initialise card data as blank */
|
|
|
|
memset(currcard, 0, sizeof(*currcard));
|
|
|
|
|
|
|
|
/* Switch card mux to card to initialize */
|
|
|
|
sd_card_mux(card_no);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
/* Init NAND */
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_INIT_1 |= (1 << 15);
|
|
|
|
MMC_INIT_2 |= (1 << 15);
|
|
|
|
MMC_INIT_2 &= ~(3 << 12);
|
|
|
|
MMC_INIT_2 |= (1 << 13);
|
|
|
|
MMC_INIT_1 &= ~(3 << 12);
|
|
|
|
MMC_INIT_1 |= (1 << 13);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
DEV_EN |= DEV_ATA; /* Enable controller */
|
|
|
|
DEV_RS |= DEV_ATA; /* Reset controller */
|
|
|
|
DEV_RS &=~DEV_ATA; /* Clear Reset */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_SD_STATE = SD_TRAN;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_I_MASK = 0xf; /* disable interrupts */
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_GO_IDLE_STATE, 0, NULL, 0x100);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
check_time[EC_POWER_UP] = USEC_TIMER;
|
2007-10-08 20:39:46 +00:00
|
|
|
|
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Check for SDHC:
|
2008-11-09 23:40:21 +00:00
|
|
|
- non-SDHC cards simply ignore SD_SEND_IF_COND (CMD8) and we get error -219,
|
2007-08-22 00:32:45 +00:00
|
|
|
which we can just ignore and assume we're dealing with standard SD.
|
|
|
|
- SDHC cards echo back the argument into the response. This is how we
|
|
|
|
tell if the card is SDHC.
|
|
|
|
*/
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_SEND_IF_COND,0x1aa, &response,
|
|
|
|
CMDAT_DATA_EN | CMDAT_RES_TYPE3);
|
2007-08-22 00:32:45 +00:00
|
|
|
if ( (ret < 0) && (ret!=-219) )
|
|
|
|
goto card_init_error;
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
while ((currcard->ocr & (1 << 31)) == 0) /* until card is powered up */
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_APP_CMD, currcard->rca, NULL, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(response == 0x1aa)
|
|
|
|
{
|
|
|
|
/* SDHC */
|
|
|
|
ret = sd_command(SD_APP_OP_COND, (1<<30)|0x100000,
|
2009-02-01 09:08:12 +00:00
|
|
|
&currcard->ocr, CMDAT_RES_TYPE3);
|
2007-10-08 20:39:46 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif /* HAVE_HOTSWAP */
|
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
/* SD Standard */
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_APP_OP_COND, 0x100000, &currcard->ocr,
|
|
|
|
CMDAT_RES_TYPE3);
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (!sd_check_timeout(5000000, EC_POWER_UP))
|
|
|
|
{
|
|
|
|
ret = -EC_POWER_UP;
|
|
|
|
goto card_init_error;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
|
2009-07-01 21:49:13 +00:00
|
|
|
ret = sd_command(SD_ALL_SEND_CID, 0, temp_reg, CMDAT_RES_TYPE2);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-07-01 21:49:13 +00:00
|
|
|
for(i=0; i<4; i++)
|
|
|
|
currcard->cid[i] = temp_reg[3-i];
|
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_SEND_RELATIVE_ADDR, 0, &currcard->rca, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-07-01 21:49:13 +00:00
|
|
|
ret = sd_command(SD_SEND_CSD, currcard->rca, temp_reg, CMDAT_RES_TYPE2);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2009-07-01 21:49:13 +00:00
|
|
|
for(i=0; i<4; i++)
|
|
|
|
currcard->csd[i] = temp_reg[3-i];
|
|
|
|
|
|
|
|
sd_parse_csd(currcard);
|
2007-08-22 00:32:45 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_CLKRT = 0; /* switch to highest clock rate */
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_SELECT_CARD, currcard->rca, NULL,
|
|
|
|
0x80 | CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_APP_CMD, currcard->rca, NULL, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_SET_BUS_WIDTH, currcard->rca | 2, NULL,
|
|
|
|
CMDAT_RES_TYPE1); /* 4 bit */
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-07-01 10:07:22 +00:00
|
|
|
ret = sd_command(SD_SET_BLOCKLEN, currcard->blocksize, NULL,
|
2009-02-01 09:08:12 +00:00
|
|
|
CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2009-07-01 10:07:22 +00:00
|
|
|
MMC_BLKLEN = currcard->blocksize;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* If this card is >4GB & not SDHC, then we need to enable bank switching */
|
|
|
|
if( (currcard->numblocks >= BLOCKS_PER_BANK) &&
|
|
|
|
((currcard->ocr & (1<<30)) == 0) )
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_SD_STATE = SD_TRAN;
|
|
|
|
MMC_NUMBLK = 1;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_SWITCH_FUNC, 0x80ffffef, NULL,
|
|
|
|
0x1c00 | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2007-07-12 06:50:42 +00:00
|
|
|
goto card_init_error;
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* Read 512 bytes from the card.
|
|
|
|
The first 512 bits contain the status information
|
|
|
|
TODO: Do something useful with this! */
|
|
|
|
dataptr = carddata;
|
2009-07-01 21:49:13 +00:00
|
|
|
for (i = 0; i < SD_BLOCK_SIZE/2; i += FIFO_LEN)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
|
|
|
/* Wait for the FIFO to be full */
|
2009-02-01 09:08:12 +00:00
|
|
|
if (sd_poll_status(STAT_RECV_FIFO_FULL, 100000))
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
|
|
|
copy_read_sectors_slow(&dataptr);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = -EC_FIFO_ENA_BANK_EMPTY;
|
|
|
|
goto card_init_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-12 06:50:42 +00:00
|
|
|
currcard->initialized = 1;
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Card failed to initialize so disable it */
|
|
|
|
card_init_error:
|
2007-07-25 06:15:07 +00:00
|
|
|
currcard->initialized = ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* lock must already be aquired */
|
|
|
|
static void sd_select_device(int card_no)
|
|
|
|
{
|
|
|
|
currcard = &card_info[card_no];
|
|
|
|
|
|
|
|
if (card_no == 0)
|
|
|
|
{
|
|
|
|
/* Main card always gets a chance */
|
|
|
|
sd_status[0].retry = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (currcard->initialized > 0)
|
|
|
|
{
|
|
|
|
/* This card is already initialized - switch to it */
|
|
|
|
sd_card_mux(card_no);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (currcard->initialized == 0)
|
|
|
|
{
|
|
|
|
/* Card needs (re)init */
|
|
|
|
sd_init_device(card_no);
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* API Functions */
|
2006-08-01 22:28:14 +00:00
|
|
|
|
2013-08-17 16:18:22 +00:00
|
|
|
int sd_read_sectors(IF_MD(int drive,) unsigned long start, int incount,
|
2006-08-01 22:28:14 +00:00
|
|
|
void* inbuf)
|
|
|
|
{
|
2009-07-17 22:28:49 +00:00
|
|
|
#ifndef HAVE_MULTIDRIVE
|
2007-10-08 20:39:46 +00:00
|
|
|
const int drive = 0;
|
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret;
|
2007-06-30 02:08:27 +00:00
|
|
|
unsigned char *buf, *buf_end;
|
2009-07-01 10:07:22 +00:00
|
|
|
unsigned int bank;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2006-11-21 22:55:39 +00:00
|
|
|
/* TODO: Add DMA support. */
|
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
2017-03-15 05:51:54 +00:00
|
|
|
enable_controller(true);
|
2009-07-06 16:44:57 +00:00
|
|
|
led(true);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
sd_read_retry:
|
2007-11-06 07:21:08 +00:00
|
|
|
if (drive != 0 && !card_detect_target())
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* no external sd-card inserted */
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_NOCARD;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
sd_select_device(drive);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
{
|
|
|
|
ret = currcard->initialized;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
last_disk_activity = current_tick;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Only switch banks with non-SDHC cards */
|
|
|
|
if((currcard->ocr & (1<<30))==0)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
bank = start / BLOCKS_PER_BANK;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
if (currcard->current_bank != bank)
|
|
|
|
{
|
|
|
|
ret = sd_select_bank(bank);
|
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
start -= bank * BLOCKS_PER_BANK;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2008-11-09 23:40:21 +00:00
|
|
|
ret = sd_wait_for_state(SD_TRAN, EC_TRAN_READ_ENTRY);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_NUMBLK = incount;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(currcard->ocr & (1<<30) )
|
|
|
|
{
|
|
|
|
/* SDHC */
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_READ_MULTIPLE_BLOCK, start, NULL,
|
|
|
|
0x1c00 | CMDAT_BUSY | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
|
|
|
else
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
{
|
2009-07-01 21:49:13 +00:00
|
|
|
ret = sd_command(SD_READ_MULTIPLE_BLOCK, start * SD_BLOCK_SIZE, NULL,
|
2009-02-01 09:08:12 +00:00
|
|
|
0x1c00 | CMDAT_BUSY | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-07-01 21:49:13 +00:00
|
|
|
/* TODO: Don't assume SD_BLOCK_SIZE == SECTOR_SIZE */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2009-07-01 10:07:22 +00:00
|
|
|
buf_end = (unsigned char *)inbuf + incount * currcard->blocksize;
|
2007-06-30 02:08:27 +00:00
|
|
|
for (buf = inbuf; buf < buf_end;)
|
|
|
|
{
|
|
|
|
/* Wait for the FIFO to be full */
|
2009-02-01 09:08:12 +00:00
|
|
|
if (sd_poll_status(STAT_RECV_FIFO_FULL, 0x80000))
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
|
|
|
copy_read_sectors_fast(&buf); /* Copy one chunk of 16 words */
|
|
|
|
/* TODO: Switch bank if necessary */
|
|
|
|
continue;
|
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_FIFO_READ_FULL;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
last_disk_activity = current_tick;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_STOP_TRANSMISSION, 0, NULL, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-11-09 23:40:21 +00:00
|
|
|
ret = sd_wait_for_state(SD_TRAN, EC_TRAN_READ_EXIT);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
while (1)
|
|
|
|
{
|
2009-07-06 16:44:57 +00:00
|
|
|
led(false);
|
2017-03-15 05:51:54 +00:00
|
|
|
enable_controller(false);
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return ret;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
sd_read_error:
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_status[drive].retry < sd_status[drive].retry_max
|
|
|
|
&& ret != -EC_NOCARD)
|
|
|
|
{
|
|
|
|
sd_status[drive].retry++;
|
|
|
|
currcard->initialized = 0;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_read_retry;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2013-08-17 16:18:22 +00:00
|
|
|
int sd_write_sectors(IF_MD(int drive,) unsigned long start, int count,
|
2007-06-30 02:08:27 +00:00
|
|
|
const void* outbuf)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2006-11-21 22:55:39 +00:00
|
|
|
/* Write support is not finished yet */
|
2007-06-30 02:08:27 +00:00
|
|
|
/* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
|
2006-11-21 22:55:39 +00:00
|
|
|
to improve performance */
|
2009-07-17 22:28:49 +00:00
|
|
|
#ifndef HAVE_MULTIDRIVE
|
2007-10-08 20:39:46 +00:00
|
|
|
const int drive = 0;
|
|
|
|
#endif
|
2007-07-25 06:15:07 +00:00
|
|
|
int ret;
|
|
|
|
const unsigned char *buf, *buf_end;
|
2009-07-01 10:07:22 +00:00
|
|
|
unsigned int bank;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
2017-03-15 05:51:54 +00:00
|
|
|
enable_controller(true);
|
2009-07-06 16:44:57 +00:00
|
|
|
led(true);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
sd_write_retry:
|
2007-11-06 07:21:08 +00:00
|
|
|
if (drive != 0 && !card_detect_target())
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-06-30 02:08:27 +00:00
|
|
|
/* no external sd-card inserted */
|
2007-07-25 06:15:07 +00:00
|
|
|
ret = -EC_NOCARD;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
sd_select_device(drive);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
{
|
|
|
|
ret = currcard->initialized;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
}
|
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
/* Only switch banks with non-SDHC cards */
|
|
|
|
if((currcard->ocr & (1<<30))==0)
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2007-08-22 00:32:45 +00:00
|
|
|
bank = start / BLOCKS_PER_BANK;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-08-22 00:32:45 +00:00
|
|
|
if (currcard->current_bank != bank)
|
|
|
|
{
|
|
|
|
ret = sd_select_bank(bank);
|
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
start -= bank * BLOCKS_PER_BANK;
|
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
check_time[EC_WRITE_TIMEOUT] = USEC_TIMER;
|
2007-07-25 06:15:07 +00:00
|
|
|
|
2008-11-09 23:40:21 +00:00
|
|
|
ret = sd_wait_for_state(SD_TRAN, EC_TRAN_WRITE_ENTRY);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
MMC_NUMBLK = count;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-08-22 00:32:45 +00:00
|
|
|
if(currcard->ocr & (1<<30) )
|
|
|
|
{
|
|
|
|
/* SDHC */
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_WRITE_MULTIPLE_BLOCK, start, NULL,
|
2009-02-03 20:21:02 +00:00
|
|
|
CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
|
|
|
else
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2007-08-22 00:32:45 +00:00
|
|
|
{
|
2009-07-01 21:49:13 +00:00
|
|
|
ret = sd_command(SD_WRITE_MULTIPLE_BLOCK, start*SD_BLOCK_SIZE, NULL,
|
2009-02-03 20:21:02 +00:00
|
|
|
CMDAT_WR_RD | CMDAT_DATA_EN | CMDAT_RES_TYPE1);
|
2007-08-22 00:32:45 +00:00
|
|
|
}
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2009-07-01 10:07:22 +00:00
|
|
|
buf_end = outbuf + count * currcard->blocksize - 2*FIFO_LEN;
|
2007-07-25 06:15:07 +00:00
|
|
|
|
|
|
|
for (buf = outbuf; buf <= buf_end;)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2007-07-25 06:15:07 +00:00
|
|
|
if (buf == buf_end)
|
2006-11-21 22:55:39 +00:00
|
|
|
{
|
2009-02-01 09:08:12 +00:00
|
|
|
/* Set MMC_SD_STATE to SD_PRG for the last buffer fill */
|
|
|
|
MMC_SD_STATE = SD_PRG;
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
|
2009-02-03 20:21:02 +00:00
|
|
|
copy_write_sectors(&buf); /* Copy one chunk of 16 words */
|
|
|
|
/* TODO: Switch bank if necessary */
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* Wait for the FIFO to empty */
|
2009-02-03 20:21:02 +00:00
|
|
|
if (!sd_poll_status(STAT_XMIT_FIFO_EMPTY, 0x80000))
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
2009-02-03 20:21:02 +00:00
|
|
|
ret = -EC_FIFO_WR_EMPTY;
|
|
|
|
goto sd_write_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2006-11-21 22:55:39 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
last_disk_activity = current_tick;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
if (!sd_poll_status(STAT_PRG_DONE, 0x80000))
|
2007-07-25 06:15:07 +00:00
|
|
|
{
|
|
|
|
ret = -EC_FIFO_WR_DONE;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2009-02-01 09:08:12 +00:00
|
|
|
ret = sd_command(SD_STOP_TRANSMISSION, 0, NULL, CMDAT_RES_TYPE1);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2008-11-09 23:40:21 +00:00
|
|
|
ret = sd_wait_for_state(SD_TRAN, EC_TRAN_WRITE_EXIT);
|
2007-07-25 06:15:07 +00:00
|
|
|
if (ret < 0)
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_error;
|
2006-11-21 22:55:39 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
while (1)
|
|
|
|
{
|
2009-07-06 16:44:57 +00:00
|
|
|
led(false);
|
2017-03-15 05:51:54 +00:00
|
|
|
enable_controller(false);
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2007-07-25 06:15:07 +00:00
|
|
|
return ret;
|
2007-04-23 23:26:23 +00:00
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
sd_write_error:
|
2007-07-25 06:15:07 +00:00
|
|
|
if (sd_status[drive].retry < sd_status[drive].retry_max
|
|
|
|
&& ret != -EC_NOCARD)
|
|
|
|
{
|
|
|
|
sd_status[drive].retry++;
|
|
|
|
currcard->initialized = 0;
|
2008-11-01 16:14:28 +00:00
|
|
|
goto sd_write_retry;
|
2007-07-25 06:15:07 +00:00
|
|
|
}
|
|
|
|
}
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
void sd_enable(bool on)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2017-03-15 05:51:54 +00:00
|
|
|
mutex_lock(&sd_mtx);
|
|
|
|
enable_controller(on);
|
|
|
|
mutex_unlock(&sd_mtx);
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
|
|
|
|
2008-11-01 16:14:28 +00:00
|
|
|
int sd_init(void)
|
2006-08-01 22:28:14 +00:00
|
|
|
{
|
2007-07-12 06:50:42 +00:00
|
|
|
int ret = 0;
|
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
mutex_init(&sd_mtx);
|
2008-01-18 12:32:03 +00:00
|
|
|
|
2009-07-06 16:44:57 +00:00
|
|
|
led(false);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
/* init controller */
|
2009-03-14 02:47:14 +00:00
|
|
|
#if defined(PHILIPS_SA9200)
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIOA_ENABLE = 0x00;
|
|
|
|
GPIO_SET_BITWISE(GPIOD_ENABLE, 0x01);
|
2009-03-14 02:47:14 +00:00
|
|
|
#else
|
2017-03-15 05:51:54 +00:00
|
|
|
outl(inl(0x70000088) & ~(0x4), 0x70000088);
|
|
|
|
outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
|
|
|
|
GPO32_ENABLE |= 0x4;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOG_ENABLE, (0x3 << 5));
|
|
|
|
GPIO_SET_BITWISE(GPIOG_OUTPUT_EN, (0x3 << 5));
|
|
|
|
GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, (0x3 << 5));
|
2009-03-14 02:47:14 +00:00
|
|
|
#endif
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2017-03-15 05:51:54 +00:00
|
|
|
/* enable card detection port - mask interrupt first */
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x80);
|
|
|
|
GPIO_SET_BITWISE(GPIOA_ENABLE, 0x80);
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_OUTPUT_EN, 0x08);
|
|
|
|
GPIO_SET_BITWISE(GPIOL_ENABLE, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
#endif
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2017-03-15 05:51:54 +00:00
|
|
|
sd_select_device(0);
|
2007-07-12 06:50:42 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
if (currcard->initialized < 0)
|
|
|
|
ret = currcard->initialized;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
/* enable interupt for the mSD card */
|
|
|
|
sleep(HZ/10);
|
2007-10-08 20:39:46 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2017-03-15 05:51:54 +00:00
|
|
|
CPU_INT_EN = HI_MASK;
|
|
|
|
CPU_HI_INT_EN = GPIO0_MASK;
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIOA_INT_CLR = 0x80;
|
2010-06-06 13:20:47 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
/* enable the card detect interrupt */
|
|
|
|
GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
2017-03-15 05:51:54 +00:00
|
|
|
CPU_INT_EN = HI_MASK;
|
|
|
|
CPU_HI_INT_EN = GPIO2_MASK;
|
2007-11-04 13:22:17 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
|
2017-03-15 05:51:54 +00:00
|
|
|
GPIOL_INT_CLR = 0x08;
|
|
|
|
|
|
|
|
/* enable the card detect interrupt */
|
|
|
|
GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif
|
2017-03-15 05:51:54 +00:00
|
|
|
#endif /* HAVE_HOTSWAP */
|
2006-11-25 13:04:50 +00:00
|
|
|
|
2008-01-18 13:12:33 +00:00
|
|
|
mutex_unlock(&sd_mtx);
|
2008-01-18 12:32:03 +00:00
|
|
|
|
2007-07-12 06:50:42 +00:00
|
|
|
return ret;
|
2006-08-01 22:28:14 +00:00
|
|
|
}
|
2007-06-30 02:08:27 +00:00
|
|
|
|
|
|
|
tCardInfo *card_get_info_target(int card_no)
|
|
|
|
{
|
2009-07-01 21:49:13 +00:00
|
|
|
return &card_info[card_no];
|
2007-06-30 02:08:27 +00:00
|
|
|
}
|
2017-03-15 05:51:54 +00:00
|
|
|
|
2008-05-13 02:50:31 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2009-01-21 02:44:20 +00:00
|
|
|
static int sd1_oneshot_callback(struct timeout *tmo)
|
2007-07-29 04:49:19 +00:00
|
|
|
{
|
2008-03-09 14:49:10 +00:00
|
|
|
/* This is called only if the state was stable for 300ms - check state
|
|
|
|
* and post appropriate event. */
|
2017-03-15 05:51:54 +00:00
|
|
|
queue_broadcast(card_detect_target() ? SYS_HOTSWAP_INSERTED :
|
|
|
|
SYS_HOTSWAP_EXTRACTED,
|
|
|
|
sd_first_drive+1);
|
2009-01-21 02:44:20 +00:00
|
|
|
return 0;
|
2017-03-15 05:51:54 +00:00
|
|
|
(void)tmo;
|
2007-07-29 04:49:19 +00:00
|
|
|
}
|
|
|
|
|
2007-06-30 02:08:27 +00:00
|
|
|
/* called on insertion/removal interrupt */
|
|
|
|
void microsd_int(void)
|
|
|
|
{
|
2007-07-29 04:49:19 +00:00
|
|
|
static struct timeout sd1_oneshot;
|
|
|
|
|
2007-11-04 13:22:17 +00:00
|
|
|
#ifdef SANSA_E200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
|
|
|
|
GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
|
2007-07-25 06:15:07 +00:00
|
|
|
GPIOA_INT_CLR = 0x80;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
|
2007-06-30 02:08:27 +00:00
|
|
|
|
2007-11-04 13:22:17 +00:00
|
|
|
#elif defined SANSA_C200
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
|
|
|
|
GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
GPIOL_INT_CLR = 0x08;
|
2008-03-09 14:49:10 +00:00
|
|
|
GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
|
2007-11-04 13:22:17 +00:00
|
|
|
#endif
|
2008-03-09 14:49:10 +00:00
|
|
|
timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
|
2007-06-30 02:08:27 +00:00
|
|
|
}
|
2007-10-08 20:39:46 +00:00
|
|
|
#endif /* HAVE_HOTSWAP */
|
2008-11-01 16:14:28 +00:00
|
|
|
|
|
|
|
long sd_last_disk_activity(void)
|
|
|
|
{
|
|
|
|
return last_disk_activity;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef HAVE_HOTSWAP
|
2009-07-17 22:28:49 +00:00
|
|
|
bool sd_removable(IF_MD_NONVOID(int drive))
|
2008-11-01 16:14:28 +00:00
|
|
|
{
|
2009-07-17 22:28:49 +00:00
|
|
|
#ifndef HAVE_MULTIDRIVE
|
2008-11-01 16:14:28 +00:00
|
|
|
const int drive=0;
|
|
|
|
#endif
|
|
|
|
return (drive==1);
|
|
|
|
}
|
|
|
|
|
2009-07-17 22:28:49 +00:00
|
|
|
bool sd_present(IF_MD_NONVOID(int drive))
|
2008-11-01 16:14:28 +00:00
|
|
|
{
|
2009-07-17 22:28:49 +00:00
|
|
|
#ifndef HAVE_MULTIDRIVE
|
2008-11-01 16:14:28 +00:00
|
|
|
const int drive=0;
|
|
|
|
#endif
|
2009-07-20 13:47:21 +00:00
|
|
|
if(drive==0)
|
|
|
|
{
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return card_detect_target();
|
|
|
|
}
|
2008-11-01 16:14:28 +00:00
|
|
|
}
|
|
|
|
#endif
|
2009-07-17 22:28:49 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_STORAGE_MULTI
|
|
|
|
int sd_num_drives(int first_drive)
|
|
|
|
{
|
2009-07-20 19:46:36 +00:00
|
|
|
#ifdef HAVE_HOTSWAP
|
2009-07-20 13:23:28 +00:00
|
|
|
/* Store which logical drive number(s) we have been assigned */
|
|
|
|
sd_first_drive = first_drive;
|
2009-07-20 19:46:36 +00:00
|
|
|
#else
|
|
|
|
(void)first_drive;
|
|
|
|
#endif
|
2009-07-17 22:28:49 +00:00
|
|
|
|
|
|
|
#ifdef HAVE_MULTIDRIVE
|
|
|
|
return 2;
|
|
|
|
#else
|
|
|
|
return 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif
|
2017-03-15 05:51:54 +00:00
|
|
|
|
|
|
|
int sd_event(long id, intptr_t data)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
switch (id)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
|
|
case SYS_HOTSWAP_INSERTED:
|
|
|
|
case SYS_HOTSWAP_EXTRACTED:
|
|
|
|
mutex_lock(&sd_mtx); /* lock-out card activity */
|
|
|
|
|
|
|
|
/* Force card init for new card, re-init for re-inserted one or
|
|
|
|
* clear if the last attempt to init failed with an error. */
|
|
|
|
card_info[data].initialized = 0;
|
|
|
|
sd_status[data].retry = 0;
|
|
|
|
|
|
|
|
/* Access is now safe */
|
|
|
|
mutex_unlock(&sd_mtx);
|
|
|
|
break;
|
|
|
|
#endif /* HAVE_HOTSWAP */
|
|
|
|
|
|
|
|
case Q_STORAGE_TICK:
|
|
|
|
/* never let a timer wrap confuse us */
|
|
|
|
next_yield = USEC_TIMER;
|
|
|
|
default:
|
|
|
|
rc = storage_event_default_handler(id, data, last_disk_activity,
|
|
|
|
STORAGE_SD);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|