2007-10-02 08:15:47 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2005 by Dave Chapman
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef _WM8721_H
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#define _WM8721_H
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/* volume/balance/treble/bass interdependency */
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#define VOLUME_MIN -730
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#define VOLUME_MAX 60
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extern int tenthdb2master(int db);
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extern int tenthdb2mixer(int db);
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extern void audiohw_reset(void);
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extern void audiohw_enable_output(bool enable);
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extern int audiohw_set_master_vol(int vol_l, int vol_r);
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extern void audiohw_set_nsorder(int order);
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extern void audiohw_set_sample_rate(int sampling_control);
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/* Register addresses and bits */
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#define LOUTVOL 0x02
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#define LOUTVOL_LHPVOL_MASK 0x7f
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#define LOUTVOL_LZCEN (1 << 7)
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#define LOUTVOL_LRHPBOTH (1 << 8)
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#define ROUTVOL 0x03
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#define ROUTVOL_RHPVOL_MASK 0x7f
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#define ROUTVOL_RZCEN (1 << 7)
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#define ROUTVOL_RLHPBOTH (1 << 8)
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#define AAPCTRL 0x04 /* Analog audio path control */
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#define AAPCTRL_DACSEL (1 << 4)
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#define DAPCTRL 0x05 /* Digital audio path control */
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#define DAPCTRL_DEEMP_DISABLE (0 << 2)
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#define DAPCTRL_DEEMP_32KHz (1 << 2)
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#define DAPCTRL_DEEMP_44KHz (2 << 2)
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#define DAPCTRL_DEEMP_48KHz (3 << 2)
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#define DAPCTRL_DEEMP_MASK (3 << 2)
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#define DAPCTRL_DACMU (1 << 3)
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#define PDCTRL 0x06
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#define PDCTRL_DACPD (1 << 3)
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#define PDCTRL_OUTPD (1 << 4)
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#define PDCTRL_POWEROFF (1 << 7)
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#define AINTFCE 0x07
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2007-10-02 08:30:30 +00:00
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#define AINTFCE_FORMAT_MSB_RJUST (0 << 0)
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#define AINTFCE_FORMAT_MSB_LJUST (1 << 0)
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#define AINTFCE_FORMAT_I2S (2 << 0)
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#define AINTFCE_FORMAT_DSP (3 << 0)
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#define AINTFCE_FORMAT_MASK (3 << 0)
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#define AINTFCE_IWL_16BIT (0 << 2)
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#define AINTFCE_IWL_20BIT (1 << 2)
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#define AINTFCE_IWL_24BIT (2 << 2)
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#define AINTFCE_IWL_32BIT (3 << 2)
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#define AINTFCE_IWL_MASK (3 << 2)
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#define AINTFCE_LRP_I2S_RLO (0 << 4)
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#define AINTFCE_LRP_I2S_RHI (1 << 4)
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#define AINTFCE_DSP_MODE_A (0 << 4)
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#define AINTFCE_DSP_MODE_B (1 << 4)
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#define AINTFCE_LRSWAP (1 << 5)
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#define AINTFCE_MS (1 << 6)
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#define AINTFCE_BCLKINV (1 << 7)
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2007-10-02 08:15:47 +00:00
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#define SAMPCTRL 0x08
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#define SAMPCTRL_USB (1 << 0)
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#define SAMPCTRL_BOSR_NOR_256fs (0 << 1)
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#define SAMPCTRL_BOSR_NOR_384fs (1 << 1)
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#define SAMPCTRL_BOSR_USB_250fs (0 << 1)
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#define SAMPCTRL_BOSR_USB_272fs (1 << 1)
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/* Bits 2-5:
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2007-10-02 08:30:30 +00:00
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* Sample rate setting are device-specific. See WM8721 datasheet
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2007-10-02 08:15:47 +00:00
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* for proper settings for the device's clocking */
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#define SAMPCTRL_SR_MASK (0xf << 2)
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#define SAMPCTRL_CLKIDIV2 (1 << 6)
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#define ACTIVECTRL 0x09
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#define ACTIVECTRL_ACTIVE (1 << 0)
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#define RESET 0x0f
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#define RESET_RESET 0x0
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/* SAMPCTRL values for the supported samplerates (24MHz MCLK/USB): */
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#define WM8721_USB24_8000HZ 0x4d
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#define WM8721_USB24_32000HZ 0x59
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#define WM8721_USB24_44100HZ 0x63
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#define WM8721_USB24_48000HZ 0x41
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#define WM8721_USB24_88200HZ 0x7f
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#define WM8721_USB24_96000HZ 0x5d
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#endif /* _WM8721_H */
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