128 lines
3.3 KiB
C
128 lines
3.3 KiB
C
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2014 by Cástor Muñoz
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/* Include Standard files */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "s5l8702.h"
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#include "uc8702.h"
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#include "uart-s5l8702.h"
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/* s5l8702 UART configuration */
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struct uartc s5l8702_uart = {
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.baddr = S5L8702_UART_BASE
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};
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/*
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* Device level functions specific to S5L8702
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*/
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void uart_gpio_control(int port_id, bool onoff)
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{
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if (onoff) {
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switch (port_id) {
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case 0:
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/* configure UART0 Tx/Rx GPIO ports */
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PCON0 = (PCON0 & 0xff00ffff) | 0x00220000;
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break;
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case 1:
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/* configure UART1 GPIO ports, including RTS/CTS signals */
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PCOND = (PCOND & 0xff0000ff) | 0x00222200;
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break;
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case 2:
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case 3:
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/* unknown, probably UART3/4 not routed on s5l8702 */
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default:
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break;
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}
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}
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else {
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/* configure minimal power consumption */
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switch (port_id) {
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case 0:
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PCON0 = (PCON0 & 0xff00ffff) | 0x00ee0000;
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break;
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case 1:
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PCOND = (PCOND & 0xff0000ff) | 0x00eeee00;
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break;
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case 2:
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case 3:
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default:
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break;
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}
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}
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}
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/* reset s5l8702 uart related hardware */
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static void s5l8702_uart_hw_init(void)
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{
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for (int id = 0; id < S5L8702_UART_PORT_MAX; id++) {
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VIC0INTENCLEAR = 1 << IRQ_UART(id); /* mask INT */
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uart_gpio_control(id, 0);
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}
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}
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void uart_init(void)
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{
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s5l8702_uart_hw_init();
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PWRCON(1) &= ~(1 << (CLOCKGATE_UART - 32)); /* on */
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uartc_open(&s5l8702_uart);
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}
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void uart_close(void)
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{
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uartc_close(&s5l8702_uart);
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PWRCON(1) |= (1 << (CLOCKGATE_UART - 32)); /* off */
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s5l8702_uart_hw_init();
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}
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void uart_port_init(struct uartc_port *port)
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{
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uart_gpio_control(port->id, 1);
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uartc_port_open(port);
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VIC0INTENABLE = 1 << IRQ_UART(port->id); /* unmask INT */
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}
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void uart_port_close(struct uartc_port *port)
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{
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VIC0INTENCLEAR = 1 << IRQ_UART(port->id); /* mask INT */
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uartc_port_close(port);
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uart_gpio_control(port->id, 0);
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}
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/* ISRs */
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void ICODE_ATTR INT_UART0(void)
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{
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uartc_callback(&s5l8702_uart, 0);
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}
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void ICODE_ATTR INT_UART1(void)
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{
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uartc_callback(&s5l8702_uart, 1);
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}
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