054447f9e6
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16259 a1c6a512-1295-4272-9138-f99709370657
151 lines
4.2 KiB
C
151 lines
4.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Driver for pcf50605 PMU and RTC
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*
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* Based on code from the ipodlinux project - http://ipodlinux.org/
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* Adapted for Rockbox in December 2005
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*
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* Original file: linux/arch/armnommu/mach-ipod/pcf50605.c
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*
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* Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org)
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "config.h"
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#if CONFIG_I2C == I2C_PP5020 || CONFIG_I2C == I2C_PP5002
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#include "i2c-pp.h"
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#endif
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#include "rtc.h"
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#define OOCS 0x01
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#define INT1 0x02
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#define INT2 0x03
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#define INT3 0x04
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#define INT1M 0x05
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#define INT2M 0x06
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#define INT3M 0x07
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#define OOCC1 0x08
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#define GOSTDBY 0x1
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#define TOTRST (0x1 << 1)
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#define CLK32ON (0x1 << 2)
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#define WDTRST (0x1 << 3)
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#define RTCWAK (0x1 << 4)
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#define CHGWAK (0x1 << 5)
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#define EXTONWAK (0x01 << 6)
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#define OOCC2 0x09
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#define RTCSC 0x0a
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#define RTCMN 0x0b
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#define RTCHR 0x0c
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#define RTCWD 0x0d
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#define RTCDT 0x0e
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#define RTCMT 0x0f
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#define RTCYR 0x10
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#define RTCSCA 0x11
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#define RTCMNA 0x12
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#define RTCHRA 0x13
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#define RTCWDA 0x14
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#define RTCDTA 0x15
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#define RTCMTA 0x16
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#define RTCYRA 0x17
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#define PSSC 0x18
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#define PWROKM 0x19
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#define PWROKS 0x1a
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#define DCDC1 0x1b
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#define DCDC2 0x1c
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#define DCDC3 0x1d
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#define DCDC4 0x1e
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#define DCDEC1 0x1f
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#define DCDEC2 0x20
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#define DCUDC1 0x21
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#define DCUDC2 0x22
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#define IOREGC 0x23
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#define D1REGC1 0x24
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#define D2REGC1 0x25
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#define D3REGC1 0x26
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#define LPREG1C 0x27
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unsigned char pcf50605_wakeup_flags = 0;
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int pcf50605_read(int address)
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{
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return i2c_readbyte(0x8,address);
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}
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int pcf50605_read_multiple(int address, unsigned char* buf, int count)
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{
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int read = i2c_readbytes(0x08, address, count, buf);
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return read - count;
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}
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int pcf50605_write(int address, unsigned char val)
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{
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pp_i2c_send(0x8, address, val);
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return 0;
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}
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int pcf50605_write_multiple(int address, const unsigned char* buf, int count)
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{
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int i;
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i2c_lock();
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for (i = 0; i < count; i++)
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pp_i2c_send(0x8, address + i, buf[i]);
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i2c_unlock();
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return 0;
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}
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/* The following command puts the iPod into a deep sleep. Warning
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from the good people of ipodlinux - never issue this command
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without setting CHGWAK or EXTONWAK if you ever want to be able to
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power on your iPod again. */
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void pcf50605_standby_mode(void)
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{
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pcf50605_write(OOCC1, GOSTDBY | CHGWAK | EXTONWAK | pcf50605_wakeup_flags);
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}
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void pcf50605_init(void)
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{
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#if defined (IPOD_VIDEO)
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/* I/O and GPO voltage supply (default: 0xf8 = 3.3V ON) */
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/* ECO not allowed regarding data sheet */
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pcf50605_write(IOREGC, 0xf8); /* 3.3V ON */
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/* core voltage supply (default DCDC1/DCDC2: 0xec = 1.2V ON) */
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/* ECO not stable, assumed due to less precision of voltage in ECO mode */
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pcf50605_write(DCDC1, 0xec); /* 1.2V ON */
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pcf50605_write(DCDC2, 0x0c); /* OFF */
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/* unknown (default: 0xe3 = 1.8V ON) */
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pcf50605_write(DCUDC1, 0xe3); /* 1.8V ON */
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/* WM8758 voltage supply (default: 0xf5 = 3.0V ON) */
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/* ECO not allowed as max. current of 5mA is not sufficient */
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pcf50605_write(D1REGC1, 0xf0); /* 2.5V ON */
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/* LCD voltage supply (default: 0xf5 = 3.0V ON) */
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pcf50605_write(D3REGC1, 0xf1); /* 2.6V ON */
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#else
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/* keep initialization from svn for other iPods */
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pcf50605_write(D1REGC1, 0xf5); /* 3.0V ON */
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pcf50605_write(D3REGC1, 0xf5); /* 3.0V ON */
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#endif
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/* Dock Connector pin 17 (default: OFF) */
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pcf50605_write(D2REGC1, 0xf8); /* 3.3V ON */
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}
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