094e62a528
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31473 a1c6a512-1295-4272-9138-f99709370657
109 lines
3.8 KiB
C
109 lines
3.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef RTC_IMX233_H
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#define RTC_IMX233_H
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#include "config.h"
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#include "system.h"
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#include "cpu.h"
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#define HW_RTC_BASE 0x8005c000
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#define HW_RTC_CTRL (*(volatile uint32_t *)(HW_RTC_BASE + 0x0))
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#define HW_RTC_CTRL__ALARM_IRQ_EN (1 << 0)
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#define HW_RTC_CTRL__ONEMSEC_IRQ_EN (1 << 1)
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#define HW_RTC_CTRL__ALARM_IRQ (1 << 2)
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#define HW_RTC_CTRL__ONEMSEC_IRQ (1 << 3)
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#define HW_RTC_CTRL__WATCHDOGEN (1 << 4)
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#define HW_RTC_CTRL__FORCE_UPDATE (1 << 5)
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#define HW_RTC_CTRL__SUPPRESS_COPY2ANALOG (1 << 6)
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#define HW_RTC_STAT (*(volatile uint32_t *)(HW_RTC_BASE + 0x10))
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#define HW_RTC_STAT__NEW_REGS_BP 8
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#define HW_RTC_STAT__NEW_REGS_BM 0xff00
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#define HW_RTC_STAT__STALE_REGS_BP 16
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#define HW_RTC_STAT__STALE_REGS_BM 0xff0000
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#define HW_RTC_STAT__XTAL32768_PRESENT (1 << 27)
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#define HW_RTC_STAT__XTAL32000_PRESENT (1 << 28)
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#define HW_RTC_STAT__WATCHDOG_PRESENT (1 << 29)
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#define HW_RTC_STAT__ALARM_PRESENT (1 << 30)
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#define HW_RTC_STAT__RTC_PRESENT (1 << 31)
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#define HW_RTC_MILLISECONDS (*(volatile uint32_t *)(HW_RTC_BASE + 0x20))
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#define HW_RTC_SECONDS (*(volatile uint32_t *)(HW_RTC_BASE + 0x30))
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#define HW_RTC_ALARM (*(volatile uint32_t *)(HW_RTC_BASE + 0x40))
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#define HW_RTC_WATCHDOG (*(volatile uint32_t *)(HW_RTC_BASE + 0x50))
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#define HW_RTC_PERSISTENTx(x) (*(volatile uint32_t *)(HW_RTC_BASE + 0x60 + (x) * 0x10))
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#define HW_RTC_PERSISTENT0 (*(volatile uint32_t *)(HW_RTC_BASE + 0x60))
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#define HW_RTC_PERSISTENT0__CLOCKSOURCE (1 << 0)
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#define HW_RTC_PERSISTENT0__ALARM_WAKE_EN (1 << 1)
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#define HW_RTC_PERSISTENT0__ALARM_EN (1 << 2)
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#define HW_RTC_PERSISTENT0__XTAL24MHZ_PWRUP (1 << 4)
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#define HW_RTC_PERSISTENT0__XTAL32KHZ_PWRUP (1 << 5)
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#define HW_RTC_PERSISTENT0__XTAL32_FREQ (1 << 6)
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#define HW_RTC_PERSISTENT0__ALARM_WAKE (1 << 7)
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#define HW_RTC_PERSISTENT0__AUTO_RESTART (1 << 17)
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#define HW_RTC_PERSISTENT0__SPARE_BP 18
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#define HW_RTC_PERSISTENT0__SPARE_BM (0x3fff << 18)
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#define HW_RTC_PERSISTENT0__SPARE__RELEASE_GND (1 << 19)
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#define HW_RTC_PERSISTENT1 (*(volatile uint32_t *)(HW_RTC_BASE + 0x70))
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#define HW_RTC_PERSISTENT2 (*(volatile uint32_t *)(HW_RTC_BASE + 0x80))
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#define HW_RTC_PERSISTENT3 (*(volatile uint32_t *)(HW_RTC_BASE + 0x90))
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#define HW_RTC_PERSISTENT4 (*(volatile uint32_t *)(HW_RTC_BASE + 0xa0))
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#define HW_RTC_PERSISTENT5 (*(volatile uint32_t *)(HW_RTC_BASE + 0xb0))
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struct imx233_rtc_info_t
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{
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uint32_t seconds;
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uint32_t persistent[6];
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};
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static inline void imx233_rtc_init(void)
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{
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__REG_CLR(HW_RTC_CTRL) = __BLOCK_CLKGATE;
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}
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static inline uint32_t imx233_rtc_read_seconds(void)
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{
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return HW_RTC_SECONDS;
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}
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static inline uint32_t imx233_rtc_read_persistent(int idx)
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{
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return HW_RTC_PERSISTENTx(idx);
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}
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void imx233_rtc_write_seconds(uint32_t seconds);
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void imx233_rtc_write_persistent(int idx, uint32_t val);
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struct imx233_rtc_info_t imx233_rtc_get_info(void);
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#endif /* RTC_IMX233_H */
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