2acc0ac542
later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
110 lines
3.5 KiB
C
110 lines
3.5 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "string.h"
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#include "adc.h"
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/**************************************************************************
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** The A/D conversion is done every tick, in three steps:
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**
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** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
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** the A/D interrupt is enabled.
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**
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** 2) After the conversion is done (approx. 256*4 cycles later), an interrupt
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** is generated at level 1, which is the same level as the tick interrupt
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** itself. This interrupt will be pending until the tick interrupt is
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** finished.
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** When the A/D interrupt is finally served, it will read the results
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** from the first conversion and start the conversion of channels 4-7.
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**
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** 3) When the conversion of channels 4-7 is finished, the interrupt is
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** triggered again, and the results are read. This time, no new
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** conversion is started, it will be done in the next tick interrupt.
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**
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** Thus, each channel will be updated HZ times per second.
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**
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*************************************************************************/
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static int current_channel;
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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static void adc_tick(void)
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{
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/* Start a conversion of channel group 0. This will trigger an interrupt,
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and the interrupt handler will take care of group 1. */
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current_channel = 0;
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 3;
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}
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void ADITI(void) __attribute__((interrupt_handler));
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void ADITI(void)
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{
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if(ADCSR & ADCSR_ADF)
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{
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ADCSR = 0;
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if(current_channel == 0)
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{
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adcdata[0] = ADDRA >> 6;
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adcdata[1] = ADDRB >> 6;
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adcdata[2] = ADDRC >> 6;
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adcdata[3] = ADDRD >> 6;
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current_channel = 4;
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/* Convert the next group */
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 7;
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}
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else
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{
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adcdata[4] = ADDRA >> 6;
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adcdata[5] = ADDRB >> 6;
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adcdata[6] = ADDRC >> 6;
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adcdata[7] = ADDRD >> 6;
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}
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}
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}
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unsigned short adc_read(int channel)
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{
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return adcdata[channel];
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}
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void adc_init(void)
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{
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ADCR = 0x7f; /* No external trigger; other bits should be 1 according
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to the manual... */
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ADCSR = 0;
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current_channel = 0;
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/* Enable the A/D IRQ on level 1 */
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IPRE = (IPRE & 0xf0ff) | 0x0100;
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tick_add_task(adc_tick);
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sleep(2); /* Ensure valid readings when adc_init returns */
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}
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