15ad1c42db
- Removed unnecessary layers of generic code - Software ECC is gone since we don't need it now (and maybe not ever) - Removed bounce buffering, so callers must now align buffers Change-Id: I33fbac9d9d12a4657980b8618c7d62bfa91e2ea0
100 lines
3.8 KiB
C
100 lines
3.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __NAND_X1000_H__
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#define __NAND_X1000_H__
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/* NOTE: this is a very minimal API designed only to support a bootloader.
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* Not suitable for general data storage. It doesn't have proper support for
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* partial page writes, access to spare area, etc, which are all necessary
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* for an effective flash translation layer.
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*
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* There's no ECC support. This can be added if necessary, but it's unlikely
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* the boot area on any X1000 device uses software ECC as Ingenic's SPL simply
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* doesn't have much room for more code (theirs programmed to work on multiple
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* hardware configurations, so it's bigger than ours).
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "nand-x1000-err.h"
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/* Chip supports quad I/O for page read/write */
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#define NANDCHIP_FLAG_QUAD 0x01
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/* Set/clear the BRWD bit when enabling/disabling write protection */
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#define NANDCHIP_FLAG_USE_BRWD 0x02
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typedef struct nand_chip_data {
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/* Chip manufacturer / device ID */
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uint8_t mf_id;
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uint8_t dev_id;
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/* Width of row/column addresses in bytes */
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uint8_t rowaddr_width;
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uint8_t coladdr_width;
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/* SFC dev conf and clock frequency to use for this device */
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uint32_t dev_conf;
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uint32_t clock_freq;
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/* Page size in bytes = 1 << log2_page_size */
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uint32_t log2_page_size;
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/* Block size in number of pages = 1 << log2_block_size */
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uint32_t log2_block_size;
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/* Chip flags */
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uint32_t flags;
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} nand_chip_data;
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/* Open or close the NAND driver. The NAND driver takes control of the SFC,
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* so that driver must be in the closed state before opening the NAND driver.
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*/
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extern int nand_open(void);
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extern void nand_close(void);
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/* Identify the NAND chip. This must be done after opening the driver and
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* prior to any data access, in order to set the chip parameters. */
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extern int nand_identify(int* mf_id, int* dev_id);
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/* Return the chip data for the identified NAND chip.
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* Returns NULL if the chip is not identified. */
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const nand_chip_data* nand_get_chip_data(void);
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/* Controls the chip's write protect features. The driver also keeps track of
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* this flag and refuses to perform write or erase operations unless you have
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* enabled writes. Writes should be disabled again when you finish writing. */
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extern int nand_enable_writes(bool en);
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/* Reading and writing operates on whole pages at a time. If the address or
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* size is not aligned to a multiple of the page size, no data will be read
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* or written and an error code is returned. */
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extern int nand_read(uint32_t addr, uint32_t size, uint8_t* buf);
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extern int nand_write(uint32_t addr, uint32_t size, const uint8_t* buf);
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/* Ereas eoperates on whole blocks. Like the page read/write operations,
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* the address and size must be aligned to a multiple of the block size.
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* If not, no blocks are erased and an error code is returned. */
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extern int nand_erase(uint32_t addr, uint32_t size);
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#endif /* __NAND_X1000_H__ */
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