86f9a8410b
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@2370 a1c6a512-1295-4272-9138-f99709370657
175 lines
5.8 KiB
C
175 lines
5.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Alan Korr
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdbool.h>
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#include "system.h"
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#define LCDR (PBDR_ADDR+1)
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#ifdef HAVE_LCD_CHARCELLS
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#define LCD_DS 1 // PB0 = 1 --- 0001 --- LCD-DS
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#define LCD_CS 2 // PB1 = 1 --- 0010 --- /LCD-CS
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#define LCD_SD 4 // PB2 = 1 --- 0100 --- LCD-SD
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#define LCD_SC 8 // PB3 = 1 --- 1000 --- LCD-SC
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#else
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#define LCD_SD 1 // PB0 = 1 --- 0001
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#define LCD_SC 2 // PB1 = 1 --- 0010
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#define LCD_RS 4 // PB2 = 1 --- 0100
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#define LCD_CS 8 // PB3 = 1 --- 1000
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#define LCD_DS LCD_RS
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#endif
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/*
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* About /CS,DS,SC,SD
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* ------------------
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*
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* LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
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*
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* - /CS -> Chip Selection line :
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* 0 : LCD chipset is activated.
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* - DS -> Data Selection line, latched at the rising edge
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* of the 8th serial clock (*) :
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* 0 : instruction register,
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* 1 : data register;
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* - SC -> Serial Clock line (SDA).
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* - SD -> Serial Data line (SCK), latched at the rising edge
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* of each serial clock (*).
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*
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* _ _
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* /CS \ /
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* \______________________________________________________/
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* _____ ____ ____ ____ ____ ____ ____ ____ ____ _____
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* SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
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* _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
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*
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* _____ _ _ _ _ _ _ _ ________
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* SC \ * \ * \ * \ * \ * \ * \ * \ *
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* \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
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* _ _________________________________________________________
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* DS \/
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* _/\_________________________________________________________
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*
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*/
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/*
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* The only way to do logical operations in an atomic way
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* on SH1 is using :
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*
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* or.b/and.b/tst.b/xor.b #imm,@(r0,gbr)
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*
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* but GCC doesn't generate them at all so some assembly
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* codes are needed here.
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*
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* The Global Base Register gbr is expected to be zero
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* and r0 is the address of one register in the on-chip
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* peripheral module.
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*
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*/
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void lcd_write(bool command, int byte) __attribute__ ((section (".icode")));
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void lcd_write(bool command, int byte)
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{
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asm("and.b %0, @(r0,gbr)"
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:
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: /* %0 */ "I"(~(LCD_CS|LCD_DS|LCD_SD|LCD_SC)),
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/* %1 */ "z"(LCDR));
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if (command)
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asm ("shll8 %0\n"
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"0: \n\t"
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"and.b %2,@(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3,@(r0,gbr)\n"
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"1: \n\t"
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"or.b %4,@(r0,gbr)\n"
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"add #-1,%1\n\t"
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"cmp/pl %1\n\t"
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"bt 0b"
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:
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: /* %0 */ "r"(((unsigned)byte)<<16),
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/* %1 */ "r"(8),
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/* %2 */ "I"(~(LCD_SC|LCD_SD|LCD_DS)),
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/* %3 */ "I"(LCD_SD),
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/* %4 */ "I"(LCD_SC),
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/* %5 */ "z"(LCDR));
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else
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asm ("shll8 %0\n"
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"0: \n\t"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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"and.b %2, @(r0,gbr)\n\t"
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"shll %0\n\t"
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"bf 1f\n\t"
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"or.b %3, @(r0,gbr)\n"
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"1: \n\t"
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"or.b %4, @(r0,gbr)\n"
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:
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: /* %0 */ "r"(((unsigned)byte)<<16),
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/* %1 */ "r"(8),
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/* %2 */ "I"(~(LCD_SC|LCD_SD)),
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/* %3 */ "I"(LCD_SD|LCD_DS),
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/* %4 */ "I"(LCD_SC|LCD_DS),
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/* %5 */ "z"(LCDR));
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asm("or.b %0, @(r0,gbr)"
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:
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: /* %0 */ "I"(LCD_CS|LCD_DS|LCD_SD|LCD_SC),
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/* %1 */ "z"(LCDR));
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}
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