451aa86244
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27645 a1c6a512-1295-4272-9138-f99709370657
248 lines
6.7 KiB
C
248 lines
6.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: uda1380.c 21975 2009-07-19 22:45:32Z bertrik $
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*
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* Copyright (C) 2009 by Bob Cousins
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <string.h>
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#include "config.h"
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#include "logf.h"
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#include "system.h"
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#include "audio.h"
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#include "debug.h"
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#include "audiohw.h"
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const struct sound_settings_info audiohw_settings[] = {
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[SOUND_VOLUME] = {"dB", 0, 1, -84, 0, -25},
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[SOUND_BASS] = {"dB", 0, 2, 0, 24, 0},
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[SOUND_TREBLE] = {"dB", 0, 2, 0, 6, 0},
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[SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, /* not used */
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[SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, /* not used */
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[SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, /* not used */
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#ifdef HAVE_RECORDING
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[SOUND_LEFT_GAIN] = {"dB", 1, 1,-128, 96, 0},
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[SOUND_RIGHT_GAIN] = {"dB", 1, 1,-128, 96, 0},
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[SOUND_MIC_GAIN] = {"dB", 1, 1,-128, 108, 16},
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#endif
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};
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/* convert tenth of dB volume (-600..0) to master volume register value */
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int tenthdb2master(int db)
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{
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if (db < -600)
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return 63;
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else /* 1 dB steps */
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return -(db / 10) + 1;
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}
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static unsigned short uda_regs[NUM_REG_ID];
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/****************************************************************************/
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/* ------------------------------------------------- */
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/* Local functions and variables */
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/* ------------------------------------------------- */
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/* Generic L3 functions */
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#define L3PORT GPBDAT
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#define L3MODE (1 << 2)
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#define L3DATA (1 << 3)
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#define L3CLOCK (1 << 4)
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static void l3_init (void)
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{
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L3PORT |= L3MODE | L3CLOCK;
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L3PORT &= ~L3DATA;
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S3C2440_GPIO_CONFIG (GPBCON, 2, GPIO_OUTPUT); /* L3 MODE */
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S3C2440_GPIO_CONFIG (GPBCON, 3, GPIO_OUTPUT); /* L3 DATA */
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S3C2440_GPIO_CONFIG (GPBCON, 4, GPIO_OUTPUT); /* L3 CLOCK */
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S3C2440_GPIO_PULLUP (GPBUP, 2, GPIO_PULLUP_DISABLE);
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S3C2440_GPIO_PULLUP (GPBUP, 3, GPIO_PULLUP_DISABLE);
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S3C2440_GPIO_PULLUP (GPBUP, 4, GPIO_PULLUP_DISABLE);
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}
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static void bit_delay (void)
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{
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volatile int j;
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for (j=0; j<5; j++)
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;
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}
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static void l3_write_byte (unsigned char data, bool address_mode)
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{
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int bit;
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L3PORT |= L3CLOCK;
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if (address_mode)
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L3PORT &= ~L3MODE;
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else
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L3PORT |= L3MODE;
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bit_delay();
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for (bit=0; bit < 8; bit++)
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{
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if (data & 1)
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{
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L3PORT |= L3DATA;
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}
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else
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{
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L3PORT &= ~L3DATA;
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}
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L3PORT &= ~L3CLOCK;
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bit_delay();
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L3PORT |= L3CLOCK;
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bit_delay();
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data >>= 1;
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}
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if (address_mode)
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L3PORT |= L3MODE;
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else
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L3PORT &= ~L3MODE;
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bit_delay();
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}
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static void l3_write_addr (unsigned char addr)
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{
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/* write address byte */
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l3_write_byte (addr, true);
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}
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static void l3_write_data (unsigned char data)
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{
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/* write data byte */
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l3_write_byte (data, false);
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}
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/****************************************************************************/
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/* UDA1341 access functions */
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static int udacodec_write(unsigned char reg, unsigned short value)
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{
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l3_write_addr (UDA1341_ADDR | reg);
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l3_write_data (value & 0xff);
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return 0;
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}
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static void udacodec_reset(void)
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{
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/* uda reset */
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l3_init();
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udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_RESET | UDA_SYSCLK_256FS |
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I2S_IFMT_IIS);
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udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_SYSCLK_256FS | I2S_IFMT_IIS);
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udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | UDA_POWER_DAC_ON);
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uda_regs[UDA_REG_ID_CTRL2] = UDA_PEAK_DETECT_POS_AFTER |
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UDA_DE_EMPHASIS_NONE | UDA_MUTE_OFF | UDA_MODE_SWITCH_FLAT;
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}
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/****************************************************************************/
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/* Audio API functions */
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/* This table must match the table in pcm-xxxx.c if using Master mode */
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/* [reserved, master clock rate] */
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static const unsigned char uda_freq_parms[HW_NUM_FREQ][2] =
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{
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[HW_FREQ_44] = { 0, UDA_SYSCLK_384FS },
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[HW_FREQ_22] = { 0, UDA_SYSCLK_256FS },
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[HW_FREQ_11] = { 0, UDA_SYSCLK_256FS },
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};
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void audiohw_init(void)
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{
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udacodec_reset();
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audiohw_set_bass (0);
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audiohw_set_treble (0);
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audiohw_set_master_vol (26, 26); /* -25 dB */
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}
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void audiohw_postinit(void)
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{
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}
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void audiohw_close(void)
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{
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/* DAC, ADC off */
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udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | 0);
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}
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void audiohw_set_bass(int value)
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{
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uda_regs [UDA_REG_ID_CTRL1] &= UDA_BASS_BOOST (UDA_BASS_BOOST_MASK);
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uda_regs [UDA_REG_ID_CTRL1] |= UDA_BASS_BOOST (value & UDA_BASS_BOOST_MASK);
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udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
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}
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void audiohw_set_treble(int value)
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{
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uda_regs [UDA_REG_ID_CTRL1] &= UDA_TREBLE (UDA_TREBLE_MASK);
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uda_regs [UDA_REG_ID_CTRL1] |= UDA_TREBLE (value & UDA_TREBLE_MASK);
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udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
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}
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/*static void audiohw_mute(bool mute)
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{
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if (mute)
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uda_regs [UDA_REG_ID_CTRL2] |= UDA_MUTE_ON;
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else
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uda_regs [UDA_REG_ID_CTRL2] &= ~UDA_MUTE_ON;
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udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL2 | uda_regs [UDA_REG_ID_CTRL2] );
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}
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*/
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#ifdef AUDIOHW_HAVE_PRESCALER
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void audiohw_set_prescaler(int val)
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{
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(void)val;
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}
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#endif /* AUDIOHW_HAVE_PRESCALER */
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/**
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* Sets left and right master volume (1(max) to 62(muted))
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*/
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void audiohw_set_master_vol(int vol_l, int vol_r)
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{
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uda_regs[UDA_REG_ID_CTRL0] = (vol_l + vol_r) / 2;
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udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL0 | uda_regs[UDA_REG_ID_CTRL0]);
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}
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void audiohw_set_frequency(int fsel)
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{
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if ((unsigned)fsel >= HW_NUM_FREQ)
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fsel = HW_FREQ_DEFAULT;
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uda_regs[UDA_REG_ID_STATUS_0] = I2S_IFMT_IIS | uda_freq_parms[fsel][1];
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udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | uda_regs[UDA_REG_ID_STATUS_0]);
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}
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