b8753ffdaa
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14941 a1c6a512-1295-4272-9138-f99709370657
173 lines
4.6 KiB
C
173 lines
4.6 KiB
C
/* fixed precision code. We use a combination of Sign 15.16 and Sign.31
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precision here.
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The WMA decoder does not always follow this convention, and occasionally
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renormalizes values to other formats in order to maximize precision.
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However, only the two precisions above are provided in this file.
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*/
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#include "types.h"
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#define PRECISION 16
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#define PRECISION64 16
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#define fixtof64(x) (float)((float)(x) / (float)(1 << PRECISION64)) //does not work on int64_t!
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#define ftofix32(x) ((fixed32)((x) * (float)(1 << PRECISION) + ((x) < 0 ? -0.5 : 0.5)))
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#define itofix64(x) (IntTo64(x))
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#define itofix32(x) ((x) << PRECISION)
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#define fixtoi32(x) ((x) >> PRECISION)
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#define fixtoi64(x) (IntFrom64(x))
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/*fixed functions*/
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fixed64 IntTo64(int x);
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int IntFrom64(fixed64 x);
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fixed32 Fixed32From64(fixed64 x);
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fixed64 Fixed32To64(fixed32 x);
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fixed64 fixmul64byfixed(fixed64 x, fixed32 y);
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fixed32 fixdiv32(fixed32 x, fixed32 y);
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fixed64 fixdiv64(fixed64 x, fixed64 y);
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fixed32 fixsqrt32(fixed32 x);
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fixed32 fixsin32(fixed32 x);
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fixed32 fixcos32(fixed32 x);
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long fsincos(unsigned long phase, fixed32 *cos);
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#ifdef CPU_ARM
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/*
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Fixed precision multiply code ASM.
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*/
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/*Sign-15.16 format */
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#define fixmul32(x, y) \
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({ int32_t __hi; \
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uint32_t __lo; \
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int32_t __result; \
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asm ("smull %0, %1, %3, %4\n\t" \
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"movs %0, %0, lsr %5\n\t" \
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"adc %2, %0, %1, lsl %6" \
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: "=&r" (__lo), "=&r" (__hi), "=r" (__result) \
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: "%r" (x), "r" (y), \
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"M" (PRECISION), "M" (32 - PRECISION) \
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: "cc"); \
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__result; \
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})
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#define fixmul32b(x, y) \
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({ int32_t __hi; \
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uint32_t __lo; \
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int32_t __result; \
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asm ("smull %0, %1, %3, %4\n\t" \
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"movs %2, %1, lsl #1" \
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: "=&r" (__lo), "=&r" (__hi), "=r" (__result) \
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: "%r" (x), "r" (y) \
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: "cc"); \
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__result; \
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})
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#elif defined(CPU_COLDFIRE)
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static inline int32_t fixmul32(int32_t x, int32_t y)
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{
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#if PRECISION != 16
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#warning Coldfire fixmul32() only works for PRECISION == 16
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#endif
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int32_t t1;
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asm (
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"mac.l %[x], %[y], %%acc0 \n" /* multiply */
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"mulu.l %[y], %[x] \n" /* get lower half, avoid emac stall */
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"movclr.l %%acc0, %[t1] \n" /* get higher half */
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"lsr.l #1, %[t1] \n"
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"move.w %[t1], %[x] \n"
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"swap %[x] \n"
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: /* outputs */
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[t1]"=&d"(t1),
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[x] "+d" (x)
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: /* inputs */
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[y] "d" (y)
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);
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return x;
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}
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fixed32 fixmul32b(fixed32 x, fixed32 y);
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#else
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fixed32 fixmul32(fixed32 x, fixed32 y);
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fixed32 fixmul32b(fixed32 x, fixed32 y);
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#endif
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#ifdef CPU_ARM
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static inline
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void CMUL(fixed32 *x, fixed32 *y,
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fixed32 a, fixed32 b,
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fixed32 t, fixed32 v)
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{
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/* This version loses one bit of precision. Could be solved at the cost
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* of 2 extra cycles if it becomes an issue. */
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int x1, y1, l;
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asm(
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"smull %[l], %[y1], %[b], %[t] \n"
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"smlal %[l], %[y1], %[a], %[v] \n"
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"rsb %[b], %[b], #0 \n"
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"smull %[l], %[x1], %[a], %[t] \n"
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"smlal %[l], %[x1], %[b], %[v] \n"
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: [l] "=&r" (l), [x1]"=&r" (x1), [y1]"=&r" (y1), [b] "+r" (b)
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: [a] "r" (a), [t] "r" (t), [v] "r" (v)
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: "cc"
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);
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*x = x1 << 1;
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*y = y1 << 1;
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}
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#elif defined CPU_COLDFIRE
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static inline
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void CMUL(fixed32 *x, fixed32 *y,
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fixed32 a, fixed32 b,
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fixed32 t, fixed32 v)
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{
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asm volatile ("mac.l %[a], %[t], %%acc0;"
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"msac.l %[b], %[v], %%acc0;"
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"mac.l %[b], %[t], %%acc1;"
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"mac.l %[a], %[v], %%acc1;"
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"movclr.l %%acc0, %[a];"
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"move.l %[a], (%[x]);"
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"movclr.l %%acc1, %[a];"
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"move.l %[a], (%[y]);"
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: [a] "+&r" (a)
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: [x] "a" (x), [y] "a" (y),
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[b] "r" (b), [t] "r" (t), [v] "r" (v)
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: "cc", "memory");
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}
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#else
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// PJJ : reinstate macro
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static inline
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void CMUL(fixed32 *pre,
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fixed32 *pim,
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fixed32 are,
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fixed32 aim,
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fixed32 bre,
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fixed32 bim)
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{
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//int64_t x,y;
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fixed32 _aref = are;
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fixed32 _aimf = aim;
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fixed32 _bref = bre;
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fixed32 _bimf = bim;
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fixed32 _r1 = fixmul32b(_bref, _aref);
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fixed32 _r2 = fixmul32b(_bimf, _aimf);
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fixed32 _r3 = fixmul32b(_bref, _aimf);
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fixed32 _r4 = fixmul32b(_bimf, _aref);
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*pre = _r1 - _r2;
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*pim = _r3 + _r4;
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}
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#endif
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