ed13fd6dca
When read it returns all enabled interrupt sources When written it enables interrupt sources for each bit set So just like VIC_INT_EN_CLEAR, we don't have to read the previous value before writing to it (VIC_INT_EN_CLEAR is write-only anyway) Thanks to Fred Bauer for spotting git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657
68 lines
2 KiB
C
68 lines
2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "as3525.h"
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#include "timer.h"
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#include "stdlib.h"
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void INT_TIMER1(void)
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{
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if (pfn_timer != NULL)
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pfn_timer();
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TIMER1_INTCLR = 0; /* clear interrupt */
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}
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bool timer_set(long cycles, bool start)
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{
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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}
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TIMER1_LOAD = TIMER1_BGLOAD = cycles;
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/* /!\ bit 4 (reserved) must not be modified
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* periodic mode, interrupt enabled, no prescale, 32 bits counter */
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TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) |
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TIMER_ENABLE |
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TIMER_PERIODIC |
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TIMER_INT_ENABLE |
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TIMER_32_BIT;
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return true;
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}
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bool timer_start(void)
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{
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CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
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VIC_INT_ENABLE = INTERRUPT_TIMER1;
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return true;
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}
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void timer_stop(void)
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{
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TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
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VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
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CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
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}
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