9b1c774218
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21656 a1c6a512-1295-4272-9138-f99709370657
119 lines
3.7 KiB
C
Executable file
119 lines
3.7 KiB
C
Executable file
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "s5l8700.h"
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#include "dma-target.h"
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#include "panic.h"
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#include "system.h"
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/* Driver for the IODMA part of the s5l8700
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When requesting a DMA transfer the supplied callback is stored and called
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upon completion of the DMA transfer (callback runs in interrupt context).
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*/
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#define DMAC_BASE 0x38400000
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#define DMABASE(c) (*(volatile unsigned int*)(DMAC_BASE+0x00+(0x20*c)))
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#define DMACON(c) (*(volatile unsigned int*)(DMAC_BASE+0x04+(0x20*c)))
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#define DMATCNT(c) (*(volatile unsigned int*)(DMAC_BASE+0x08+(0x20*c)))
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#define DMACADDR(c) (*(volatile unsigned int*)(DMAC_BASE+0x0C+(0x20*c)))
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#define DMACTCNT(c) (*(volatile unsigned int*)(DMAC_BASE+0x10+(0x20*c)))
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#define DMACOM(c) (*(volatile unsigned int*)(DMAC_BASE+0x14+(0x20*c)))
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#define DMANOFF(c) (*(volatile unsigned int*)(DMAC_BASE+0x18+(0x20*c)))
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#define DMACOM_HOLD 2 /* only allowed on channel 0 */
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#define DMACOM_SKIP 3 /* only allowed on channel 0 */
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#define DMACOM_CHAN_ON 4
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#define DMACOM_CHAN_OFF 5
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#define DMACOM_CLEAR_HCOM 6
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#define DMACOM_CLEAR_HCOM_WCOM 7
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/* one completion callback for each channel */
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static void (*dma_callback[4])(void);
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void dma_init(void)
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{
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int i;
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for (i = 0; i < 4; i++) {
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dma_callback[i] = NULL;
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dma_disable_channel(i);
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}
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INTMSK |= (1 << 10);
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}
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/* setup a DMA transfer, but do not start it yet */
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void dma_setup_channel(int channel, int sel, int dir, int dsize, int blen,
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void *addr, size_t size, void (*callback)(void))
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{
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dma_callback[channel] = callback;
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DMACON(channel) = (sel << 30) | /* DEVSEL */
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(dir << 29) | /* DIR */
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(0 << 24) | /* SCHCNT */
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(dsize << 22) | /* DSIZE */
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(blen << 19) | /* BLEN */
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(0 << 18) | /* RELOAD */
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(0 << 17) | /* HCOMINT */
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(1 << 16) | /* WCOMINT */
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(0 << 0); /* OFFSET */
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DMABASE(channel) = (unsigned int)addr;
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DMATCNT(channel) = size;
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}
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void dma_enable_channel(int channel)
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{
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DMACOM(channel) = DMACOM_CHAN_ON;
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}
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void dma_disable_channel(int channel)
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{
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DMACOM(channel) = DMACOM_CHAN_OFF;
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}
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/* interrupt handler for all DMA channels */
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void INT_DMA(void)
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{
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unsigned int mask;
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int channel;
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mask = (1 << 0) | /* WCOMx interrupt bit */
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(1 << 1); /* HCOMx interrupt bit */
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for (channel = 0; channel < 4; channel++) {
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if (DMAALLST & mask) {
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/* clear half and whole completion bits */
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DMACOM(channel) = DMACOM_CLEAR_HCOM_WCOM;
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if (dma_callback[channel]) {
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dma_callback[channel]();
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}
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}
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mask <<= 4;
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}
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}
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