0a584fb06c
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18539 a1c6a512-1295-4272-9138-f99709370657
321 lines
8.8 KiB
C
321 lines
8.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Alan Korr
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "hwcompat.h"
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#include "kernel.h"
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#include "lcd.h"
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#include "system.h"
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#include "cpu.h"
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#include "s6d0154.h"
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/*** definitions ***/
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#define SPIDELAY(_x) void(_x);
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#define SETMOSI() (PDAT4 |= (1 << 3))
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#define CLRMOSI() (PDAT4 &= ~(1 << 3))
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#define MISO ((PDAT1 >> 1) & 1)
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#define SETCLK() (PDAT4 |= (1 << 2))
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#define CLRCLK() (PDAT4 &= ~(1 << 2))
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#define SETSS() (PDAT7 |= (1 << 1))
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#define CLRSS() (PDAT7 &= ~(1 << 1))
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static unsigned short controller_type = 0;
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void init_lcd_spi(void)
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{
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int oldval;
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oldval = PCON1;
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//Set P1.1 to input
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PCON1 = ((oldval & ~(0xf << 4)));
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oldval = PCON4;
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//Set P4.2 and 4.3 to output
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PCON4 = ((oldval & ~(0xf << 8 | 0xf << 12)) | (1 << 8 | 1 << 12));
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oldval = PCON4;
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//Set P4.2 and 4.3 to output
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PCON4 = ((oldval & ~(0xf << 8 | 0xf << 12)) | (1 << 8 | 1 << 12));
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oldval = PCON7;
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//Set P7.0 and 7.1 to output
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PCON7 = ((oldval & ~(0xf << 0 | 0xf << 4)) | (1 << 0 | 1 << 4));
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SETSS();
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SETCLK();
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}
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static inline void delay(int duration)
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{
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volatile int i;
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for(i=0;i<duration;i++);
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}
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unsigned int lcd_spi_io(unsigned int output,unsigned int bits,unsigned int inskip)
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{
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unsigned int input = 0;
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unsigned int i;
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//delay(10); // < 470 us
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CLRSS();
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//delay(13); // > 22 us
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for (i = 0; i < bits+inskip; i++) {
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CLRCLK();
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if(i<bits)
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{
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if (output & (1 << (bits-1)))
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SETMOSI();
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else
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CLRMOSI();
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output <<= 1;
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}
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else
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{
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CLRMOSI();
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}
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//delay(20); // >> 6.7 us
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SETCLK();
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if(i>=inskip)
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{
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input <<= 1;
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input |= MISO;
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}
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//delay(20); // >> 6.7 us
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}
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SETSS();
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return (input);
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}
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void spi_set_reg(unsigned char reg,unsigned short value)
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{
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lcd_spi_io(0x700000|reg,24,0); // possibly 0x74
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lcd_spi_io(0x720000|value,24,0); // possibly 0x77
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}
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unsigned int lcd_read_id(void)
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{
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unsigned int device_code;
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lcd_spi_io(0x700000,24,0); // possibly 0x74
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device_code=lcd_spi_io(0x7300,16,24); // possibly 0x77
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return device_code;
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}
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/** globals **/
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static int xoffset; /* needed for flip */
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/*** hardware configuration ***/
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int lcd_default_contrast(void)
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{
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return 0x1f;
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}
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void lcd_set_contrast(int val)
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{
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}
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void lcd_set_invert_display(bool yesno)
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{
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}
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/* turn the display upside down (call lcd_update() afterwards) */
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void lcd_set_flip(bool yesno)
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{
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/* TODO: flip mode isn't working. The commands in the else part of
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this function are how the original firmware inits the LCD */
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if (yesno)
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{
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xoffset = 132 - LCD_WIDTH; /* 132 colums minus the 128 we have */
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}
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else
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{
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xoffset = 0;
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}
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}
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void lcd_off(void)
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{
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
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delay(20);
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x00);
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break;
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}
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}
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void lcd_on(void)
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{
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
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delay(20);
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x13);
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break;
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}
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}
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/* LCD init */
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void lcd_init_device(void)
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{
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init_lcd_spi();
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controller_type = lcd_read_id();
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switch(controller_type)
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{
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case 0x0154:
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spi_set_reg(S6D0154_REG_EXTERNAL_INTERFACE_CONTROL, 0x130); // RGB interface, RGB interface for PNP mode
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spi_set_reg(S6D0154_REG_MTP_TEST_KEY, 0x8d); // ??
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spi_set_reg(0x92, 0x10);
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/* See also datasheet 11.3 Set up Flow of Generated Power Supply */
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x1b); // VC1IEN, 2.76V
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spi_set_reg(S6D0154_REG_POWER_CONTROL_3, 0x3101);// VGH=6*VCI1, VGL=-4*VCI1, f(DCCLK):f(DCCLK1)=1:0.5, f(DCCLK) : f(DCCLK3)= 1:0.5
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spi_set_reg(S6D0154_REG_POWER_CONTROL_4, 0x105f);//DCR_EX=1(Use dotclock)
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spi_set_reg(S6D0154_REG_POWER_CONTROL_5, 0x667f);
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spi_set_reg(S6D0154_REG_POWER_CONTROL_1, 0x800);
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delay(20); // >10ms
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x11b);
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delay(20); // >10ms
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x31b);
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delay(20); // >10ms
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x71b);
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delay(20); // >10ms
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf1b);
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delay(20); // >10ms
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spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf3b);
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delay(30); // >30ms
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spi_set_reg(S6D0154_REG_DRIVER_OUTPUT_CONTROL, 0x2128);
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spi_set_reg(S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL, 0x100);
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spi_set_reg(S6D0154_REG_ENTRY_MODE, 0x1030);//{DB [17:12], DB [11:6], DB [5:0]} is assigned to {B, G, R}. Horizontal first, auto increment address, write from 0x0000 to 0xdbaf
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spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0); // all off
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spi_set_reg(S6D0154_REG_BLANK_PERIOD_CONTROL, 0x808);
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spi_set_reg(S6D0154_REG_FRAME_CYCLE_CONTROL, 0x1100);
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spi_set_reg(S6D0154_REG_START_OSCILLATION, 0xf01);// Start oscillator, X 1.25
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spi_set_reg(S6D0154_REG_VCI_RECYCLING, 0);
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spi_set_reg(S6D0154_REG_GATE_SCAN_POSITION, 0);
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/* Set things up to write to the entire screen */
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spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1, 319); // end of partial screen
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spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2, 0); // start of partial screen
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spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1, 239); // end of window
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spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2, 0); // start of window
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spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1, 319); // end of window
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spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2, 0); // start of window
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_1, 0);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_2, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_3, 0xa03);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_4, 0x300);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_5, 0xc05);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_6, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_7, 0xf00);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_8, 3);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_9, 0x1f07);
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spi_set_reg(S6D0154_REG_GAMMA_CONTROL_10, 0x71f);
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delay(20);
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lcd_on();
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break;
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}
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}
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/*** Update functions ***/
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/* Performance function that works with an external buffer
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note that by and bheight are in 8-pixel units! */
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void lcd_blit_mono(const unsigned char *data, int x, int by, int width,
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int bheight, int stride)
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{
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/* Copy display bitmap to hardware */
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while (bheight--)
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{
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}
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}
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/* Performance function that works with an external buffer
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note that by and bheight are in 8-pixel units! */
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void lcd_blit_grey_phase_blit(unsigned char *values, unsigned char *phases,
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int x, int by, int width, int bheight, int stride)
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{
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(void)values;
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(void)phases;
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(void)x;
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(void)by;
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(void)width;
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(void)bheight;
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(void)stride;
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}
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/* Update the display.
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This must be called after all other LCD functions that change the display. */
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void lcd_update(void) ICODE_ATTR;
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void lcd_update(void)
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{
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int y;
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/* Copy display bitmap to hardware */
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for (y = 0; y < LCD_FBHEIGHT; y++)
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{
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}
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}
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/* Update a fraction of the display. */
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void lcd_update_rect(int, int, int, int) ICODE_ATTR;
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void lcd_update_rect(int x, int y, int width, int height)
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{
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int ymax;
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/* The Y coordinates have to work on even 8 pixel rows */
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ymax = (y + height-1) >> 3;
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y >>= 3;
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if(x + width > LCD_WIDTH)
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width = LCD_WIDTH - x;
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if (width <= 0)
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return; /* nothing left to do, 0 is harmful to lcd_write_data() */
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if(ymax >= LCD_FBHEIGHT)
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ymax = LCD_FBHEIGHT-1;
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/* Copy specified rectange bitmap to hardware */
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for (; y <= ymax; y++)
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{
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}
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}
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