4909e09267
Some of these were found with http://www.samba.org/junkcode/#findstatic. Changes of note: * The old MDCT has been removed. * Makefile.test files that create test programs for libatrac, libcook, and libffmpegFLAC have been removed, as they don't work. My project will have a replacement that works with all codecs. * I've tried not to remove anything useful. CLIP_TO_15 was removed from libtremor because there's another copy (also commented) in codeclib. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29945 a1c6a512-1295-4272-9138-f99709370657
342 lines
11 KiB
C
342 lines
11 KiB
C
/********************************************************************
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* *
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* THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. *
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* *
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* USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS *
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* GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
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* IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. *
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* *
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* THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 *
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* BY THE Xiph.Org FOUNDATION http://www.xiph.org/ *
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* *
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********************************************************************
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function: arm7 and later wide math functions
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********************************************************************/
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#ifdef _ARM_ASSEM_
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#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_)
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#define _V_WIDE_MATH
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static inline ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) {
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int lo,hi;
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asm volatile("smull\t%0, %1, %2, %3"
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: "=&r"(lo),"=&r"(hi)
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: "%r"(x),"r"(y) );
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return(hi);
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}
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static inline ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) {
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return MULT32(x,y)<<1;
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}
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static inline ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) {
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int lo,hi;
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asm volatile("smull %0, %1, %2, %3\n\t"
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"movs %0, %0, lsr #15\n\t"
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"adc %1, %0, %1, lsl #17\n\t"
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: "=&r"(lo),"=&r"(hi)
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: "%r"(x),"r"(y)
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: "cc");
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return(hi);
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}
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#ifndef _V_VECT_OPS
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#define _V_VECT_OPS
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/* asm versions of vector operations for block.c, window.c */
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/* SOME IMPORTANT NOTES: this implementation of vect_mult_bw does
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NOT do a final shift, meaning that the result of vect_mult_bw is
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only 31 bits not 32. This is so that we can do the shift in-place
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in vect_add_xxxx instead to save one instruction for each mult on arm */
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static inline
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void vect_add_right_left(ogg_int32_t *x, const ogg_int32_t *y, int n)
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{
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/* first arg is right subframe of previous frame and second arg
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is left subframe of current frame. overlap left onto right overwriting
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the right subframe */
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do{
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asm volatile (
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"ldmia %[x], {r0, r1, r2, r3};"
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"ldmia %[y]!, {r4, r5, r6, r7};"
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"add r0, r4, r0, lsl #1;"
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"add r1, r5, r1, lsl #1;"
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"add r2, r6, r2, lsl #1;"
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"add r3, r7, r3, lsl #1;"
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"stmia %[x]!, {r0, r1, r2, r3};"
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"ldmia %[x], {r0, r1, r2, r3};"
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"ldmia %[y]!, {r4, r5, r6, r7};"
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"add r0, r4, r0, lsl #1;"
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"add r1, r5, r1, lsl #1;"
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"add r2, r6, r2, lsl #1;"
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"add r3, r7, r3, lsl #1;"
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"stmia %[x]!, {r0, r1, r2, r3};"
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: [x] "+r" (x), [y] "+r" (y)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7",
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"memory");
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n -= 8;
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} while (n);
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}
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static inline
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void vect_add_left_right(ogg_int32_t *x, const ogg_int32_t *y, int n)
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{
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/* first arg is left subframe of current frame and second arg
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is right subframe of previous frame. overlap right onto left overwriting
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the LEFT subframe */
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do{
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asm volatile (
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"ldmia %[x], {r0, r1, r2, r3};"
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"ldmia %[y]!, {r4, r5, r6, r7};"
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"add r0, r0, r4, lsl #1;"
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"add r1, r1, r5, lsl #1;"
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"add r2, r2, r6, lsl #1;"
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"add r3, r3, r7, lsl #1;"
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"stmia %[x]!, {r0, r1, r2, r3};"
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"ldmia %[x], {r0, r1, r2, r3};"
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"ldmia %[y]!, {r4, r5, r6, r7};"
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"add r0, r0, r4, lsl #1;"
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"add r1, r1, r5, lsl #1;"
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"add r2, r2, r6, lsl #1;"
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"add r3, r3, r7, lsl #1;"
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"stmia %[x]!, {r0, r1, r2, r3};"
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: [x] "+r" (x), [y] "+r" (y)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7",
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"memory");
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n -= 8;
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} while (n);
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}
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#if ARM_ARCH >= 6
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static inline
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void vect_mult_fw(ogg_int32_t *data, LOOKUP_T *window, int n)
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{
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/* Note, mult_fw uses MULT31 */
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do{
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asm volatile (
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"ldmia %[d], {r0, r1, r2, r3};"
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"ldmia %[w]!, {r4, r5, r6, r7};"
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"smmul r0, r4, r0;"
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"smmul r1, r5, r1;"
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"smmul r2, r6, r2;"
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"smmul r3, r7, r3;"
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"mov r0, r0, lsl #1;"
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"mov r1, r1, lsl #1;"
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"mov r2, r2, lsl #1;"
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"mov r3, r3, lsl #1;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7",
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"memory" );
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n -= 4;
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} while (n);
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}
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#else
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static inline
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void vect_mult_fw(ogg_int32_t *data, LOOKUP_T *window, int n)
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{
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/* Note, mult_fw uses MULT31 */
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do{
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asm volatile (
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"ldmia %[d], {r0, r1, r2, r3};"
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"ldmia %[w]!, {r4, r5, r6, r7};"
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"smull r8, r0, r4, r0;"
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"mov r0, r0, lsl #1;"
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"smull r8, r1, r5, r1;"
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"mov r1, r1, lsl #1;"
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"smull r8, r2, r6, r2;"
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"mov r2, r2, lsl #1;"
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"smull r8, r3, r7, r3;"
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"mov r3, r3, lsl #1;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7", "r8",
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"memory" );
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n -= 4;
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} while (n);
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}
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#endif
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#if ARM_ARCH >= 6
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static inline
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void vect_mult_bw(ogg_int32_t *data, LOOKUP_T *window, int n)
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{
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/* NOTE mult_bw uses MULT_32 i.e. doesn't shift result left at end */
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/* On ARM, we can do the shift at the same time as the overlap-add */
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do{
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asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
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"ldmda %[w]!, {r4, r5, r6, r7};"
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"smmul r0, r7, r0;"
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"smmul r1, r6, r1;"
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"smmul r2, r5, r2;"
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"smmul r3, r4, r3;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7",
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"memory" );
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n -= 4;
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} while (n);
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}
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#else
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static inline
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void vect_mult_bw(ogg_int32_t *data, LOOKUP_T *window, int n)
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{
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/* NOTE mult_bw uses MULT_32 i.e. doesn't shift result left at end */
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/* On ARM, we can do the shift at the same time as the overlap-add */
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do{
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asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
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"ldmda %[w]!, {r4, r5, r6, r7};"
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"smull r8, r0, r7, r0;"
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"smull r7, r1, r6, r1;"
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"smull r6, r2, r5, r2;"
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"smull r5, r3, r4, r3;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7", "r8",
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"memory" );
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n -= 4;
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} while (n);
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}
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#endif
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static inline void vect_copy(ogg_int32_t *x, const ogg_int32_t *y, int n)
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{
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memcpy(x,y,n*sizeof(ogg_int32_t));
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}
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#endif
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#endif
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#ifndef _V_LSP_MATH_ASM
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#define _V_LSP_MATH_ASM
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static inline void lsp_loop_asm(ogg_uint32_t *qip,ogg_uint32_t *pip,
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ogg_int32_t *qexpp,
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ogg_int32_t *ilsp,ogg_int32_t wi,
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ogg_int32_t m){
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ogg_uint32_t qi=*qip,pi=*pip;
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ogg_int32_t qexp=*qexpp;
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asm("mov r0,%3;"
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"movs r1,%5,asr#1;"
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"add r0,r0,r1,lsl#3;"
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"beq 2f;\n"
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"1:"
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"ldmdb r0!,{r1,r3};"
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"subs r1,r1,%4;" //ilsp[j]-wi
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"rsbmi r1,r1,#0;" //labs(ilsp[j]-wi)
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"umull %0,r2,r1,%0;" //qi*=labs(ilsp[j]-wi)
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"subs r1,r3,%4;" //ilsp[j+1]-wi
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"rsbmi r1,r1,#0;" //labs(ilsp[j+1]-wi)
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"umull %1,r3,r1,%1;" //pi*=labs(ilsp[j+1]-wi)
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"cmn r2,r3;" // shift down 16?
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"beq 0f;"
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"add %2,%2,#16;"
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"mov %0,%0,lsr #16;"
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"orr %0,%0,r2,lsl #16;"
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"mov %1,%1,lsr #16;"
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"orr %1,%1,r3,lsl #16;"
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"0:"
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"cmp r0,%3;\n"
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"bhi 1b;\n"
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"2:"
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// odd filter assymetry
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"ands r0,%5,#1;\n"
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"beq 3f;\n"
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"add r0,%3,%5,lsl#2;\n"
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"ldr r1,[r0,#-4];\n"
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"mov r0,#0x4000;\n"
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"subs r1,r1,%4;\n" //ilsp[j]-wi
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"rsbmi r1,r1,#0;\n" //labs(ilsp[j]-wi)
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"umull %0,r2,r1,%0;\n" //qi*=labs(ilsp[j]-wi)
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"umull %1,r3,r0,%1;\n" //pi*=labs(ilsp[j+1]-wi)
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"cmn r2,r3;\n" // shift down 16?
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"beq 3f;\n"
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"add %2,%2,#16;\n"
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"mov %0,%0,lsr #16;\n"
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"orr %0,%0,r2,lsl #16;\n"
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"mov %1,%1,lsr #16;\n"
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"orr %1,%1,r3,lsl #16;\n"
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//qi=(pi>>shift)*labs(ilsp[j]-wi);
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//pi=(qi>>shift)*labs(ilsp[j+1]-wi);
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//qexp+=shift;
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//}
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/* normalize to max 16 sig figs */
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"3:"
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"mov r2,#0;"
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"orr r1,%0,%1;"
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"tst r1,#0xff000000;"
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"addne r2,r2,#8;"
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"movne r1,r1,lsr #8;"
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"tst r1,#0x00f00000;"
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"addne r2,r2,#4;"
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"movne r1,r1,lsr #4;"
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"tst r1,#0x000c0000;"
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"addne r2,r2,#2;"
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"movne r1,r1,lsr #2;"
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"tst r1,#0x00020000;"
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"addne r2,r2,#1;"
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"movne r1,r1,lsr #1;"
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"tst r1,#0x00010000;"
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"addne r2,r2,#1;"
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"mov %0,%0,lsr r2;"
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"mov %1,%1,lsr r2;"
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"add %2,%2,r2;"
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: "+r"(qi),"+r"(pi),"+r"(qexp)
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: "r"(ilsp),"r"(wi),"r"(m)
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: "r0","r1","r2","r3","cc");
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*qip=qi;
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*pip=pi;
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*qexpp=qexp;
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}
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static inline void lsp_norm_asm(ogg_uint32_t *qip,ogg_int32_t *qexpp){
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ogg_uint32_t qi=*qip;
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ogg_int32_t qexp=*qexpp;
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asm("tst %0,#0x0000ff00;"
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"moveq %0,%0,lsl #8;"
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"subeq %1,%1,#8;"
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"tst %0,#0x0000f000;"
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"moveq %0,%0,lsl #4;"
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"subeq %1,%1,#4;"
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"tst %0,#0x0000c000;"
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"moveq %0,%0,lsl #2;"
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"subeq %1,%1,#2;"
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"tst %0,#0x00008000;"
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"moveq %0,%0,lsl #1;"
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"subeq %1,%1,#1;"
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: "+r"(qi),"+r"(qexp)
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:
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: "cc");
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*qip=qi;
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*qexpp=qexp;
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}
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#endif
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#endif
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