60f843bf18
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26779 a1c6a512-1295-4272-9138-f99709370657
87 lines
3.1 KiB
C
87 lines
3.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "avic-imx31.h"
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#include "spi-imx31.h"
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#include "mc13783.h"
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#include "ccm-imx31.h"
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#include "sdma-imx31.h"
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#include "dvfs_dptc-imx31.h"
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#include "kernel.h"
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#include "thread.h"
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static __attribute__((interrupt("IRQ"))) void EPIT1_HANDLER(void)
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{
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EPITSR1 = EPITSR_OCIF; /* Clear the pending status */
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/* Run through the list of tick tasks */
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call_tick_tasks();
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}
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void INIT_ATTR tick_start(unsigned int interval_in_ms)
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{
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ccm_module_clock_gating(CG_EPIT1, CGM_ON_RUN_WAIT); /* EPIT1 module
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clock ON - before writing
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regs! */
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EPITCR1 &= ~(EPITCR_OCIEN | EPITCR_EN); /* Disable the counter */
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CCM_WIMR0 &= ~CCM_WIMR0_IPI_INT_EPIT1; /* Clear wakeup mask */
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/* mcu_main_clk = 528MHz = 27MHz * 2 * ((9 + 7/9) / 1)
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* CLKSRC = ipg_clk = 528MHz / 4 / 2 = 66MHz,
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* EPIT Output Disconnected,
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* Enabled in wait mode
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* Prescale 1/2640 for 25KHz
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* Reload from modulus register,
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* Compare interrupt enabled,
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* Count from load value */
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EPITCR1 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW |
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((2640-1) << EPITCR_PRESCALER_POS) | EPITCR_RLD |
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EPITCR_OCIEN | EPITCR_ENMOD;
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EPITLR1 = interval_in_ms*25; /* Count down from interval */
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EPITCMPR1 = 0; /* Event when counter reaches 0 */
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EPITSR1 = EPITSR_OCIF; /* Clear any pending interrupt */
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avic_enable_int(INT_EPIT1, INT_TYPE_IRQ, INT_PRIO_DEFAULT,
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EPIT1_HANDLER);
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EPITCR1 |= EPITCR_EN; /* Enable the counter */
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}
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void INIT_ATTR kernel_device_init(void)
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{
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sdma_init();
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spi_init();
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mc13783_init();
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dvfs_dptc_init();
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dvfs_wfi_monitor(true); /* Monitor the WFI signal */
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#ifndef BOOTLOADER
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dvfs_dptc_start(); /* Should be ok to start even so early */
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#endif
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}
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void tick_stop(void)
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{
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avic_disable_int(INT_EPIT1); /* Disable insterrupt */
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EPITCR1 &= ~(EPITCR_OCIEN | EPITCR_EN); /* Disable counter */
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EPITSR1 = EPITSR_OCIF; /* Clear pending */
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ccm_module_clock_gating(CG_EPIT1, CGM_OFF); /* Turn off module clock */
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}
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