494 lines
14 KiB
C
494 lines
14 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <inttypes.h>
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#include "config.h"
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#include "s5l8700.h"
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#include "lcd.h"
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/* LCD driver for the Meizu M6 SP using the CLCD controller in the S5L8700
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The Meizu M6 SP can have two different LCDs, the S6D0139 and another
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(yet unknown) type, the exact type is detected at run-time.
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Open issues:
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* LCD is currently in portrait mode instead of landscape mode
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* This LCD driver accesses the Rockbox framebuffer directly, so any changes
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to the framebuffer as shown directly even before lcd_update is called.
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* Sometimes part of the top of the screen appears at the bottom
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* The Meizu seems to hang after LCD initialisation
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* The driver for the S6D0139 LCD has not been tested yet
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*/
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/* LCD SPI connections */
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#define LCD_SPI_SSn (1<<1) /* on PDAT7 */
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#define LCD_SPI_MISO (1<<2) /* on PDAT3 */
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#define LCD_SPI_MOSI (1<<6) /* on PDAT3 */
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#define LCD_SPI_SCLK (1<<7) /* on PDAT3 */
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/* LCD SPI communication definitions */
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#define LCD_SPI_DEVICE_ID (0x1D<<2)
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#define LCD_SPI_INDEX_WRITE (LCD_SPI_DEVICE_ID|0)
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#define LCD_SPI_STATUS_READ (LCD_SPI_DEVICE_ID|1)
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#define LCD_SPI_DATA_WRITE (LCD_SPI_DEVICE_ID|2)
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#define LCD_SPI_DATA_READ (LCD_SPI_DEVICE_ID|3)
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#define LCD_TYPE1_ID 0x139 /* id for LCD type S6D0139 */
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static int lcd_type = 0;
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static bool lcd_is_active = false;
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/* simple and crude delay */
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static void lcd_delay(int count)
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{
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volatile int i;
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for (i = 0; i < count; i++);
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}
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/* write 'data_out' of length 'bits' over SPI and return received data */
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static unsigned int lcd_spi_transfer(int bits, unsigned int data_out)
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{
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unsigned int data_in = 0;
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/* SSn active */
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PDAT7 &= ~LCD_SPI_SSn;
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lcd_delay(10);
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/* send and receive data */
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while (bits--) {
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/* CLK low */
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PDAT3 &= ~LCD_SPI_SCLK;
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/* set MOSI */
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if (data_out & (1 << bits)) {
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PDAT3 |= LCD_SPI_MOSI;
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}
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else {
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PDAT3 &= ~LCD_SPI_MOSI;
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}
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/* delay */
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lcd_delay(10);
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/* sample MISO */
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data_in <<= 1;
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if (PDAT3 & LCD_SPI_MISO) {
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data_in |= 1;
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}
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/* CLK high */
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PDAT3 |= LCD_SPI_SCLK;
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/* delay */
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lcd_delay(10);
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}
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/* SSn inactive */
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PDAT7 |= LCD_SPI_SSn;
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lcd_delay(10);
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return data_in;
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}
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/* initialize the lcd SPI port interface */
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static void lcd_spi_init(void)
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{
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/* configure SSn (P7.1) as output */
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PCON7 = (PCON7 & ~0x000000F0) | 0x00000010;
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/* configure MISO (P3.2) input, MOSI (P3.6) output, SCLK (P3.7) output */
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PCON3 = (PCON3 & ~0xFF000F00) | 0x11000000;
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/* set all outputs high */
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PDAT7 |= LCD_SPI_SSn;
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PDAT3 |= (LCD_SPI_MOSI | LCD_SPI_SCLK);
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}
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/* read LCD identification word over SPI */
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static unsigned int lcd_read_reg(unsigned reg)
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{
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unsigned int data;
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lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg);
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data = lcd_spi_transfer(24, (LCD_SPI_DATA_READ << 16));
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return data & 0xFFFF;
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}
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/* write LCD register over SPI */
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static void lcd_write_reg(unsigned char reg, unsigned int data)
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{
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lcd_spi_transfer(24, (LCD_SPI_INDEX_WRITE << 16) | reg);
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lcd_spi_transfer(24, (LCD_SPI_DATA_WRITE << 16) | data);
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}
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/* enable/disable clock signals towards the lcd */
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static void lcd_controller_power(bool on)
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{
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if (on) {
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LCDCON1 |= 0x80003;
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}
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else {
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LCDCON1 &= ~0x80003;
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}
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}
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/* lcd init configuration for lcd type 1 */
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static void lcd_init1(void)
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{
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lcd_write_reg(0x07, 0x0000); /* display control */
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lcd_write_reg(0x13, 0x0000); /* power control 3 */
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lcd_delay(166670);
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lcd_write_reg(0x11, 0x3304); /* power control 2 */
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lcd_write_reg(0x14, 0x1300); /* power control 4 */
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lcd_write_reg(0x10, 0x1A20); /* power control 1 */
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lcd_write_reg(0x13, 0x0040); /* power control 3 */
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lcd_delay(833350);
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lcd_write_reg(0x13, 0x0060); /* power control 3 */
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lcd_write_reg(0x13, 0x0070); /* power control 3 */
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lcd_delay(3333400);
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lcd_write_reg(0x01, 0x0127); /* driver output control */
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lcd_write_reg(0x02, 0x0700); /* lcd driving waveform control */
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lcd_write_reg(0x03, 0x1030); /* entry mode */
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lcd_write_reg(0x08, 0x0208); /* blank period control 1 */
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lcd_write_reg(0x0B, 0x0620); /* frame cycle control */
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lcd_write_reg(0x0C, 0x0110); /* external interface control */
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lcd_write_reg(0x30, 0x0120); /* gamma control 1 */
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lcd_write_reg(0x31, 0x0117); /* gamma control 2 */
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lcd_write_reg(0x32, 0x0000); /* gamma control 3 */
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lcd_write_reg(0x33, 0x0305); /* gamma control 4 */
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lcd_write_reg(0x34, 0x0717); /* gamma control 5 */
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lcd_write_reg(0x35, 0x0124); /* gamma control 6 */
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lcd_write_reg(0x36, 0x0706); /* gamma control 7 */
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lcd_write_reg(0x37, 0x0503); /* gamma control 8 */
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lcd_write_reg(0x38, 0x1F03); /* gamma control 9 */
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lcd_write_reg(0x39, 0x0009); /* gamma control 10 */
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lcd_write_reg(0x40, 0x0000); /* gate scan position */
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lcd_write_reg(0x41, 0x0000); /* vertical scroll control */
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lcd_write_reg(0x42, 0x013F); /* 1st screen driving position (end) */
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lcd_write_reg(0x43, 0x0000); /* 1st screen driving position (start) */
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lcd_write_reg(0x44, 0x013F); /* 2nd screen driving position (end) */
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lcd_write_reg(0x45, 0x0000); /* 2nd screen driving position (start) */
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lcd_write_reg(0x46, 0xEF00); /* horizontal window address */
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lcd_write_reg(0x47, 0x013F); /* vertical window address (end) */
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lcd_write_reg(0x48, 0x0000); /* vertical window address (start) */
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lcd_write_reg(0x07, 0x0015); /* display control */
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lcd_delay(500000);
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lcd_write_reg(0x07, 0x0017); /* display control */
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lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */
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lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */
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lcd_write_reg(0x22, 0x0000); /* write data to GRAM */
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}
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/* lcd init configuration for lcd type 2 */
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static void lcd_init2(void)
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{
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lcd_write_reg(0x07, 0x0000);
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lcd_write_reg(0x12, 0x0000);
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lcd_delay(166670);
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lcd_write_reg(0x11, 0x000C);
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lcd_write_reg(0x12, 0x0A1C);
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lcd_write_reg(0x13, 0x0022);
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lcd_write_reg(0x14, 0x0000);
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lcd_write_reg(0x10, 0x7404);
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lcd_write_reg(0x11, 0x0738);
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lcd_write_reg(0x10, 0x7404);
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lcd_delay(833350);
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lcd_write_reg(0x07, 0x0009);
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lcd_write_reg(0x12, 0x065C);
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lcd_delay(3333400);
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lcd_write_reg(0x01, 0xE127);
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lcd_write_reg(0x02, 0x0300);
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lcd_write_reg(0x03, 0x1100);
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lcd_write_reg(0x08, 0x0008);
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lcd_write_reg(0x0B, 0x0000);
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lcd_write_reg(0x0C, 0x0000);
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lcd_write_reg(0x0D, 0x0007);
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lcd_write_reg(0x15, 0x0003);
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lcd_write_reg(0x16, 0x0014);
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lcd_write_reg(0x17, 0x0000);
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lcd_write_reg(0x30, 0x0503); /* gamma? */
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lcd_write_reg(0x31, 0x0303);
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lcd_write_reg(0x32, 0x0305);
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lcd_write_reg(0x33, 0x0202);
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lcd_write_reg(0x34, 0x0204);
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lcd_write_reg(0x35, 0x0404);
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lcd_write_reg(0x36, 0x0402);
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lcd_write_reg(0x37, 0x0202);
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lcd_write_reg(0x38, 0x1000);
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lcd_write_reg(0x39, 0x1000);
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lcd_write_reg(0x07, 0x0009);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x0109);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x010B);
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}
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/* lcd enable for lcd type 1 */
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static void lcd_enable1(bool on)
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{
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if (on) {
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lcd_write_reg(0x00, 0x0001); /* start oscillation */
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lcd_delay(166670);
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lcd_write_reg(0x10, 0x0000); /* power control 1 */
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lcd_delay(166670);
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lcd_write_reg(0x11, 0x3304); /* power control 2 */
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lcd_write_reg(0x14, 0x1300); /* power control 4 */
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lcd_write_reg(0x10, 0x1A20); /* power control 1 */
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lcd_write_reg(0x07, 0x0015); /* display control */
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lcd_delay(500000);
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lcd_write_reg(0x20, 0x0000); /* RAM address set (low part) */
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lcd_write_reg(0x21, 0x0000); /* RAM address set (high part) */
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lcd_write_reg(0x22, 0x0000); /* write data to GRAM */
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}
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else {
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lcd_write_reg(0x07, 0x0016); /* display control */
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lcd_delay(166670 * 4);
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lcd_write_reg(0x07, 0x0004); /* display control */
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lcd_delay(166670 * 4);
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lcd_write_reg(0x10, 0x1E21); /* power control 1 */
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lcd_delay(166670);
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}
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}
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/* lcd enable for lcd type 2 */
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static void lcd_enable2(bool on)
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{
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if (on) {
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lcd_write_reg(0x10, 0x0400);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x0000);
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lcd_write_reg(0x12, 0x0000);
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lcd_delay(166670);
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lcd_write_reg(0x11, 0x000C);
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lcd_write_reg(0x12, 0x0A1C);
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lcd_write_reg(0x13, 0x0022);
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lcd_write_reg(0x14, 0x0000);
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lcd_write_reg(0x10, 0x7404);
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lcd_write_reg(0x11, 0x0738);
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lcd_write_reg(0x10, 0x7404);
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lcd_delay(833350);
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lcd_write_reg(0x07, 0x0009);
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lcd_write_reg(0x12, 0x065C);
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lcd_delay(3333400);
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lcd_write_reg(0x0B, 0x0000);
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lcd_write_reg(0x07, 0x0009);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x0109);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x010B);
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}
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else {
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lcd_write_reg(0x0B, 0x0109);
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lcd_write_reg(0x07, 0x0009);
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lcd_delay(666680);
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lcd_write_reg(0x07, 0x0008);
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lcd_delay(666680);
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lcd_write_reg(0x10, 0x0400);
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lcd_write_reg(0x10, 0x0401);
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lcd_delay(166670);
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}
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}
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/* turn both the lcd controller and the lcd itself on or off */
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void lcd_enable(bool on)
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{
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if (on) {
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/* enable controller clock */
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PWRCON &= ~(1 << 18);
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lcd_controller_power(true);
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lcd_delay(166670);
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}
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/* call type specific power function */
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if (lcd_type == 1) {
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lcd_enable1(on);
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}
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else {
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lcd_enable2(on);
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}
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if (!on) {
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lcd_controller_power(false);
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/* disable controller clock */
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PWRCON |= (1 << 18);
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}
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lcd_is_active = on;
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}
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bool lcd_active(void)
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{
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return lcd_is_active;
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}
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/* initialise the lcd controller inside the s5l8700 */
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static void lcd_controller_init(void)
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{
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PWRCON &= ~(1 << 18);
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LCDCON1 = (0 << 28) | /* BURSTLEN */
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(0 << 19) | /* DIVEN */
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(12 << 13) | /* CLKVAL */
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(1 << 12) | /* CLKDIR, 1=divided clock */
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(0 << 11) | /* CLKSEL, 0=HCLK, 1=PLL */
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(5 << 6) | /* BPPMODEF, 5=rgb565, 7=raw24 */
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(5 << 2) | /* BPPMODEB, 5=rgb565, 7=raw24 */
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(0 << 0); /* ENVID */
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LCDCON2 = (2 << 9) | /* PALFRM, 2=rgb565 palette */
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(1 << 7) | /* IVCLK */
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(1 << 6) | /* IHSYNC */
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(1 << 5) | /* IVSYNC */
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(1 << 3); /* IVDEN */
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LCDTCON1 = (lcd_type == 1) ? 0x070103 : 0x030303;
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LCDTCON2 = (lcd_type == 1) ? 0x070103 : 0x030703;
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LCDTCON3 = ((LCD_HEIGHT - 1) << 11) | (LCD_WIDTH - 1);
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LCDOSD1 = 0;
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LCDOSD2 = 0;
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LCDOSD3 = 0;
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LCDB1SADDR1 = 0;
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LCDB2SADDR1 = 0;
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LCDF1SADDR1 = 0;
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LCDF2SADDR1 = 0;
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LCDB1SADDR2 = 0;
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LCDB2SADDR2 = 0;
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LCDF1SADDR2 = 0;
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LCDF2SADDR2 = 0;
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LCDB1SADDR3 = 0;
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LCDB2SADDR3 = 0;
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LCDF1SADDR3 = 0;
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LCDF2SADDR3 = 0;
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LCDKEYCON = 0;
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LCDCOLVAL = 0;
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LCDBGCON = 0;
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LCDFGCON = 0;
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LCDDITHMODE = 0;
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LCDINTCON = 0;
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}
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void lcd_init_device(void)
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{
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unsigned int lcd_id;
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uint32_t fb, fb_end, window;
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/* configure LCD SPI pins */
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lcd_spi_init();
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/* identify display through SPI */
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lcd_id = lcd_read_reg(0);
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lcd_type = (lcd_id == LCD_TYPE1_ID) ? 1 : 2;
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/* display specific init sequence */
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if (lcd_type == 1) {
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lcd_init1();
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}
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else {
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lcd_init2();
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}
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/* init LCD controller */
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lcd_controller_init();
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/* set framebuffer addresses */
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fb = (uint32_t) FBADDR(0,0);
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fb_end = (uint32_t) FBADDR(0,LCD_HEIGHT);
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window = 2 * LCD_WIDTH;
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LCDB1SADDR1 = fb;
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LCDB2SADDR1 = fb;
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LCDF1SADDR1 = fb;
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LCDF2SADDR1 = fb;
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LCDB1SADDR2 = fb_end;
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LCDB2SADDR2 = fb_end;
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LCDF1SADDR2 = fb_end;
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LCDF2SADDR2 = fb_end;
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LCDB1SADDR3 = window;
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LCDB2SADDR3 = window;
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LCDF1SADDR3 = window;
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LCDF2SADDR3 = window;
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lcd_enable(true);
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/* configure LCD pins */
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PCON_ASRAM = 1;
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}
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void lcd_update_rect(int x, int y, int width, int height)
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{
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/* not implemented yet, LCD controller accesses framebuffer directly */
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(void) x;
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(void) y;
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(void) width;
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(void) height;
|
|
}
|
|
|
|
void lcd_update(void)
|
|
{
|
|
lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT);
|
|
}
|
|
|
|
void lcd_blit_yuv(unsigned char * const src[3],
|
|
int src_x, int src_y, int stride,
|
|
int x, int y, int width, int height)
|
|
{
|
|
(void)src;
|
|
(void)src_x;
|
|
(void)src_y;
|
|
(void)stride;
|
|
(void)x;
|
|
(void)y;
|
|
(void)width;
|
|
(void)height;
|
|
/* TODO: not implemented yet */
|
|
}
|
|
|