51d8a45057
This simple program shows how to setup timer for periodic operation. Interrupts are not used yet and simply pending irq bit is polled and cleared when set. This program supports my understanding of disassm of ADEC_N63.BIN that P_CLK is configured for 7.5MHz and timer clock source is P_CLK directly. Change-Id: Idd6461bf847c763b78b8c324012ec2515f65dd41 |
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adfuload | ||
atjboottool |