25701c5b2d
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26909 a1c6a512-1295-4272-9138-f99709370657
232 lines
6.7 KiB
C
232 lines
6.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Alan Korr
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#ifndef BOOTLOADER
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#include "adc-target.h"
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#include "button-target.h"
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extern void TIMER1(void);
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extern void TIMER2(void);
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void __attribute__((interrupt("IRQ"))) irq_handler(void)
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{
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if(CURRENT_CORE == CPU)
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{
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if (CPU_INT_STAT & TIMER1_MASK)
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TIMER1();
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else if (CPU_INT_STAT & TIMER2_MASK)
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TIMER2();
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else if (CPU_INT_STAT & GPIO_MASK)
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{
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if (GPIOA_INT_STAT)
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ipod_3g_button_int();
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#ifdef IPOD_1G2G
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if (GPIOB_INT_STAT & 0x04)
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ipod_2g_adc_int();
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#endif
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}
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}
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else
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{
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if (COP_INT_STAT & TIMER2_MASK)
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TIMER2();
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}
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}
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#endif
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/* TODO: The following two function have been lifted straight from IPL, and
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hence have a lot of numeric addresses used straight. I'd like to use
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#defines for these, but don't know what most of them are for or even what
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they should be named. Because of this I also have no way of knowing how
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to extend the funtions to do alternate cache configurations and/or
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some other CPU frequency scaling. */
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#ifndef BOOTLOADER
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void ICODE_ATTR __attribute__((naked)) cpucache_flush(void)
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{
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asm volatile(
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"mov r0, #0xf0000000 \n"
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"add r0, r0, #0xc000 \n" /* r0 = CACHE_FLUSH_BASE */
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"add r1, r0, #0x2000 \n" /* r1 = CACHE_FLUSH_BASE + CACHE_SIZE */
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"mov r2, #0 \n"
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"1: \n"
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"str r2, [r0], #16 \n" /* Flush */
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"cmp r0, r1 \n"
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"blo 1b \n"
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"bx lr \n"
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);
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}
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void ICODE_ATTR __attribute__((naked)) cpucache_invalidate(void)
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{
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asm volatile(
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"mov r0, #0xf0000000 \n"
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"add r2, r0, #0x4000 \n" /* r1 = CACHE_INVALIDATE_BASE */
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"add r0, r0, #0xc000 \n" /* r0 = CACHE_FLUSH_BASE */
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"add r1, r0, #0x2000 \n" /* r2 = CACHE_FLUSH_BASE + CACHE_SIZE */
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"mov r3, #0 \n"
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"1: \n"
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"str r3, [r0], #16 \n" /* Flush */
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"str r3, [r2], #16 \n" /* Invalidate */
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"cmp r0, r1 \n"
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"blo 1b \n"
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"bx lr \n"
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);
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}
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static void ipod_init_cache(void)
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{
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/* Initialising the cache in the iPod bootloader prevents Rockbox from starting */
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PROC_STAT &= ~0x700;
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outl(0x4000, 0xcf004020);
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CACHE_CTL = CACHE_CTL_INIT;
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asm volatile(
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"mov r0, #0xf0000000 \n"
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"add r0, r0, #0x4000 \n" /* r0 = CACHE_INVALIDATE_BASE */
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"add r1, r0, #0x2000 \n" /* r1 = CACHE_INVALIDATE_BASE + CACHE_SIZE */
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"mov r2, #0 \n"
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"1: \n"
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"str r2, [r0], #16 \n" /* Invalidate */
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"cmp r0, r1 \n"
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"blo 1b \n"
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: : : "r0", "r1", "r2"
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);
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/* Cache if (addr & mask) >> 16 == (mask & match) >> 16:
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* yes: 0x00000000 - 0x03ffffff
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* no: 0x04000000 - 0x1fffffff
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* yes: 0x20000000 - 0x23ffffff
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* no: 0x24000000 - 0x3fffffff <= range containing uncached alias
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*/
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CACHE_MASK = 0x00001c00;
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CACHE_OPERATION = 0x3fc0;
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CACHE_CTL = CACHE_CTL_INIT | CACHE_CTL_RUN;
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}
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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void set_cpu_frequency(long frequency)
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#else
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static void pp_set_cpu_frequency(long frequency)
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#endif
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{
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cpu_frequency = frequency;
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PLL_CONTROL |= 0x6000; /* make sure some enable bits are set */
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CLOCK_ENABLE = 0x01; /* select source #1 */
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switch (frequency)
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{
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case CPUFREQ_MAX:
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PLL_UNLOCK = 0xd19b; /* unlock frequencies > 66MHz */
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CLOCK_SOURCE = 0xa9; /* source #1: 24 Mhz, source #2..#4: PLL */
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PLL_CONTROL = 0xe000; /* PLL enabled */
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PLL_DIV = 3; /* 10/3 * 24MHz */
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PLL_MULT = 10;
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udelay(200); /* wait for relock */
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break;
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case CPUFREQ_NORMAL:
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CLOCK_SOURCE = 0xa9; /* source #1: 24 Mhz, source #2..#4: PLL */
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PLL_CONTROL = 0xe000; /* PLL enabled */
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PLL_DIV = 4; /* 5/4 * 24MHz */
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PLL_MULT = 5;
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udelay(200); /* wait for relock */
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break;
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case CPUFREQ_SLEEP:
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CLOCK_SOURCE = 0x51; /* source #2: 32kHz, #1, #2, #4: 24MHz */
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PLL_CONTROL = 0x6000; /* PLL disabled */
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udelay(10000); /* let 32kHz source stabilize? */
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break;
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default:
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CLOCK_SOURCE = 0x55; /* source #1..#4: 24 Mhz */
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PLL_CONTROL = 0x6000; /* PLL disabled */
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cpu_frequency = CPUFREQ_DEFAULT;
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break;
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}
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CLOCK_ENABLE = 0x02; /* select source #2 */
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}
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#endif /* !BOOTLOADER */
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void system_init(void)
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{
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#ifndef BOOTLOADER
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if (CURRENT_CORE == CPU)
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{
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/* Remap the flash ROM on CPU, keep hidden from COP:
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* 0x00000000-0x03ffffff = 0x20000000-0x23ffffff */
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MMAP1_LOGICAL = 0x20003c00;
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MMAP1_PHYSICAL = 0x00003f84;
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#if defined(IPOD_1G2G) || defined(IPOD_3G)
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DEV_EN = 0x0b9f; /* don't clock unused PP5002 hardware components */
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outl(0x0035, 0xcf005004); /* DEV_EN2 ? */
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#endif
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INT_FORCED_CLR = -1;
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CPU_INT_DIS = -1;
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COP_INT_DIS = -1;
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GPIOA_INT_EN = 0;
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GPIOB_INT_EN = 0;
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GPIOC_INT_EN = 0;
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GPIOD_INT_EN = 0;
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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#if NUM_CORES > 1
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cpu_boost_init();
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#endif
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#else
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pp_set_cpu_frequency(CPUFREQ_MAX);
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#endif
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}
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ipod_init_cache();
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#endif
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}
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void system_reboot(void)
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{
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DEV_RS |= 4;
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while (1);
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}
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void system_exception_wait(void)
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{
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/* FIXME: we just need the right buttons */
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CPU_INT_DIS = -1;
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COP_INT_DIS = -1;
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/* Halt */
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sleep_core(CURRENT_CORE);
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while (1);
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}
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int system_memory_guard(int newmode)
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{
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(void)newmode;
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return 0;
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}
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