12375d1d3a
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29492 a1c6a512-1295-4272-9138-f99709370657
144 lines
3.9 KiB
C
144 lines
3.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "i2c-s3c2440.h"
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static struct semaphore i2c_complete; /* Transfer completion signal */
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static struct mutex i2c_mtx; /* Mutual exclusion */
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static unsigned char *buf_ptr; /* Next byte to transfer */
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static int buf_count; /* Number of bytes remaining to transfer */
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static void i2c_stop(void)
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{
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/* Generate STOP */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB;
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/* No more interrupts, clear pending interrupt to continue */
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IICCON &= ~(I2C_TXRX_INTPND | I2C_TXRX_INTENB);
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}
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void i2c_write(int addr, const unsigned char *buf, int count)
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{
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if (count <= 0)
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return;
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mutex_lock(&i2c_mtx);
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/* Turn on I2C clock */
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bitset32(&CLKCON, 1 << 16);
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/* Set mode to master transmitter and enable lines */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB;
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/* Set buffer start and count */
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buf_ptr = (unsigned char *)buf;
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buf_count = count;
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/* Send slave address and then data */
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SRCPND = IIC_MASK;
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INTPND = IIC_MASK;
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IICCON |= I2C_TXRX_INTENB;
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/* Load slave address into shift register */
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IICDS = addr & 0xfe;
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/* Generate START */
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IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_START | I2C_RXTX_ENB;
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if (semaphore_wait(&i2c_complete, HZ) != OBJ_WAIT_SUCCEEDED)
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{
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/* Something went wrong - stop transmission */
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int oldlevel = disable_irq_save();
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i2c_stop();
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restore_irq(oldlevel);
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}
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/* Go back to slave receive mode and disable lines */
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IICSTAT = 0;
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/* Turn off I2C clock */
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bitclr32(&CLKCON, 1 << 16);
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mutex_unlock(&i2c_mtx);
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}
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void i2c_init(void)
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{
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/* Init kernel objects */
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semaphore_init(&i2c_complete, 1, 0);
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mutex_init(&i2c_mtx);
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/* Clear pending source */
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SRCPND = IIC_MASK;
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INTPND = IIC_MASK;
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/* Enable i2c interrupt in controller */
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bitclr32(&INTMOD, IIC_MASK);
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bitclr32(&INTMSK, IIC_MASK);
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/* Turn on I2C clock */
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bitset32(&CLKCON, 1 << 16);
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/* Set GPE15 (IICSDA) and GPE14 (IICSCL) to IIC */
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GPECON = (GPECON & ~((3 << 30) | (3 << 28))) |
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((2 << 30) | (2 << 28));
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/* Bus ACK, IICCLK: fPCLK / 16, Rx/Tx Int: Disable, Tx clock: IICCLK/8 */
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/* OF PCLK: 49.1568MHz / 16 / 8 = 384.0375 kHz */
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IICCON = (7 << 0);
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/* SDA line delayed 0 PCLKs */
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IICLC = (0 << 0);
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/* Turn off I2C clock */
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bitclr32(&CLKCON, 1 << 16);
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}
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void IIC(void)
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{
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for (;;)
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{
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/* If ack was received from last byte and bytes are remaining */
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if (--buf_count >= 0 && (IICSTAT & I2C_ACK_L) == 0)
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{
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/* Write next byte to shift register */
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IICDS = *buf_ptr++;
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/* Clear pending interrupt to continue */
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IICCON &= ~I2C_TXRX_INTPND;
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break;
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}
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/* Finished */
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/* Generate STOP */
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i2c_stop();
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/* Signal thread */
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semaphore_release(&i2c_complete);
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break;
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}
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/* Ack */
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SRCPND = IIC_MASK;
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INTPND = IIC_MASK;
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}
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