e8e06f81f9
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30745 a1c6a512-1295-4272-9138-f99709370657
54 lines
1.6 KiB
C
54 lines
1.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Marcin Bukat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "kernel.h"
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/* rockchip rk27xx driver for the kernel timer */
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/* sys timer ISR */
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void INT_TIMER0(void)
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{
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/* clear interrupt */
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TMR0CON &= ~0x04;
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call_tick_tasks(); /* Run through the list of tick tasks */
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}
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/* this assumes 50MHz APB bus frequency */
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void tick_start(unsigned int interval_in_ms)
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{
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unsigned int cycles = 50000 * interval_in_ms;
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/* enable timer clock */
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SCU_CLKCFG &= ~(1<<28);
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/* configure timer0 */
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TMR0LR = cycles;
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TMR0CON = (1<<8) | (1<<7) | (1<<1); /* periodic, 1/1, interrupt enable */
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/* unmask timer0 interrupt */
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INTC_IMR |= 0x04;
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/* enable timer0 interrupt */
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INTC_IECR |= 0x04;
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}
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