31cf7e95b4
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13995 a1c6a512-1295-4272-9138-f99709370657
174 lines
5.4 KiB
C
174 lines
5.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Portalplayer specific code for I2S
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*
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* Based on code from the ipodlinux project - http://ipodlinux.org/
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* Adapted for Rockbox in December 2005
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*
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* Original file: linux/arch/armnommu/mach-ipod/audio.c
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*
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* Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org)
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "cpu.h"
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/* TODO: Add in PP5002 defs */
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#if CONFIG_CPU == PP5002
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void i2s_reset(void)
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{
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/* I2S device reset */
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DEV_RS |= 0x80;
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DEV_RS &= ~0x80;
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/* I2S controller enable */
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IISCONFIG |= 1;
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/* BIT.FORMAT [11:10] = I2S (default) */
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/* BIT.SIZE [9:8] = 24bit */
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/* FIFO.FORMAT = 24 bit LSB */
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/* reset DAC and ADC fifo */
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IISFIFO_CFG |= 0x30000;
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}
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#else /* PP502X */
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/* All I2S formats send MSB first */
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/* Data format on the I2S bus */
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#define FORMAT_MASK (0x3 << 10)
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#define FORMAT_I2S (0x0 << 10) /* Standard I2S - leading dummy bit */
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#define FORMAT_1 (0x1 << 10)
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#define FORMAT_LJUST (0x2 << 10) /* Left justified - no dummy bit */
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#define FORMAT_3 (0x3 << 10)
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/* Other formats not yet known */
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/* Data size on I2S bus */
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#define SIZE_MASK (0x3 << 8)
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#define SIZE_16BIT (0x0 << 8)
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/* Other sizes not yet known */
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/* Data size/format on I2S FIFO */
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#define FIFO_FORMAT_MASK (0x7 << 4)
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#define FIFO_FORMAT_0 (0x0 << 4)
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/* Big-endian formats - data sent to the FIFO must be big endian.
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* I forgot which is which size but did test them. */
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#define FIFO_FORMAT_1 (0x1 << 4)
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#define FIFO_FORMAT_2 (0x2 << 4)
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/* 32bit-MSB-little endian */
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#define FIFO_FORMAT_LE32 (0x3 << 4)
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/* 16bit-MSB-little endian */
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#define FIFO_FORMAT_LE16 (0x4 << 4)
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/* FIFO formats 0x5 and above seem equivalent to 0x4 ?? */
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/**
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* PP502x
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*
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* IISCONFIG bits:
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* | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
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* | RESET | |TXFIFOEN|RXFIFOEN| | ???? | MS | ???? |
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* | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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* | | | | | | | | |
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* | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
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* | | | | | Bus Format[1:0] | Size[1:0] |
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* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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* | | Size Format[2:0] | ???? | ???? | IRQTX | IRQRX |
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*
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* IISFIFO_CFG bits:
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* | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
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* | | Free[6:0] |
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* | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
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* | | | | | | | | |
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* | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
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* | | | | RXCLR | | | | TXCLR |
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* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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* | | | RX_ATN_LEVEL | | | TX_ATN_LEVEL |
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*/
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/* Are we I2S Master or slave? */
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#define I2S_MASTER (1<<25)
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#define I2S_RESET (0x1 << 31)
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/*
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* Reset the I2S BIT.FORMAT I2S, 16bit, FIFO.FORMAT 32bit
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*/
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void i2s_reset(void)
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{
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/* I2S soft reset */
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IISCONFIG |= I2S_RESET;
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IISCONFIG &= ~I2S_RESET;
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/* BIT.FORMAT */
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IISCONFIG = ((IISCONFIG & ~FORMAT_MASK) | FORMAT_I2S);
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/* BIT.SIZE */
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IISCONFIG = ((IISCONFIG & ~SIZE_MASK) | SIZE_16BIT);
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/* FIFO.FORMAT */
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/* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */
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#ifdef HAVE_AS3514
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/* AS3514 can only operate as I2S Slave */
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IISCONFIG |= I2S_MASTER;
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/* Set I2S to 44.1kHz */
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outl((inl(0x70002808) & ~(0x1ff)) | 33, 0x70002808);
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outl(7, 0x60006080);
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IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE16);
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#else
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IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE32);
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#endif
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/* RX_ATN_LVL=1 == when 12 slots full */
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/* TX_ATN_LVL=1 == when 12 slots empty */
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IISFIFO_CFG |= 0x33;
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/* Rx.CLR = 1, TX.CLR = 1 */
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IISFIFO_CFG |= 0x1100;
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}
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#ifdef SANSA_E200
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void i2s_scale_attn_level(long frequency)
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{
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unsigned int iisfifo_cfg = IISFIFO_CFG & ~0xff;
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/* TODO: set this more appropriately for frequency */
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if (frequency <= CPUFREQ_DEFAULT)
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{
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/* when 4 slots full */
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/* when 4 slots empty */
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iisfifo_cfg |= 0x11;
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}
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else if (frequency < CPUFREQ_MAX)
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{
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/* when 8 slots full */
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/* when 8 slots empty */
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iisfifo_cfg |= 0x22;
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}
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else
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{
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/* when 12 slots full */
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/* when 12 slots empty */
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iisfifo_cfg |= 0x33;
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}
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IISFIFO_CFG = iisfifo_cfg;
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}
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#endif /* SANSA_E200 */
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#endif
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